Lines Matching +full:adc +full:- +full:use +full:- +full:external +full:- +full:triggers
1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI ADC driver for Analog Devices Inc. AD4695 and similar chips
33 #include <dt-bindings/iio/adi,ad4695.h>
183 .name = "ad4695-8",
213 .name = "ad4695-16",
290 * ad4695_set_single_cycle_mode - Set the device in single cycle mode
296 * triggers the first conversion using the channel in AS_SLOT0.
306 ret = regmap_clear_bits(st->regmap, AD4695_REG_SEQ_CTRL, in ad4695_set_single_cycle_mode()
312 ret = regmap_write(st->regmap, AD4695_REG_AS_SLOT(0), in ad4695_set_single_cycle_mode()
317 return regmap_set_bits(st->regmap, AD4695_REG_SETUP, in ad4695_set_single_cycle_mode()
323 * ad4695_enter_advanced_sequencer_mode - Put the ADC in advanced sequencer mode
325 * @n: The number of slots to use - must be >= 2, <= 128
328 * STD_SEQ_EN=0, NUM_SLOTS_AS=n-1 and CYC_CTRL=0 (Table 15). Setting SPI_MODE=1
329 * triggers the first conversion using the channel in AS_SLOT0.
337 ret = regmap_update_bits(st->regmap, AD4695_REG_SEQ_CTRL, in ad4695_enter_advanced_sequencer_mode()
341 FIELD_PREP(AD4695_REG_SEQ_CTRL_NUM_SLOTS_AS, n - 1)); in ad4695_enter_advanced_sequencer_mode()
345 return regmap_update_bits(st->regmap, AD4695_REG_SETUP, in ad4695_enter_advanced_sequencer_mode()
352 * ad4695_exit_conversion_mode - Exit conversion mode
362 .tx_buf = &st->cnv_cmd2, in ad4695_exit_conversion_mode()
369 * Technically, could do a 5-bit transfer, but shifting to start of in ad4695_exit_conversion_mode()
372 st->cnv_cmd2 = AD4695_CMD_EXIT_CNV_MODE << 3; in ad4695_exit_conversion_mode()
374 return spi_sync_transfer(st->spi, &xfer, 1); in ad4695_exit_conversion_mode()
392 return -EINVAL; in ad4695_set_ref_voltage()
394 return regmap_update_bits(st->regmap, AD4695_REG_REF_CTRL, in ad4695_set_ref_voltage()
405 val = FIELD_PREP(AD4695_REG_CONFIG_IN_MODE, cfg->bipolar ? 1 : 0); in ad4695_write_chn_cfg()
408 val |= FIELD_PREP(AD4695_REG_CONFIG_IN_PAIR, cfg->pin_pairing); in ad4695_write_chn_cfg()
412 cfg->highz_en ? 1 : 0); in ad4695_write_chn_cfg()
414 return regmap_update_bits(st->regmap, in ad4695_write_chn_cfg()
415 AD4695_REG_CONFIG_IN(cfg->channel), in ad4695_write_chn_cfg()
423 u8 temp_chan_bit = st->chip_info->num_voltage_inputs; in ad4695_buffer_preenable()
432 * account for the gap between trigger polls - we don't read data from in ad4695_buffer_preenable()
438 memset(st->buf_read_xfer, 0, sizeof(st->buf_read_xfer)); in ad4695_buffer_preenable()
441 xfer = &st->buf_read_xfer[0]; in ad4695_buffer_preenable()
442 xfer->cs_change = 1; in ad4695_buffer_preenable()
443 xfer->delay.value = st->chip_info->t_acq_ns; in ad4695_buffer_preenable()
444 xfer->delay.unit = SPI_DELAY_UNIT_NSECS; in ad4695_buffer_preenable()
445 xfer->cs_change_delay.value = AD4695_T_CONVERT_NS; in ad4695_buffer_preenable()
446 xfer->cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad4695_buffer_preenable()
450 xfer = &st->buf_read_xfer[num_xfer]; in ad4695_buffer_preenable()
451 xfer->bits_per_word = 16; in ad4695_buffer_preenable()
452 xfer->rx_buf = &st->buf[(num_xfer - 1) * 2]; in ad4695_buffer_preenable()
453 xfer->len = 2; in ad4695_buffer_preenable()
454 xfer->cs_change = 1; in ad4695_buffer_preenable()
455 xfer->cs_change_delay.value = AD4695_T_CONVERT_NS; in ad4695_buffer_preenable()
456 xfer->cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad4695_buffer_preenable()
461 ret = regmap_write(st->regmap, in ad4695_buffer_preenable()
482 st->buf_read_xfer[num_xfer] = *xfer; in ad4695_buffer_preenable()
487 xfer->cs_change = 1; in ad4695_buffer_preenable()
488 xfer->delay.value = st->chip_info->t_acq_ns; in ad4695_buffer_preenable()
489 xfer->delay.unit = SPI_DELAY_UNIT_NSECS; in ad4695_buffer_preenable()
490 xfer->cs_change_delay.value = AD4695_T_CONVERT_NS; in ad4695_buffer_preenable()
491 xfer->cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad4695_buffer_preenable()
495 ret = regmap_write(st->regmap, in ad4695_buffer_preenable()
505 * Don't keep CS asserted after last xfer. Also triggers conversion of in ad4695_buffer_preenable()
508 xfer->cs_change = 0; in ad4695_buffer_preenable()
515 ret = regmap_update_bits(st->regmap, AD4695_REG_TEMP_CTRL, in ad4695_buffer_preenable()
521 spi_message_init_with_transfers(&st->buf_read_msg, st->buf_read_xfer, in ad4695_buffer_preenable()
524 ret = spi_optimize_message(st->spi, &st->buf_read_msg); in ad4695_buffer_preenable()
528 /* This triggers conversion of slot 0. */ in ad4695_buffer_preenable()
531 spi_unoptimize_message(&st->buf_read_msg); in ad4695_buffer_preenable()
545 spi_unoptimize_message(&st->buf_read_msg); in ad4695_buffer_postdisable()
558 struct iio_dev *indio_dev = pf->indio_dev; in ad4695_trigger_handler()
562 ret = spi_sync(st->spi, &st->buf_read_msg); in ad4695_trigger_handler()
566 iio_push_to_buffers_with_timestamp(indio_dev, st->buf, pf->timestamp); in ad4695_trigger_handler()
569 iio_trigger_notify_done(indio_dev->trig); in ad4695_trigger_handler()
575 * ad4695_read_one_sample - Read a single sample using single-cycle mode
579 * Upon successful return, the sample will be stored in `st->raw_data`.
595 * in single-cycle mode, so we have to do an extra xfer to read the in ad4695_read_one_sample()
600 st->cnv_cmd2 = AD4695_CMD_TEMP_CHAN << 3; in ad4695_read_one_sample()
601 xfer[0].tx_buf = &st->cnv_cmd2; in ad4695_read_one_sample()
611 st->cnv_cmd = AD4695_CMD_EXIT_CNV_MODE << 11; in ad4695_read_one_sample()
613 xfer[i].tx_buf = &st->cnv_cmd; in ad4695_read_one_sample()
614 xfer[i].rx_buf = &st->raw_data; in ad4695_read_one_sample()
617 return spi_sync_transfer(st->spi, xfer, i + 1); in ad4695_read_one_sample()
625 struct ad4695_channel_config *cfg = &st->channels_cfg[chan->scan_index]; in ad4695_read_raw()
626 u8 realbits = chan->scan_type.realbits; in ad4695_read_raw()
632 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad4695_read_raw()
633 ret = ad4695_read_one_sample(st, chan->address); in ad4695_read_raw()
637 if (chan->scan_type.sign == 's') in ad4695_read_raw()
638 *val = sign_extend32(st->raw_data, realbits - 1); in ad4695_read_raw()
640 *val = st->raw_data; in ad4695_read_raw()
646 switch (chan->type) { in ad4695_read_raw()
648 *val = st->vref_mv; in ad4695_read_raw()
649 *val2 = chan->scan_type.realbits; in ad4695_read_raw()
652 /* T_scale (°C) = raw * V_REF (mV) / (-1.8 mV/°C * 2^16) */ in ad4695_read_raw()
653 *val = st->vref_mv * -556; in ad4695_read_raw()
657 return -EINVAL; in ad4695_read_raw()
660 switch (chan->type) { in ad4695_read_raw()
662 if (cfg->pin_pairing == AD4695_IN_PAIR_COM) in ad4695_read_raw()
663 *val = st->com_mv * (1 << realbits) / st->vref_mv; in ad4695_read_raw()
664 else if (cfg->pin_pairing == AD4695_IN_PAIR_EVEN_ODD) in ad4695_read_raw()
665 *val = cfg->common_mode_mv * (1 << realbits) / st->vref_mv; in ad4695_read_raw()
671 /* T_offset (°C) = -725 mV / (-1.8 mV/°C) */ in ad4695_read_raw()
672 /* T_offset (raw) = T_offset (°C) * (-1.8 mV/°C) * 2^16 / V_REF (mV) */ in ad4695_read_raw()
673 *val = -47513600; in ad4695_read_raw()
674 *val2 = st->vref_mv; in ad4695_read_raw()
677 return -EINVAL; in ad4695_read_raw()
680 switch (chan->type) { in ad4695_read_raw()
682 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad4695_read_raw()
683 ret = regmap_read(st->regmap16, in ad4695_read_raw()
684 AD4695_REG_GAIN_IN(chan->scan_index), in ad4695_read_raw()
696 return -EINVAL; in ad4695_read_raw()
699 switch (chan->type) { in ad4695_read_raw()
701 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad4695_read_raw()
702 ret = regmap_read(st->regmap16, in ad4695_read_raw()
703 AD4695_REG_OFFSET_IN(chan->scan_index), in ad4695_read_raw()
714 *val *= -1; in ad4695_read_raw()
715 *val2 *= -1; in ad4695_read_raw()
722 return -EINVAL; in ad4695_read_raw()
725 return -EINVAL; in ad4695_read_raw()
736 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad4695_write_raw()
739 switch (chan->type) { in ad4695_write_raw()
750 return regmap_write(st->regmap16, in ad4695_write_raw()
751 AD4695_REG_GAIN_IN(chan->scan_index), in ad4695_write_raw()
754 return -EINVAL; in ad4695_write_raw()
757 switch (chan->type) { in ad4695_write_raw()
761 else if ((val2 < 0 ? -val : val) < S16_MIN / 4) in ad4695_write_raw()
765 -(val * 4 + -val2 * 4 / MICRO), in ad4695_write_raw()
769 val * 4 - val2 * 4 / MICRO, in ad4695_write_raw()
776 return regmap_write(st->regmap16, in ad4695_write_raw()
777 AD4695_REG_OFFSET_IN(chan->scan_index), in ad4695_write_raw()
780 return -EINVAL; in ad4695_write_raw()
783 return -EINVAL; in ad4695_write_raw()
808 switch (chan->type) { in ad4695_read_avail()
814 return -EINVAL; in ad4695_read_avail()
817 switch (chan->type) { in ad4695_read_avail()
823 return -EINVAL; in ad4695_read_avail()
826 return -EINVAL; in ad4695_read_avail()
837 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad4695_debugfs_reg_access()
839 if (regmap_check_range_table(st->regmap, reg, in ad4695_debugfs_reg_access()
841 return regmap_read(st->regmap, reg, readval); in ad4695_debugfs_reg_access()
842 if (regmap_check_range_table(st->regmap16, reg, in ad4695_debugfs_reg_access()
844 return regmap_read(st->regmap16, reg, readval); in ad4695_debugfs_reg_access()
846 if (regmap_check_range_table(st->regmap, reg, in ad4695_debugfs_reg_access()
848 return regmap_write(st->regmap, reg, writeval); in ad4695_debugfs_reg_access()
849 if (regmap_check_range_table(st->regmap16, reg, in ad4695_debugfs_reg_access()
851 return regmap_write(st->regmap16, reg, writeval); in ad4695_debugfs_reg_access()
855 return -EINVAL; in ad4695_debugfs_reg_access()
867 struct device *dev = &st->spi->dev; in ad4695_parse_channel_cfg()
873 for (i = 0; i < st->chip_info->num_voltage_inputs; i++) { in ad4695_parse_channel_cfg()
874 chan_cfg = &st->channels_cfg[i]; in ad4695_parse_channel_cfg()
875 iio_chan = &st->iio_chan[i]; in ad4695_parse_channel_cfg()
877 chan_cfg->highz_en = true; in ad4695_parse_channel_cfg()
878 chan_cfg->channel = i; in ad4695_parse_channel_cfg()
881 iio_chan->channel = i; in ad4695_parse_channel_cfg()
882 iio_chan->scan_index = i; in ad4695_parse_channel_cfg()
883 iio_chan->address = AD4695_CMD_VOLTAGE_CHAN(i); in ad4695_parse_channel_cfg()
896 if (reg >= st->chip_info->num_voltage_inputs) in ad4695_parse_channel_cfg()
897 return dev_err_probe(dev, -EINVAL, in ad4695_parse_channel_cfg()
901 iio_chan = &st->iio_chan[reg]; in ad4695_parse_channel_cfg()
902 chan_cfg = &st->channels_cfg[reg]; in ad4695_parse_channel_cfg()
904 chan_cfg->highz_en = in ad4695_parse_channel_cfg()
905 !fwnode_property_read_bool(child, "adi,no-high-z"); in ad4695_parse_channel_cfg()
906 chan_cfg->bipolar = fwnode_property_read_bool(child, "bipolar"); in ad4695_parse_channel_cfg()
908 ret = fwnode_property_read_u32(child, "common-mode-channel", in ad4695_parse_channel_cfg()
910 if (ret && ret != -EINVAL) in ad4695_parse_channel_cfg()
912 "failed to read common-mode-channel (%s)\n", in ad4695_parse_channel_cfg()
915 if (ret == -EINVAL || val == AD4695_COMMON_MODE_REFGND) in ad4695_parse_channel_cfg()
916 chan_cfg->pin_pairing = AD4695_IN_PAIR_REFGND; in ad4695_parse_channel_cfg()
918 chan_cfg->pin_pairing = AD4695_IN_PAIR_COM; in ad4695_parse_channel_cfg()
920 chan_cfg->pin_pairing = AD4695_IN_PAIR_EVEN_ODD; in ad4695_parse_channel_cfg()
922 if (chan_cfg->pin_pairing == AD4695_IN_PAIR_EVEN_ODD && in ad4695_parse_channel_cfg()
924 return dev_err_probe(dev, -EINVAL, in ad4695_parse_channel_cfg()
925 "common-mode-channel must be odd number (%s)\n", in ad4695_parse_channel_cfg()
928 if (chan_cfg->pin_pairing == AD4695_IN_PAIR_EVEN_ODD && in ad4695_parse_channel_cfg()
930 return dev_err_probe(dev, -EINVAL, in ad4695_parse_channel_cfg()
931 "common-mode-channel must be next consecutive channel (%s)\n", in ad4695_parse_channel_cfg()
934 if (chan_cfg->pin_pairing == AD4695_IN_PAIR_EVEN_ODD) { in ad4695_parse_channel_cfg()
945 chan_cfg->common_mode_mv = ret / 1000; in ad4695_parse_channel_cfg()
948 if (chan_cfg->bipolar && in ad4695_parse_channel_cfg()
949 chan_cfg->pin_pairing == AD4695_IN_PAIR_REFGND) in ad4695_parse_channel_cfg()
950 return dev_err_probe(dev, -EINVAL, in ad4695_parse_channel_cfg()
954 if (chan_cfg->bipolar) in ad4695_parse_channel_cfg()
955 iio_chan->scan_type.sign = 's'; in ad4695_parse_channel_cfg()
963 st->iio_chan[i] = ad4695_temp_channel_template; in ad4695_parse_channel_cfg()
964 st->iio_chan[i].scan_index = i; in ad4695_parse_channel_cfg()
967 st->iio_chan[i] = ad4695_soft_timestamp_channel_template; in ad4695_parse_channel_cfg()
968 st->iio_chan[i].scan_index = i; in ad4695_parse_channel_cfg()
975 struct device *dev = &spi->dev; in ad4695_probe()
990 return dev_err_probe(dev, -ENODEV, in ad4695_probe()
995 return -ENOMEM; in ad4695_probe()
998 st->spi = spi; in ad4695_probe()
1000 st->chip_info = spi_get_device_match_data(spi); in ad4695_probe()
1001 if (!st->chip_info) in ad4695_probe()
1002 return -EINVAL; in ad4695_probe()
1005 spi->max_speed_hz = AD4695_REG_ACCESS_SCLK_HZ; in ad4695_probe()
1007 st->regmap = devm_regmap_init_spi(spi, &ad4695_regmap_config); in ad4695_probe()
1008 if (IS_ERR(st->regmap)) in ad4695_probe()
1009 return dev_err_probe(dev, PTR_ERR(st->regmap), in ad4695_probe()
1012 st->regmap16 = devm_regmap_init_spi(spi, &ad4695_regmap16_config); in ad4695_probe()
1013 if (IS_ERR(st->regmap16)) in ad4695_probe()
1014 return dev_err_probe(dev, PTR_ERR(st->regmap16), in ad4695_probe()
1025 ret = devm_regulator_get_enable_optional(dev, "ldo-in"); in ad4695_probe()
1026 if (ret < 0 && ret != -ENODEV) in ad4695_probe()
1033 /* Otherwise we need an external VDD supply. */ in ad4695_probe()
1042 if (ret < 0 && ret != -ENODEV) in ad4695_probe()
1045 if (ret != -ENODEV) { in ad4695_probe()
1046 st->vref_mv = ret / 1000; in ad4695_probe()
1049 /* Otherwise, we need an external reference. */ in ad4695_probe()
1055 st->vref_mv = ret / 1000; in ad4695_probe()
1060 if (ret < 0 && ret != -ENODEV) in ad4695_probe()
1063 st->com_mv = ret == -ENODEV ? 0 : ret / 1000; in ad4695_probe()
1070 st->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); in ad4695_probe()
1071 if (IS_ERR(st->reset_gpio)) in ad4695_probe()
1072 return PTR_ERR(st->reset_gpio); in ad4695_probe()
1074 if (st->reset_gpio) { in ad4695_probe()
1075 gpiod_set_value(st->reset_gpio, 0); in ad4695_probe()
1078 ret = regmap_write(st->regmap, AD4695_REG_SPI_CONFIG_A, in ad4695_probe()
1087 ret = regmap_set_bits(st->regmap, AD4695_REG_SPI_CONFIG_A, in ad4695_probe()
1093 ret = regmap_update_bits(st->regmap, AD4695_REG_SETUP, in ad4695_probe()
1102 if (device_property_present(dev, "adi,no-ref-current-limit")) { in ad4695_probe()
1103 ret = regmap_set_bits(st->regmap, AD4695_REG_REF_CTRL, in ad4695_probe()
1109 if (device_property_present(dev, "adi,no-ref-high-z")) { in ad4695_probe()
1111 return dev_err_probe(dev, -EINVAL, in ad4695_probe()
1112 "Cannot disable high-Z mode for internal reference buffer\n"); in ad4695_probe()
1114 ret = regmap_clear_bits(st->regmap, AD4695_REG_REF_CTRL, in ad4695_probe()
1120 ret = ad4695_set_ref_voltage(st, st->vref_mv); in ad4695_probe()
1125 ret = regmap_set_bits(st->regmap, AD4695_REG_REF_CTRL, in ad4695_probe()
1138 indio_dev->name = st->chip_info->name; in ad4695_probe()
1139 indio_dev->info = &ad4695_info; in ad4695_probe()
1140 indio_dev->modes = INDIO_DIRECT_MODE; in ad4695_probe()
1141 indio_dev->channels = st->iio_chan; in ad4695_probe()
1142 indio_dev->num_channels = st->chip_info->num_voltage_inputs + 2; in ad4695_probe()
1184 MODULE_DESCRIPTION("Analog Devices AD4695 ADC driver");