Lines Matching refs:xfer

375 	struct dw_i3c_xfer *xfer;
377 	xfer = kzalloc(struct_size(xfer, cmds, ncmds), GFP_KERNEL);
378 	if (!xfer)
381 	INIT_LIST_HEAD(&xfer->node);
382 	xfer->ncmds = ncmds;
383 	xfer->ret = -ETIMEDOUT;
385 	return xfer;
388 static void dw_i3c_master_free_xfer(struct dw_i3c_xfer *xfer)
390 	kfree(xfer);
395 	struct dw_i3c_xfer *xfer = master->xferqueue.cur;
399 	if (!xfer)
402 	for (i = 0; i < xfer->ncmds; i++) {
403 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
410 	thld_ctrl |= QUEUE_THLD_CTRL_RESP_BUF(xfer->ncmds);
413 	for (i = 0; i < xfer->ncmds; i++) {
414 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
422 				       struct dw_i3c_xfer *xfer)
426 	init_completion(&xfer->comp);
429 		list_add_tail(&xfer->node, &master->xferqueue.list);
431 		master->xferqueue.cur = xfer;
438 					      struct dw_i3c_xfer *xfer)
440 	if (master->xferqueue.cur == xfer) {
452 		list_del_init(&xfer->node);
457 				       struct dw_i3c_xfer *xfer)
462 	dw_i3c_master_dequeue_xfer_locked(master, xfer);
468 	struct dw_i3c_xfer *xfer = master->xferqueue.cur;
472 	if (!xfer)
484 		cmd = &xfer->cmds[RESPONSE_PORT_TID(resp)];
493 		switch (xfer->cmds[i].error) {
514 	xfer->ret = ret;
515 	complete(&xfer->comp);
518 		dw_i3c_master_dequeue_xfer_locked(master, xfer);
523 	xfer = list_first_entry_or_null(&master->xferqueue.list,
526 	if (xfer)
527 		list_del_init(&xfer->node);
529 	master->xferqueue.cur = xfer;
717 	struct dw_i3c_xfer *xfer;
727 	xfer = dw_i3c_master_alloc_xfer(master, 1);
728 	if (!xfer)
731 	cmd = xfer->cmds;
744 	dw_i3c_master_enqueue_xfer(master, xfer);
745 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
746 		dw_i3c_master_dequeue_xfer(master, xfer);
748 	ret = xfer->ret;
749 	if (xfer->cmds[0].error == RESPONSE_ERROR_IBA_NACK)
752 	dw_i3c_master_free_xfer(xfer);
759 	struct dw_i3c_xfer *xfer;
767 	xfer = dw_i3c_master_alloc_xfer(master, 1);
768 	if (!xfer)
771 	cmd = xfer->cmds;
785 	dw_i3c_master_enqueue_xfer(master, xfer);
786 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
787 		dw_i3c_master_dequeue_xfer(master, xfer);
789 	ret = xfer->ret;
790 	if (xfer->cmds[0].error == RESPONSE_ERROR_IBA_NACK)
792 	dw_i3c_master_free_xfer(xfer);
840 	struct dw_i3c_xfer *xfer;
879 	xfer = dw_i3c_master_alloc_xfer(master, 1);
880 	if (!xfer) {
887 		dw_i3c_master_free_xfer(xfer);
891 	cmd = &xfer->cmds[0];
900 	dw_i3c_master_enqueue_xfer(master, xfer);
901 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
902 		dw_i3c_master_dequeue_xfer(master, xfer);
912 	dw_i3c_master_free_xfer(xfer);
928 	struct dw_i3c_xfer *xfer;
948 	xfer = dw_i3c_master_alloc_xfer(master, i3c_nxfers);
949 	if (!xfer)
961 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
987 	dw_i3c_master_enqueue_xfer(master, xfer);
988 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
989 		dw_i3c_master_dequeue_xfer(master, xfer);
992 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
998 	ret = xfer->ret;
999 	dw_i3c_master_free_xfer(xfer);
1089 	struct dw_i3c_xfer *xfer;
1109 	xfer = dw_i3c_master_alloc_xfer(master, i2c_nxfers);
1110 	if (!xfer)
1122 		struct dw_i3c_cmd *cmd = &xfer->cmds[i];
1144 	dw_i3c_master_enqueue_xfer(master, xfer);
1145 	if (!wait_for_completion_timeout(&xfer->comp, XFER_TIMEOUT))
1146 		dw_i3c_master_dequeue_xfer(master, xfer);
1148 	ret = xfer->ret;
1149 	dw_i3c_master_free_xfer(xfer);