Lines Matching +full:tegra210 +full:- +full:vi
1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/i2c/busses/i2c-tegra.c
14 #include <linux/dma-mapping.h>
51 #define I2C_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 5)
52 #define I2C_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 2)
130 #define I2C_MST_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 4)
131 #define I2C_MST_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 16)
154 * @MSG_END_REPEAT_START: Send repeat-start.
155 * @MSG_END_CONTINUE: Don't send stop or repeat-start.
165 * @has_continue_xfer_support: continue-transfer supported
180 * @has_multi_master_mode: The I2C controller supports running in single-master
181 * or multi-master mode.
194 * @tlow_fast_fastplus_mode: Low period of the clock in fast/fast-plus modes.
195 * @thigh_fast_fastplus_mode: High period of the clock in fast/fast-plus modes.
199 * conditions in fast/fast-plus modes.
230 * struct tegra_i2c_dev - per device I2C context
243 * @is_vi: identifies the VI I2C controller, has a different register layout
251 * @multimaster_mode: indicates that I2C controller is in multi-master mode
300 #define IS_DVC(dev) (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && (dev)->is_dvc)
301 #define IS_VI(dev) (IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) && (dev)->is_vi)
306 writel_relaxed(val, i2c_dev->base + reg); in dvc_writel()
311 return readl_relaxed(i2c_dev->base + reg); in dvc_readl()
330 writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
334 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
336 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, I2C_INT_STATUS)); in i2c_writel()
341 return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_readl()
347 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_writesl()
356 * VI I2C controller has known hardware bug where writes get stuck in i2c_writesl_vi()
361 while (len--) in i2c_writesl_vi()
368 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_readsl()
391 complete(&i2c_dev->dma_complete); in tegra_i2c_dma_complete()
399 dev_dbg(i2c_dev->dev, "starting DMA for length: %zu\n", len); in tegra_i2c_dma_submit()
401 reinit_completion(&i2c_dev->dma_complete); in tegra_i2c_dma_submit()
403 dir = i2c_dev->msg_read ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; in tegra_i2c_dma_submit()
405 dma_desc = dmaengine_prep_slave_single(i2c_dev->dma_chan, i2c_dev->dma_phys, in tegra_i2c_dma_submit()
409 dev_err(i2c_dev->dev, "failed to get %s DMA descriptor\n", in tegra_i2c_dma_submit()
410 i2c_dev->msg_read ? "RX" : "TX"); in tegra_i2c_dma_submit()
411 return -EINVAL; in tegra_i2c_dma_submit()
414 dma_desc->callback = tegra_i2c_dma_complete; in tegra_i2c_dma_submit()
415 dma_desc->callback_param = i2c_dev; in tegra_i2c_dma_submit()
418 dma_async_issue_pending(i2c_dev->dma_chan); in tegra_i2c_dma_submit()
425 if (i2c_dev->dma_buf) { in tegra_i2c_release_dma()
426 dma_free_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size, in tegra_i2c_release_dma()
427 i2c_dev->dma_buf, i2c_dev->dma_phys); in tegra_i2c_release_dma()
428 i2c_dev->dma_buf = NULL; in tegra_i2c_release_dma()
431 if (i2c_dev->dma_chan) { in tegra_i2c_release_dma()
432 dma_release_channel(i2c_dev->dma_chan); in tegra_i2c_release_dma()
433 i2c_dev->dma_chan = NULL; in tegra_i2c_release_dma()
446 if (i2c_dev->hw->has_apb_dma) { in tegra_i2c_init_dma()
448 dev_dbg(i2c_dev->dev, "APB DMA support not enabled\n"); in tegra_i2c_init_dma()
452 dev_dbg(i2c_dev->dev, "GPC DMA support not enabled\n"); in tegra_i2c_init_dma()
461 i2c_dev->dma_chan = dma_request_chan(i2c_dev->dev, "tx"); in tegra_i2c_init_dma()
462 if (IS_ERR(i2c_dev->dma_chan)) { in tegra_i2c_init_dma()
463 err = PTR_ERR(i2c_dev->dma_chan); in tegra_i2c_init_dma()
464 i2c_dev->dma_chan = NULL; in tegra_i2c_init_dma()
468 i2c_dev->dma_dev = i2c_dev->dma_chan->device->dev; in tegra_i2c_init_dma()
469 i2c_dev->dma_buf_size = i2c_dev->hw->quirks->max_write_len + in tegra_i2c_init_dma()
472 dma_buf = dma_alloc_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size, in tegra_i2c_init_dma()
475 dev_err(i2c_dev->dev, "failed to allocate DMA buffer\n"); in tegra_i2c_init_dma()
476 err = -ENOMEM; in tegra_i2c_init_dma()
480 i2c_dev->dma_buf = dma_buf; in tegra_i2c_init_dma()
481 i2c_dev->dma_phys = dma_phys; in tegra_i2c_init_dma()
487 if (err != -EPROBE_DEFER) { in tegra_i2c_init_dma()
488 dev_err(i2c_dev->dev, "cannot use DMA: %d\n", err); in tegra_i2c_init_dma()
489 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_init_dma()
550 void __iomem *addr = i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg); in tegra_i2c_poll_register()
553 if (!i2c_dev->atomic_mode) in tegra_i2c_poll_register()
566 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_flush_fifos()
582 dev_err(i2c_dev->dev, "failed to flush FIFO\n"); in tegra_i2c_flush_fifos()
593 if (!i2c_dev->hw->has_config_load_reg) in tegra_i2c_wait_for_config_load()
601 dev_err(i2c_dev->dev, "failed to load config\n"); in tegra_i2c_wait_for_config_load()
611 struct i2c_timings *t = &i2c_dev->timings; in tegra_i2c_init()
622 err = device_reset(i2c_dev->dev); in tegra_i2c_init()
631 if (i2c_dev->hw->has_multi_master_mode) in tegra_i2c_init()
640 switch (t->bus_freq_hz) { in tegra_i2c_init()
643 tlow = i2c_dev->hw->tlow_fast_fastplus_mode; in tegra_i2c_init()
644 thigh = i2c_dev->hw->thigh_fast_fastplus_mode; in tegra_i2c_init()
645 tsu_thd = i2c_dev->hw->setup_hold_time_fast_fast_plus_mode; in tegra_i2c_init()
647 if (t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) in tegra_i2c_init()
648 non_hs_mode = i2c_dev->hw->clk_divisor_fast_plus_mode; in tegra_i2c_init()
650 non_hs_mode = i2c_dev->hw->clk_divisor_fast_mode; in tegra_i2c_init()
654 tlow = i2c_dev->hw->tlow_std_mode; in tegra_i2c_init()
655 thigh = i2c_dev->hw->thigh_std_mode; in tegra_i2c_init()
656 tsu_thd = i2c_dev->hw->setup_hold_time_std_mode; in tegra_i2c_init()
657 non_hs_mode = i2c_dev->hw->clk_divisor_std_mode; in tegra_i2c_init()
663 i2c_dev->hw->clk_divisor_hs_mode) | in tegra_i2c_init()
667 if (i2c_dev->hw->has_interface_timing_reg) { in tegra_i2c_init()
674 * Configure setup and hold times only when tsu_thd is non-zero. in tegra_i2c_init()
677 if (i2c_dev->hw->has_interface_timing_reg && tsu_thd) in tegra_i2c_init()
682 err = clk_set_rate(i2c_dev->div_clk, in tegra_i2c_init()
683 t->bus_freq_hz * clk_multiplier); in tegra_i2c_init()
685 dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err); in tegra_i2c_init()
702 if (i2c_dev->multimaster_mode && i2c_dev->hw->has_slcg_override_reg) in tegra_i2c_init()
722 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->timings.bus_freq_hz)); in tegra_i2c_disable_packet_mode()
733 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_empty_rx_fifo()
735 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_empty_rx_fifo()
742 if (WARN_ON_ONCE(!(i2c_dev->msg_buf_remaining))) in tegra_i2c_empty_rx_fifo()
743 return -EINVAL; in tegra_i2c_empty_rx_fifo()
745 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_empty_rx_fifo()
761 buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD; in tegra_i2c_empty_rx_fifo()
762 rx_fifo_avail -= words_to_transfer; in tegra_i2c_empty_rx_fifo()
778 rx_fifo_avail--; in tegra_i2c_empty_rx_fifo()
783 return -EINVAL; in tegra_i2c_empty_rx_fifo()
785 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_empty_rx_fifo()
786 i2c_dev->msg_buf = buf; in tegra_i2c_empty_rx_fifo()
793 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_fill_tx_fifo()
795 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_fill_tx_fifo()
798 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_fill_tx_fifo()
826 buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD; in tegra_i2c_fill_tx_fifo()
827 tx_fifo_avail -= words_to_transfer; in tegra_i2c_fill_tx_fifo()
829 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_fill_tx_fifo()
830 i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD; in tegra_i2c_fill_tx_fifo()
849 * in this function for non-zero words_to_transfer. in tegra_i2c_fill_tx_fifo()
854 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_fill_tx_fifo()
855 i2c_dev->msg_buf = NULL; in tegra_i2c_fill_tx_fifo()
872 dev_warn(i2c_dev->dev, "IRQ status 0 %08x %08x %08x\n", in tegra_i2c_isr()
876 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
883 i2c_dev->msg_err |= I2C_ERR_NO_ACK; in tegra_i2c_isr()
885 i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST; in tegra_i2c_isr()
893 if (i2c_dev->hw->supports_bus_clear && (status & I2C_INT_BUS_CLR_DONE)) in tegra_i2c_isr()
896 if (!i2c_dev->dma_mode) { in tegra_i2c_isr()
897 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
904 i2c_dev->msg_err |= I2C_ERR_RX_BUFFER_OVERFLOW; in tegra_i2c_isr()
909 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
910 if (i2c_dev->msg_buf_remaining) in tegra_i2c_isr()
931 if (i2c_dev->dma_mode) in tegra_i2c_isr()
932 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_isr()
937 if (WARN_ON_ONCE(i2c_dev->msg_buf_remaining)) { in tegra_i2c_isr()
938 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
941 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
953 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_isr()
961 if (i2c_dev->dma_mode) { in tegra_i2c_isr()
962 dmaengine_terminate_async(i2c_dev->dma_chan); in tegra_i2c_isr()
963 complete(&i2c_dev->dma_complete); in tegra_i2c_isr()
966 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
978 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
983 if (i2c_dev->dma_mode) { in tegra_i2c_config_fifo_trig()
991 if (i2c_dev->msg_read) { in tegra_i2c_config_fifo_trig()
994 slv_config.src_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
998 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1005 slv_config.dst_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1009 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1016 err = dmaengine_slave_config(i2c_dev->dma_chan, &slv_config); in tegra_i2c_config_fifo_trig()
1018 dev_err(i2c_dev->dev, "DMA config failed: %d\n", err); in tegra_i2c_config_fifo_trig()
1019 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_config_fifo_trig()
1022 i2c_dev->dma_mode = false; in tegra_i2c_config_fifo_trig()
1028 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1049 tegra_i2c_isr(i2c_dev->irq, i2c_dev); in tegra_i2c_poll_completion()
1070 if (i2c_dev->atomic_mode) { in tegra_i2c_wait_completion()
1073 enable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1076 disable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1101 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_issue_bus_clear()
1115 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, 50); in tegra_i2c_issue_bus_clear()
1119 dev_err(i2c_dev->dev, "failed to clear bus\n"); in tegra_i2c_issue_bus_clear()
1120 return -ETIMEDOUT; in tegra_i2c_issue_bus_clear()
1125 dev_err(i2c_dev->dev, "un-recovered arbitration lost\n"); in tegra_i2c_issue_bus_clear()
1126 return -EIO; in tegra_i2c_issue_bus_clear()
1129 return -EAGAIN; in tegra_i2c_issue_bus_clear()
1136 u32 *dma_buf = i2c_dev->dma_buf; in tegra_i2c_push_packet_header()
1142 FIELD_PREP(PACKET_HEADER0_CONT_ID, i2c_dev->cont_id) | in tegra_i2c_push_packet_header()
1145 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1150 packet_header = i2c_dev->msg_len - 1; in tegra_i2c_push_packet_header()
1152 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1164 if (msg->flags & I2C_M_TEN) { in tegra_i2c_push_packet_header()
1165 packet_header |= msg->addr; in tegra_i2c_push_packet_header()
1168 packet_header |= msg->addr << I2C_HEADER_SLAVE_ADDR_SHIFT; in tegra_i2c_push_packet_header()
1171 if (msg->flags & I2C_M_IGNORE_NAK) in tegra_i2c_push_packet_header()
1174 if (msg->flags & I2C_M_RD) in tegra_i2c_push_packet_header()
1177 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1186 if (i2c_dev->msg_err == I2C_ERR_NONE) in tegra_i2c_error_recover()
1192 if (i2c_dev->msg_err == I2C_ERR_ARBITRATION_LOST) { in tegra_i2c_error_recover()
1193 if (!i2c_dev->multimaster_mode) in tegra_i2c_error_recover()
1194 return i2c_recover_bus(&i2c_dev->adapter); in tegra_i2c_error_recover()
1196 return -EAGAIN; in tegra_i2c_error_recover()
1199 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) { in tegra_i2c_error_recover()
1200 if (msg->flags & I2C_M_IGNORE_NAK) in tegra_i2c_error_recover()
1203 return -EREMOTEIO; in tegra_i2c_error_recover()
1206 return -EIO; in tegra_i2c_error_recover()
1222 i2c_dev->msg_buf = msg->buf; in tegra_i2c_xfer_msg()
1223 i2c_dev->msg_len = msg->len; in tegra_i2c_xfer_msg()
1225 i2c_dev->msg_err = I2C_ERR_NONE; in tegra_i2c_xfer_msg()
1226 i2c_dev->msg_read = !!(msg->flags & I2C_M_RD); in tegra_i2c_xfer_msg()
1227 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_xfer_msg()
1234 if (msg->flags & I2C_M_RECV_LEN) { in tegra_i2c_xfer_msg()
1236 i2c_dev->msg_len = 1; in tegra_i2c_xfer_msg()
1238 i2c_dev->msg_buf += 1; in tegra_i2c_xfer_msg()
1239 i2c_dev->msg_len -= 1; in tegra_i2c_xfer_msg()
1243 i2c_dev->msg_buf_remaining = i2c_dev->msg_len; in tegra_i2c_xfer_msg()
1245 if (i2c_dev->msg_read) in tegra_i2c_xfer_msg()
1246 xfer_size = i2c_dev->msg_len; in tegra_i2c_xfer_msg()
1248 xfer_size = i2c_dev->msg_len + I2C_PACKET_HEADER_SIZE; in tegra_i2c_xfer_msg()
1252 i2c_dev->dma_mode = xfer_size > I2C_PIO_MODE_PREFERRED_LEN && in tegra_i2c_xfer_msg()
1253 i2c_dev->dma_buf && !i2c_dev->atomic_mode; in tegra_i2c_xfer_msg()
1262 i2c_dev->timings.bus_freq_hz); in tegra_i2c_xfer_msg()
1267 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1268 if (i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1269 dma_sync_single_for_device(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1270 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1277 dma_sync_single_for_cpu(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1278 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1285 if (!i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1286 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1287 memcpy(i2c_dev->dma_buf + I2C_PACKET_HEADER_SIZE, in tegra_i2c_xfer_msg()
1288 msg->buf, i2c_dev->msg_len); in tegra_i2c_xfer_msg()
1290 dma_sync_single_for_device(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1291 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1302 if (i2c_dev->hw->has_per_pkt_xfer_complete_irq) in tegra_i2c_xfer_msg()
1305 if (!i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1306 if (msg->flags & I2C_M_RD) in tegra_i2c_xfer_msg()
1308 else if (i2c_dev->msg_buf_remaining) in tegra_i2c_xfer_msg()
1313 dev_dbg(i2c_dev->dev, "unmasked IRQ: %02x\n", in tegra_i2c_xfer_msg()
1316 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1318 &i2c_dev->dma_complete, in tegra_i2c_xfer_msg()
1326 dmaengine_synchronize(i2c_dev->dma_chan); in tegra_i2c_xfer_msg()
1327 dmaengine_terminate_sync(i2c_dev->dma_chan); in tegra_i2c_xfer_msg()
1329 if (!time_left && !completion_done(&i2c_dev->dma_complete)) { in tegra_i2c_xfer_msg()
1331 return -ETIMEDOUT; in tegra_i2c_xfer_msg()
1334 if (i2c_dev->msg_read && i2c_dev->msg_err == I2C_ERR_NONE) { in tegra_i2c_xfer_msg()
1335 dma_sync_single_for_cpu(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1336 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1339 memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, i2c_dev->msg_len); in tegra_i2c_xfer_msg()
1343 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, in tegra_i2c_xfer_msg()
1350 return -ETIMEDOUT; in tegra_i2c_xfer_msg()
1353 dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n", in tegra_i2c_xfer_msg()
1354 time_left, completion_done(&i2c_dev->msg_complete), in tegra_i2c_xfer_msg()
1355 i2c_dev->msg_err); in tegra_i2c_xfer_msg()
1357 i2c_dev->dma_mode = false; in tegra_i2c_xfer_msg()
1372 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_xfer()
1374 dev_err(i2c_dev->dev, "runtime resume failed %d\n", ret); in tegra_i2c_xfer()
1375 pm_runtime_put_noidle(i2c_dev->dev); in tegra_i2c_xfer()
1382 if (i < (num - 1)) { in tegra_i2c_xfer()
1401 dev_dbg(i2c_dev->dev, "reading %d bytes\n", msgs[i].len); in tegra_i2c_xfer()
1408 pm_runtime_put(i2c_dev->dev); in tegra_i2c_xfer()
1419 i2c_dev->atomic_mode = true; in tegra_i2c_xfer_atomic()
1421 i2c_dev->atomic_mode = false; in tegra_i2c_xfer_atomic()
1432 if (i2c_dev->hw->has_continue_xfer_support) in tegra_i2c_func()
1448 .max_write_len = SZ_4K - I2C_PACKET_HEADER_SIZE,
1453 .max_write_len = SZ_64K - I2C_PACKET_HEADER_SIZE,
1629 { .compatible = "nvidia,tegra194-i2c", .data = &tegra194_i2c_hw, },
1630 { .compatible = "nvidia,tegra186-i2c", .data = &tegra186_i2c_hw, },
1632 { .compatible = "nvidia,tegra210-i2c-vi", .data = &tegra210_i2c_hw, },
1634 { .compatible = "nvidia,tegra210-i2c", .data = &tegra210_i2c_hw, },
1635 { .compatible = "nvidia,tegra124-i2c", .data = &tegra124_i2c_hw, },
1636 { .compatible = "nvidia,tegra114-i2c", .data = &tegra114_i2c_hw, },
1637 { .compatible = "nvidia,tegra30-i2c", .data = &tegra30_i2c_hw, },
1638 { .compatible = "nvidia,tegra20-i2c", .data = &tegra20_i2c_hw, },
1640 { .compatible = "nvidia,tegra20-i2c-dvc", .data = &tegra20_i2c_hw, },
1648 struct device_node *np = i2c_dev->dev->of_node; in tegra_i2c_parse_dt()
1651 i2c_parse_fw_timings(i2c_dev->dev, &i2c_dev->timings, true); in tegra_i2c_parse_dt()
1653 multi_mode = device_property_read_bool(i2c_dev->dev, "multi-master"); in tegra_i2c_parse_dt()
1654 i2c_dev->multimaster_mode = multi_mode; in tegra_i2c_parse_dt()
1657 of_device_is_compatible(np, "nvidia,tegra20-i2c-dvc")) in tegra_i2c_parse_dt()
1658 i2c_dev->is_dvc = true; in tegra_i2c_parse_dt()
1661 of_device_is_compatible(np, "nvidia,tegra210-i2c-vi")) in tegra_i2c_parse_dt()
1662 i2c_dev->is_vi = true; in tegra_i2c_parse_dt()
1669 if (ACPI_HANDLE(i2c_dev->dev)) in tegra_i2c_init_clocks()
1672 i2c_dev->clocks[i2c_dev->nclocks++].id = "div-clk"; in tegra_i2c_init_clocks()
1674 if (i2c_dev->hw == &tegra20_i2c_hw || i2c_dev->hw == &tegra30_i2c_hw) in tegra_i2c_init_clocks()
1675 i2c_dev->clocks[i2c_dev->nclocks++].id = "fast-clk"; in tegra_i2c_init_clocks()
1678 i2c_dev->clocks[i2c_dev->nclocks++].id = "slow"; in tegra_i2c_init_clocks()
1680 err = devm_clk_bulk_get(i2c_dev->dev, i2c_dev->nclocks, in tegra_i2c_init_clocks()
1681 i2c_dev->clocks); in tegra_i2c_init_clocks()
1685 err = clk_bulk_prepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1689 i2c_dev->div_clk = i2c_dev->clocks[0].clk; in tegra_i2c_init_clocks()
1691 if (!i2c_dev->multimaster_mode) in tegra_i2c_init_clocks()
1694 err = clk_enable(i2c_dev->div_clk); in tegra_i2c_init_clocks()
1696 dev_err(i2c_dev->dev, "failed to enable div-clk: %d\n", err); in tegra_i2c_init_clocks()
1703 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1710 if (i2c_dev->multimaster_mode) in tegra_i2c_release_clocks()
1711 clk_disable(i2c_dev->div_clk); in tegra_i2c_release_clocks()
1713 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_release_clocks()
1720 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1722 dev_err(i2c_dev->dev, "runtime resume failed: %d\n", ret); in tegra_i2c_init_hardware()
1726 pm_runtime_put_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1737 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in tegra_i2c_probe()
1739 return -ENOMEM; in tegra_i2c_probe()
1743 init_completion(&i2c_dev->msg_complete); in tegra_i2c_probe()
1744 init_completion(&i2c_dev->dma_complete); in tegra_i2c_probe()
1746 i2c_dev->hw = device_get_match_data(&pdev->dev); in tegra_i2c_probe()
1747 i2c_dev->cont_id = pdev->id; in tegra_i2c_probe()
1748 i2c_dev->dev = &pdev->dev; in tegra_i2c_probe()
1750 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in tegra_i2c_probe()
1751 if (IS_ERR(i2c_dev->base)) in tegra_i2c_probe()
1752 return PTR_ERR(i2c_dev->base); in tegra_i2c_probe()
1754 i2c_dev->base_phys = res->start; in tegra_i2c_probe()
1760 i2c_dev->irq = err; in tegra_i2c_probe()
1763 irq_set_status_flags(i2c_dev->irq, IRQ_NOAUTOEN); in tegra_i2c_probe()
1765 err = devm_request_threaded_irq(i2c_dev->dev, i2c_dev->irq, in tegra_i2c_probe()
1768 dev_name(i2c_dev->dev), i2c_dev); in tegra_i2c_probe()
1783 * VI I2C is in VE power domain which is not always ON and not in tegra_i2c_probe()
1784 * IRQ-safe. Thus, IRQ-safe device shouldn't be attached to a in tegra_i2c_probe()
1785 * non IRQ-safe domain because this prevents powering off the power in tegra_i2c_probe()
1788 * VI I2C device shouldn't be marked as IRQ-safe because VI I2C won't in tegra_i2c_probe()
1791 if (!IS_VI(i2c_dev) && !has_acpi_companion(i2c_dev->dev)) in tegra_i2c_probe()
1792 pm_runtime_irq_safe(i2c_dev->dev); in tegra_i2c_probe()
1794 pm_runtime_enable(i2c_dev->dev); in tegra_i2c_probe()
1800 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev); in tegra_i2c_probe()
1801 i2c_dev->adapter.dev.of_node = i2c_dev->dev->of_node; in tegra_i2c_probe()
1802 i2c_dev->adapter.dev.parent = i2c_dev->dev; in tegra_i2c_probe()
1803 i2c_dev->adapter.retries = 1; in tegra_i2c_probe()
1804 i2c_dev->adapter.timeout = 6 * HZ; in tegra_i2c_probe()
1805 i2c_dev->adapter.quirks = i2c_dev->hw->quirks; in tegra_i2c_probe()
1806 i2c_dev->adapter.owner = THIS_MODULE; in tegra_i2c_probe()
1807 i2c_dev->adapter.class = I2C_CLASS_DEPRECATED; in tegra_i2c_probe()
1808 i2c_dev->adapter.algo = &tegra_i2c_algo; in tegra_i2c_probe()
1809 i2c_dev->adapter.nr = pdev->id; in tegra_i2c_probe()
1810 ACPI_COMPANION_SET(&i2c_dev->adapter.dev, ACPI_COMPANION(&pdev->dev)); in tegra_i2c_probe()
1812 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_probe()
1813 i2c_dev->adapter.bus_recovery_info = &tegra_i2c_recovery_info; in tegra_i2c_probe()
1815 strscpy(i2c_dev->adapter.name, dev_name(i2c_dev->dev), in tegra_i2c_probe()
1816 sizeof(i2c_dev->adapter.name)); in tegra_i2c_probe()
1818 err = i2c_add_numbered_adapter(&i2c_dev->adapter); in tegra_i2c_probe()
1825 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_probe()
1838 i2c_del_adapter(&i2c_dev->adapter); in tegra_i2c_remove()
1839 pm_runtime_force_suspend(i2c_dev->dev); in tegra_i2c_remove()
1854 err = clk_bulk_enable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1859 * VI I2C device is attached to VE power domain which goes through in tegra_i2c_runtime_resume()
1861 * controller needs to be re-initialized after power ON. in tegra_i2c_runtime_resume()
1872 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1881 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_suspend()
1891 i2c_mark_adapter_suspended(&i2c_dev->adapter); in tegra_i2c_suspend()
1930 i2c_mark_adapter_resumed(&i2c_dev->adapter); in tegra_i2c_resume()
1953 .name = "tegra-i2c",