Lines Matching +full:stm32mp15 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32F7 I2C controller
5 * This I2C controller is described in the STM32F75xxx and STM32F74xxx Soc
14 * This driver is based on i2c-stm32f4.c
20 #include <linux/i2c.h>
21 #include <linux/i2c-smbus.h>
38 #include "i2c-stm32.h"
40 /* STM32F7 I2C registers */
52 /* STM32F7 I2C control 1 */
84 /* STM32F7 I2C control 2 */
101 /* STM32F7 I2C Own Address 1 */
114 /* STM32F7 I2C Own Address 2 */
124 /* STM32F7 I2C Interrupt Status */
143 /* STM32F7 I2C Interrupt Clear */
152 /* STM32F7 I2C Timing */
186 * struct stm32f7_i2c_regs - i2c f7 registers backup
202 * struct stm32f7_i2c_spec - private i2c specification timing
203 * @rate: I2C bus speed (Hz)
224 * struct stm32f7_i2c_setup - private I2C timing setup parameters
225 * @speed_freq: I2C speed frequency (Hz)
226 * @clock_src: I2C clock source frequency (Hz)
244 * struct stm32f7_i2c_timings - private I2C output parameters
262 * struct stm32f7_i2c_msg - client specific data
263 * @addr: 8-bit or 10-bit slave addr, including r/w bit
267 * @stop: last I2C msg to be sent, i.e. STOP to be generated
268 * @smbus: boolean to know if the I2C IP is used in SMBus mode
271 * SMBus block read and SMBus block write - block read process call protocols
274 * This buffer has to be 32-bit aligned to be compliant with memory address
290 * struct stm32f7_i2c_alert - SMBus alert specific data
291 * @setup: platform data for the smbus_alert i2c client
292 * @ara: I2C slave device used to respond to the SMBus Alert with Alert
301 * struct stm32f7_i2c_dev - private data of the controller
302 * @adap: I2C adapter for this controller
305 * @complete: completion of I2C message
306 * @clk: hw i2c clock
307 * @bus_rate: I2C clock frequency of the controller
309 * @msg_num: number of I2C messages to be executed
311 * @f7_msg: customized i2c msg for driver usage
312 * @setup: I2C timing input setup
313 * @timing: I2C computed timings
314 * @slave: list of slave devices registered on the I2C bus
316 * @backup_regs: backup of i2c controller registers (for suspend/resume)
318 * @master_mode: boolean to know in which mode the I2C is running (master or
328 * @host_notify_client: SMBus host-notify client
370 * All these values are coming from I2C Specification, Version 6.0, 4th of
374 * and Fast-mode Plus I2C-bus devices
445 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, mask); in stm32f7_i2c_disable_irq()
456 return ERR_PTR(-EINVAL); in stm32f7_get_specs()
467 setup->clock_src); in stm32f7_i2c_compute_timing()
469 setup->speed_freq); in stm32f7_i2c_compute_timing()
482 specs = stm32f7_get_specs(setup->speed_freq); in stm32f7_i2c_compute_timing()
483 if (specs == ERR_PTR(-EINVAL)) { in stm32f7_i2c_compute_timing()
484 dev_err(i2c_dev->dev, "speed out of bound {%d}\n", in stm32f7_i2c_compute_timing()
485 setup->speed_freq); in stm32f7_i2c_compute_timing()
486 return -EINVAL; in stm32f7_i2c_compute_timing()
489 if ((setup->rise_time > specs->rise_max) || in stm32f7_i2c_compute_timing()
490 (setup->fall_time > specs->fall_max)) { in stm32f7_i2c_compute_timing()
491 dev_err(i2c_dev->dev, in stm32f7_i2c_compute_timing()
493 setup->rise_time, specs->rise_max, in stm32f7_i2c_compute_timing()
494 setup->fall_time, specs->fall_max); in stm32f7_i2c_compute_timing()
495 return -EINVAL; in stm32f7_i2c_compute_timing()
498 i2c_dev->dnf = DIV_ROUND_CLOSEST(i2c_dev->dnf_dt, i2cclk); in stm32f7_i2c_compute_timing()
499 if (i2c_dev->dnf > STM32F7_I2C_DNF_MAX) { in stm32f7_i2c_compute_timing()
500 dev_err(i2c_dev->dev, in stm32f7_i2c_compute_timing()
502 i2c_dev->dnf * i2cclk, STM32F7_I2C_DNF_MAX * i2cclk); in stm32f7_i2c_compute_timing()
503 return -EINVAL; in stm32f7_i2c_compute_timing()
508 (i2c_dev->analog_filter ? in stm32f7_i2c_compute_timing()
511 (i2c_dev->analog_filter ? in stm32f7_i2c_compute_timing()
513 dnf_delay = i2c_dev->dnf * i2cclk; in stm32f7_i2c_compute_timing()
515 sdadel_min = specs->hddat_min + setup->fall_time - in stm32f7_i2c_compute_timing()
516 af_delay_min - (i2c_dev->dnf + 3) * i2cclk; in stm32f7_i2c_compute_timing()
518 sdadel_max = specs->vddat_max - setup->rise_time - in stm32f7_i2c_compute_timing()
519 af_delay_max - (i2c_dev->dnf + 4) * i2cclk; in stm32f7_i2c_compute_timing()
521 scldel_min = setup->rise_time + specs->sudat_min; in stm32f7_i2c_compute_timing()
528 dev_dbg(i2c_dev->dev, "SDADEL(min/max): %i/%i, SCLDEL(Min): %i\n", in stm32f7_i2c_compute_timing()
548 ret = -ENOMEM; in stm32f7_i2c_compute_timing()
552 v->presc = p; in stm32f7_i2c_compute_timing()
553 v->scldel = l; in stm32f7_i2c_compute_timing()
554 v->sdadel = a; in stm32f7_i2c_compute_timing()
557 list_add_tail(&v->node, in stm32f7_i2c_compute_timing()
569 dev_err(i2c_dev->dev, "no Prescaler solution\n"); in stm32f7_i2c_compute_timing()
570 ret = -EPERM; in stm32f7_i2c_compute_timing()
576 clk_max = NSEC_PER_SEC / RATE_MIN(setup->speed_freq); in stm32f7_i2c_compute_timing()
577 clk_min = NSEC_PER_SEC / setup->speed_freq; in stm32f7_i2c_compute_timing()
582 * - SCL Low Period has to be higher than SCL Clock Low Period in stm32f7_i2c_compute_timing()
583 * defined by I2C Specification. I2C Clock has to be lower than in stm32f7_i2c_compute_timing()
584 * (SCL Low Period - Analog/Digital filters) / 4. in stm32f7_i2c_compute_timing()
585 * - SCL High Period has to be lower than SCL Clock High Period in stm32f7_i2c_compute_timing()
586 * defined by I2C Specification in stm32f7_i2c_compute_timing()
587 * - I2C Clock has to be lower than SCL High Period in stm32f7_i2c_compute_timing()
590 u32 prescaler = (v->presc + 1) * i2cclk; in stm32f7_i2c_compute_timing()
595 if ((tscl_l < specs->l_min) || in stm32f7_i2c_compute_timing()
597 ((tscl_l - af_delay_min - dnf_delay) / 4))) { in stm32f7_i2c_compute_timing()
604 setup->rise_time + setup->fall_time; in stm32f7_i2c_compute_timing()
607 (tscl_h >= specs->h_min) && in stm32f7_i2c_compute_timing()
609 int clk_error = tscl - i2cbus; in stm32f7_i2c_compute_timing()
612 clk_error = -clk_error; in stm32f7_i2c_compute_timing()
616 v->scll = l; in stm32f7_i2c_compute_timing()
617 v->sclh = h; in stm32f7_i2c_compute_timing()
626 dev_err(i2c_dev->dev, "no solution at all\n"); in stm32f7_i2c_compute_timing()
627 ret = -EPERM; in stm32f7_i2c_compute_timing()
631 output->presc = s->presc; in stm32f7_i2c_compute_timing()
632 output->scldel = s->scldel; in stm32f7_i2c_compute_timing()
633 output->sdadel = s->sdadel; in stm32f7_i2c_compute_timing()
634 output->scll = s->scll; in stm32f7_i2c_compute_timing()
635 output->sclh = s->sclh; in stm32f7_i2c_compute_timing()
637 dev_dbg(i2c_dev->dev, in stm32f7_i2c_compute_timing()
639 output->presc, in stm32f7_i2c_compute_timing()
640 output->scldel, output->sdadel, in stm32f7_i2c_compute_timing()
641 output->scll, output->sclh); in stm32f7_i2c_compute_timing()
646 list_del(&v->node); in stm32f7_i2c_compute_timing()
657 while (--i) in stm32f7_get_lower_rate()
670 t->bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; in stm32f7_i2c_setup_timing()
671 t->scl_rise_ns = i2c_dev->setup.rise_time; in stm32f7_i2c_setup_timing()
672 t->scl_fall_ns = i2c_dev->setup.fall_time; in stm32f7_i2c_setup_timing()
674 i2c_parse_fw_timings(i2c_dev->dev, t, false); in stm32f7_i2c_setup_timing()
676 if (t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ) { in stm32f7_i2c_setup_timing()
677 dev_err(i2c_dev->dev, "Invalid bus speed (%i>%i)\n", in stm32f7_i2c_setup_timing()
678 t->bus_freq_hz, I2C_MAX_FAST_MODE_PLUS_FREQ); in stm32f7_i2c_setup_timing()
679 return -EINVAL; in stm32f7_i2c_setup_timing()
682 setup->speed_freq = t->bus_freq_hz; in stm32f7_i2c_setup_timing()
683 i2c_dev->setup.rise_time = t->scl_rise_ns; in stm32f7_i2c_setup_timing()
684 i2c_dev->setup.fall_time = t->scl_fall_ns; in stm32f7_i2c_setup_timing()
685 i2c_dev->dnf_dt = t->digital_filter_width_ns; in stm32f7_i2c_setup_timing()
686 setup->clock_src = clk_get_rate(i2c_dev->clk); in stm32f7_i2c_setup_timing()
688 if (!setup->clock_src) { in stm32f7_i2c_setup_timing()
689 dev_err(i2c_dev->dev, "clock rate is 0\n"); in stm32f7_i2c_setup_timing()
690 return -EINVAL; in stm32f7_i2c_setup_timing()
693 if (!of_property_read_bool(i2c_dev->dev->of_node, "i2c-digital-filter")) in stm32f7_i2c_setup_timing()
694 i2c_dev->dnf_dt = STM32F7_I2C_DNF_DEFAULT; in stm32f7_i2c_setup_timing()
698 &i2c_dev->timing); in stm32f7_i2c_setup_timing()
700 dev_err(i2c_dev->dev, in stm32f7_i2c_setup_timing()
701 "failed to compute I2C timings.\n"); in stm32f7_i2c_setup_timing()
702 if (setup->speed_freq <= I2C_MAX_STANDARD_MODE_FREQ) in stm32f7_i2c_setup_timing()
704 setup->speed_freq = in stm32f7_i2c_setup_timing()
705 stm32f7_get_lower_rate(setup->speed_freq); in stm32f7_i2c_setup_timing()
706 dev_warn(i2c_dev->dev, in stm32f7_i2c_setup_timing()
707 "downgrade I2C Speed Freq to (%i)\n", in stm32f7_i2c_setup_timing()
708 setup->speed_freq); in stm32f7_i2c_setup_timing()
713 dev_err(i2c_dev->dev, "Impossible to compute I2C timings.\n"); in stm32f7_i2c_setup_timing()
717 i2c_dev->analog_filter = of_property_read_bool(i2c_dev->dev->of_node, in stm32f7_i2c_setup_timing()
718 "i2c-analog-filter"); in stm32f7_i2c_setup_timing()
720 dev_dbg(i2c_dev->dev, "I2C Speed(%i), Clk Source(%i)\n", in stm32f7_i2c_setup_timing()
721 setup->speed_freq, setup->clock_src); in stm32f7_i2c_setup_timing()
722 dev_dbg(i2c_dev->dev, "I2C Rise(%i) and Fall(%i) Time\n", in stm32f7_i2c_setup_timing()
723 setup->rise_time, setup->fall_time); in stm32f7_i2c_setup_timing()
724 dev_dbg(i2c_dev->dev, "I2C Analog Filter(%s), DNF(%i)\n", in stm32f7_i2c_setup_timing()
725 (i2c_dev->analog_filter ? "On" : "Off"), i2c_dev->dnf); in stm32f7_i2c_setup_timing()
727 i2c_dev->bus_rate = setup->speed_freq; in stm32f7_i2c_setup_timing()
734 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_dma_req()
743 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_dma_callback()
744 struct device *dev = dma->chan_using->device->dev; in stm32f7_i2c_dma_callback()
747 dma_unmap_single(dev, dma->dma_buf, dma->dma_len, dma->dma_data_dir); in stm32f7_i2c_dma_callback()
748 complete(&dma->dma_complete); in stm32f7_i2c_dma_callback()
753 struct stm32f7_i2c_timings *t = &i2c_dev->timing; in stm32f7_i2c_hw_config()
757 timing |= STM32F7_I2C_TIMINGR_PRESC(t->presc); in stm32f7_i2c_hw_config()
758 timing |= STM32F7_I2C_TIMINGR_SCLDEL(t->scldel); in stm32f7_i2c_hw_config()
759 timing |= STM32F7_I2C_TIMINGR_SDADEL(t->sdadel); in stm32f7_i2c_hw_config()
760 timing |= STM32F7_I2C_TIMINGR_SCLH(t->sclh); in stm32f7_i2c_hw_config()
761 timing |= STM32F7_I2C_TIMINGR_SCLL(t->scll); in stm32f7_i2c_hw_config()
762 writel_relaxed(timing, i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_hw_config()
765 if (i2c_dev->analog_filter) in stm32f7_i2c_hw_config()
766 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
769 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
773 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
775 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
776 STM32F7_I2C_CR1_DNF(i2c_dev->dnf)); in stm32f7_i2c_hw_config()
778 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_hw_config()
784 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_write_tx_data()
785 void __iomem *base = i2c_dev->base; in stm32f7_i2c_write_tx_data()
787 if (f7_msg->count) { in stm32f7_i2c_write_tx_data()
788 writeb_relaxed(*f7_msg->buf++, base + STM32F7_I2C_TXDR); in stm32f7_i2c_write_tx_data()
789 f7_msg->count--; in stm32f7_i2c_write_tx_data()
795 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_read_rx_data()
796 void __iomem *base = i2c_dev->base; in stm32f7_i2c_read_rx_data()
798 if (f7_msg->count) { in stm32f7_i2c_read_rx_data()
799 *f7_msg->buf++ = readb_relaxed(base + STM32F7_I2C_RXDR); in stm32f7_i2c_read_rx_data()
800 f7_msg->count--; in stm32f7_i2c_read_rx_data()
809 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_reload()
812 if (i2c_dev->use_dma) in stm32f7_i2c_reload()
813 f7_msg->count -= STM32F7_I2C_MAX_LEN; in stm32f7_i2c_reload()
815 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
818 if (f7_msg->count > STM32F7_I2C_MAX_LEN) { in stm32f7_i2c_reload()
822 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_reload()
825 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
830 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_reload()
843 val = f7_msg->buf - sizeof(u8); in stm32f7_i2c_smbus_reload()
844 f7_msg->count = *val; in stm32f7_i2c_smbus_reload()
845 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
847 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_reload()
848 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
855 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_release_bus()
866 ret = readl_relaxed_poll_timeout(i2c_dev->base + STM32F7_I2C_ISR, in stm32f7_i2c_wait_free_bus()
873 stm32f7_i2c_release_bus(&i2c_dev->adap); in stm32f7_i2c_wait_free_bus()
875 return -EBUSY; in stm32f7_i2c_wait_free_bus()
881 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_xfer_msg()
882 void __iomem *base = i2c_dev->base; in stm32f7_i2c_xfer_msg()
886 f7_msg->addr = msg->addr; in stm32f7_i2c_xfer_msg()
887 f7_msg->buf = msg->buf; in stm32f7_i2c_xfer_msg()
888 f7_msg->count = msg->len; in stm32f7_i2c_xfer_msg()
889 f7_msg->result = 0; in stm32f7_i2c_xfer_msg()
890 f7_msg->stop = (i2c_dev->msg_id >= i2c_dev->msg_num - 1); in stm32f7_i2c_xfer_msg()
892 reinit_completion(&i2c_dev->complete); in stm32f7_i2c_xfer_msg()
899 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
904 if (msg->flags & I2C_M_TEN) { in stm32f7_i2c_xfer_msg()
906 cr2 |= STM32F7_I2C_CR2_SADD10(f7_msg->addr); in stm32f7_i2c_xfer_msg()
910 cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr); in stm32f7_i2c_xfer_msg()
915 if (f7_msg->count > STM32F7_I2C_MAX_LEN) { in stm32f7_i2c_xfer_msg()
919 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_xfer_msg()
931 i2c_dev->use_dma = false; in stm32f7_i2c_xfer_msg()
932 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN in stm32f7_i2c_xfer_msg()
933 && !i2c_dev->atomic) { in stm32f7_i2c_xfer_msg()
934 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_xfer_msg()
935 msg->flags & I2C_M_RD, in stm32f7_i2c_xfer_msg()
936 f7_msg->count, f7_msg->buf, in stm32f7_i2c_xfer_msg()
940 i2c_dev->use_dma = true; in stm32f7_i2c_xfer_msg()
942 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_xfer_msg()
945 if (!i2c_dev->use_dma) { in stm32f7_i2c_xfer_msg()
946 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
951 if (msg->flags & I2C_M_RD) in stm32f7_i2c_xfer_msg()
957 if (i2c_dev->atomic) in stm32f7_i2c_xfer_msg()
963 i2c_dev->master_mode = true; in stm32f7_i2c_xfer_msg()
974 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_xfer_msg()
975 struct device *dev = i2c_dev->dev; in stm32f7_i2c_smbus_xfer_msg()
976 void __iomem *base = i2c_dev->base; in stm32f7_i2c_smbus_xfer_msg()
980 f7_msg->result = 0; in stm32f7_i2c_smbus_xfer_msg()
981 reinit_completion(&i2c_dev->complete); in stm32f7_i2c_smbus_xfer_msg()
988 if (f7_msg->read_write) in stm32f7_i2c_smbus_xfer_msg()
993 cr2 |= STM32F7_I2C_CR2_SADD7(f7_msg->addr); in stm32f7_i2c_smbus_xfer_msg()
995 f7_msg->smbus_buf[0] = command; in stm32f7_i2c_smbus_xfer_msg()
996 switch (f7_msg->size) { in stm32f7_i2c_smbus_xfer_msg()
998 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
999 f7_msg->count = 0; in stm32f7_i2c_smbus_xfer_msg()
1002 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
1003 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
1006 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
1007 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1008 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
1011 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
1012 f7_msg->count = 2; in stm32f7_i2c_smbus_xfer_msg()
1013 f7_msg->smbus_buf[1] = data->byte; in stm32f7_i2c_smbus_xfer_msg()
1017 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
1018 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1019 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
1022 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
1023 f7_msg->count = 3; in stm32f7_i2c_smbus_xfer_msg()
1024 f7_msg->smbus_buf[1] = data->word & 0xff; in stm32f7_i2c_smbus_xfer_msg()
1025 f7_msg->smbus_buf[2] = data->word >> 8; in stm32f7_i2c_smbus_xfer_msg()
1029 if (f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
1030 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1031 f7_msg->count = 1; in stm32f7_i2c_smbus_xfer_msg()
1034 f7_msg->stop = true; in stm32f7_i2c_smbus_xfer_msg()
1035 if (data->block[0] > I2C_SMBUS_BLOCK_MAX || in stm32f7_i2c_smbus_xfer_msg()
1036 !data->block[0]) { in stm32f7_i2c_smbus_xfer_msg()
1038 data->block[0]); in stm32f7_i2c_smbus_xfer_msg()
1039 return -EINVAL; in stm32f7_i2c_smbus_xfer_msg()
1041 f7_msg->count = data->block[0] + 2; in stm32f7_i2c_smbus_xfer_msg()
1042 for (i = 1; i < f7_msg->count; i++) in stm32f7_i2c_smbus_xfer_msg()
1043 f7_msg->smbus_buf[i] = data->block[i - 1]; in stm32f7_i2c_smbus_xfer_msg()
1047 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1048 f7_msg->count = 3; in stm32f7_i2c_smbus_xfer_msg()
1049 f7_msg->smbus_buf[1] = data->word & 0xff; in stm32f7_i2c_smbus_xfer_msg()
1050 f7_msg->smbus_buf[2] = data->word >> 8; in stm32f7_i2c_smbus_xfer_msg()
1052 f7_msg->read_write = I2C_SMBUS_READ; in stm32f7_i2c_smbus_xfer_msg()
1055 f7_msg->stop = false; in stm32f7_i2c_smbus_xfer_msg()
1056 if (data->block[0] > I2C_SMBUS_BLOCK_MAX - 1) { in stm32f7_i2c_smbus_xfer_msg()
1058 data->block[0]); in stm32f7_i2c_smbus_xfer_msg()
1059 return -EINVAL; in stm32f7_i2c_smbus_xfer_msg()
1061 f7_msg->count = data->block[0] + 2; in stm32f7_i2c_smbus_xfer_msg()
1062 for (i = 1; i < f7_msg->count; i++) in stm32f7_i2c_smbus_xfer_msg()
1063 f7_msg->smbus_buf[i] = data->block[i - 1]; in stm32f7_i2c_smbus_xfer_msg()
1065 f7_msg->read_write = I2C_SMBUS_READ; in stm32f7_i2c_smbus_xfer_msg()
1068 /* Rely on emulated i2c transfer (through master_xfer) */ in stm32f7_i2c_smbus_xfer_msg()
1069 return -EOPNOTSUPP; in stm32f7_i2c_smbus_xfer_msg()
1071 dev_err(dev, "Unsupported smbus protocol %d\n", f7_msg->size); in stm32f7_i2c_smbus_xfer_msg()
1072 return -EOPNOTSUPP; in stm32f7_i2c_smbus_xfer_msg()
1075 f7_msg->buf = f7_msg->smbus_buf; in stm32f7_i2c_smbus_xfer_msg()
1078 if ((flags & I2C_CLIENT_PEC) && f7_msg->size != I2C_SMBUS_QUICK) { in stm32f7_i2c_smbus_xfer_msg()
1080 if (!f7_msg->read_write) { in stm32f7_i2c_smbus_xfer_msg()
1082 f7_msg->count++; in stm32f7_i2c_smbus_xfer_msg()
1091 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_xfer_msg()
1102 i2c_dev->use_dma = false; in stm32f7_i2c_smbus_xfer_msg()
1103 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN) { in stm32f7_i2c_smbus_xfer_msg()
1104 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_smbus_xfer_msg()
1106 f7_msg->count, f7_msg->buf, in stm32f7_i2c_smbus_xfer_msg()
1110 i2c_dev->use_dma = true; in stm32f7_i2c_smbus_xfer_msg()
1112 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_smbus_xfer_msg()
1115 if (!i2c_dev->use_dma) { in stm32f7_i2c_smbus_xfer_msg()
1130 i2c_dev->master_mode = true; in stm32f7_i2c_smbus_xfer_msg()
1141 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_rep_start()
1142 void __iomem *base = i2c_dev->base; in stm32f7_i2c_smbus_rep_start()
1152 switch (f7_msg->size) { in stm32f7_i2c_smbus_rep_start()
1154 f7_msg->count = 1; in stm32f7_i2c_smbus_rep_start()
1158 f7_msg->count = 2; in stm32f7_i2c_smbus_rep_start()
1162 f7_msg->count = 1; in stm32f7_i2c_smbus_rep_start()
1167 f7_msg->buf = f7_msg->smbus_buf; in stm32f7_i2c_smbus_rep_start()
1168 f7_msg->stop = true; in stm32f7_i2c_smbus_rep_start()
1173 f7_msg->count++; in stm32f7_i2c_smbus_rep_start()
1178 cr2 |= STM32F7_I2C_CR2_NBYTES(f7_msg->count); in stm32f7_i2c_smbus_rep_start()
1194 i2c_dev->use_dma = false; in stm32f7_i2c_smbus_rep_start()
1195 if (i2c_dev->dma && f7_msg->count >= STM32F7_I2C_DMA_LEN_MIN && in stm32f7_i2c_smbus_rep_start()
1196 f7_msg->size != I2C_SMBUS_BLOCK_DATA && in stm32f7_i2c_smbus_rep_start()
1197 f7_msg->size != I2C_SMBUS_BLOCK_PROC_CALL) { in stm32f7_i2c_smbus_rep_start()
1198 ret = stm32_i2c_prep_dma_xfer(i2c_dev->dev, i2c_dev->dma, in stm32f7_i2c_smbus_rep_start()
1200 f7_msg->count, f7_msg->buf, in stm32f7_i2c_smbus_rep_start()
1205 i2c_dev->use_dma = true; in stm32f7_i2c_smbus_rep_start()
1207 dev_warn(i2c_dev->dev, "can't use DMA\n"); in stm32f7_i2c_smbus_rep_start()
1210 if (!i2c_dev->use_dma) in stm32f7_i2c_smbus_rep_start()
1225 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_check_pec()
1228 internal_pec = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR); in stm32f7_i2c_smbus_check_pec()
1230 switch (f7_msg->size) { in stm32f7_i2c_smbus_check_pec()
1233 received_pec = f7_msg->smbus_buf[1]; in stm32f7_i2c_smbus_check_pec()
1237 received_pec = f7_msg->smbus_buf[2]; in stm32f7_i2c_smbus_check_pec()
1241 count = f7_msg->smbus_buf[0]; in stm32f7_i2c_smbus_check_pec()
1242 received_pec = f7_msg->smbus_buf[count]; in stm32f7_i2c_smbus_check_pec()
1245 dev_err(i2c_dev->dev, "Unsupported smbus protocol for PEC\n"); in stm32f7_i2c_smbus_check_pec()
1246 return -EINVAL; in stm32f7_i2c_smbus_check_pec()
1250 dev_err(i2c_dev->dev, "Bad PEC 0x%02x vs. 0x%02x\n", in stm32f7_i2c_smbus_check_pec()
1252 return -EBADMSG; in stm32f7_i2c_smbus_check_pec()
1265 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_is_addr_match()
1267 * For 10-bit addr, addcode = 11110XY with in stm32f7_i2c_is_addr_match()
1271 addr = slave->addr >> 8; in stm32f7_i2c_is_addr_match()
1276 addr = slave->addr & 0x7f; in stm32f7_i2c_is_addr_match()
1286 struct i2c_client *slave = i2c_dev->slave_running; in stm32f7_i2c_slave_start()
1287 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_start()
1291 if (i2c_dev->slave_dir) { in stm32f7_i2c_slave_start()
1292 /* Notify i2c slave that new read transfer is starting */ in stm32f7_i2c_slave_start()
1296 * Disable slave TX config in case of I2C combined message in stm32f7_i2c_slave_start()
1297 * (I2C Write followed by I2C Read) in stm32f7_i2c_slave_start()
1313 /* Notify i2c slave that new write transfer is starting */ in stm32f7_i2c_slave_start()
1334 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_addr()
1338 isr = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_slave_addr()
1343 if (stm32f7_i2c_is_addr_match(i2c_dev->slave[i], addcode)) { in stm32f7_i2c_slave_addr()
1344 i2c_dev->slave_running = i2c_dev->slave[i]; in stm32f7_i2c_slave_addr()
1345 i2c_dev->slave_dir = dir; in stm32f7_i2c_slave_addr()
1347 /* Start I2C slave processing */ in stm32f7_i2c_slave_addr()
1364 if (i2c_dev->slave[i] == slave) { in stm32f7_i2c_get_slave_id()
1370 dev_err(i2c_dev->dev, "Slave 0x%x not registered\n", slave->addr); in stm32f7_i2c_get_slave_id()
1372 return -ENODEV; in stm32f7_i2c_get_slave_id()
1378 struct device *dev = i2c_dev->dev; in stm32f7_i2c_get_free_slave_id()
1383 * slave[STM32F7_SLAVE_7_10_BITS_ADDR] supports 7-bit and 10-bit slave address in stm32f7_i2c_get_free_slave_id()
1384 * slave[STM32F7_SLAVE_7_BITS_ADDR] supports 7-bit slave address only in stm32f7_i2c_get_free_slave_id()
1386 if (i2c_dev->smbus_mode && (slave->addr == 0x08)) { in stm32f7_i2c_get_free_slave_id()
1387 if (i2c_dev->slave[STM32F7_SLAVE_HOSTNOTIFY]) in stm32f7_i2c_get_free_slave_id()
1393 for (i = STM32F7_I2C_MAX_SLAVE - 1; i > STM32F7_SLAVE_HOSTNOTIFY; i--) { in stm32f7_i2c_get_free_slave_id()
1395 (slave->flags & I2C_CLIENT_TEN)) in stm32f7_i2c_get_free_slave_id()
1397 if (!i2c_dev->slave[i]) { in stm32f7_i2c_get_free_slave_id()
1404 dev_err(dev, "Slave 0x%x could not be registered\n", slave->addr); in stm32f7_i2c_get_free_slave_id()
1406 return -EINVAL; in stm32f7_i2c_get_free_slave_id()
1414 if (i2c_dev->slave[i]) in stm32f7_i2c_is_slave_registered()
1427 if (i2c_dev->slave[i]) in stm32f7_i2c_is_slave_busy()
1436 void __iomem *base = i2c_dev->base; in stm32f7_i2c_slave_isr_event()
1443 i2c_slave_event(i2c_dev->slave_running, in stm32f7_i2c_slave_isr_event()
1457 val = readb_relaxed(i2c_dev->base + STM32F7_I2C_RXDR); in stm32f7_i2c_slave_isr_event()
1458 ret = i2c_slave_event(i2c_dev->slave_running, in stm32f7_i2c_slave_isr_event()
1462 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1464 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1473 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK\n", __func__); in stm32f7_i2c_slave_isr_event()
1482 if (i2c_dev->slave_dir) { in stm32f7_i2c_slave_isr_event()
1494 /* Notify i2c slave that a STOP flag has been detected */ in stm32f7_i2c_slave_isr_event()
1495 i2c_slave_event(i2c_dev->slave_running, I2C_SLAVE_STOP, &val); in stm32f7_i2c_slave_isr_event()
1497 i2c_dev->slave_running = NULL; in stm32f7_i2c_slave_isr_event()
1509 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_handle_isr_errs()
1510 u16 addr = f7_msg->addr; in stm32f7_i2c_handle_isr_errs()
1511 void __iomem *base = i2c_dev->base; in stm32f7_i2c_handle_isr_errs()
1512 struct device *dev = i2c_dev->dev; in stm32f7_i2c_handle_isr_errs()
1513 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_handle_isr_errs()
1519 stm32f7_i2c_release_bus(&i2c_dev->adap); in stm32f7_i2c_handle_isr_errs()
1520 f7_msg->result = -EIO; in stm32f7_i2c_handle_isr_errs()
1527 f7_msg->result = -EAGAIN; in stm32f7_i2c_handle_isr_errs()
1533 f7_msg->result = -EINVAL; in stm32f7_i2c_handle_isr_errs()
1539 i2c_handle_smbus_alert(i2c_dev->alert->ara); in stm32f7_i2c_handle_isr_errs()
1543 if (!i2c_dev->slave_running) { in stm32f7_i2c_handle_isr_errs()
1554 if (i2c_dev->use_dma) { in stm32f7_i2c_handle_isr_errs()
1556 dmaengine_terminate_async(dma->chan_using); in stm32f7_i2c_handle_isr_errs()
1559 i2c_dev->master_mode = false; in stm32f7_i2c_handle_isr_errs()
1560 complete(&i2c_dev->complete); in stm32f7_i2c_handle_isr_errs()
1572 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_event()
1578 if (!i2c_dev->master_mode || in stm32f7_i2c_isr_event()
1579 (i2c_dev->setup.single_it_line && (status & STM32F7_ERR_EVENTS))) in stm32f7_i2c_isr_event()
1602 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_isr_event_thread()
1603 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_isr_event_thread()
1604 void __iomem *base = i2c_dev->base; in stm32f7_i2c_isr_event_thread()
1608 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_event_thread()
1610 if (!i2c_dev->master_mode) in stm32f7_i2c_isr_event_thread()
1614 if (i2c_dev->setup.single_it_line && (status & STM32F7_ERR_EVENTS)) in stm32f7_i2c_isr_event_thread()
1619 dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n", in stm32f7_i2c_isr_event_thread()
1620 __func__, f7_msg->addr); in stm32f7_i2c_isr_event_thread()
1622 if (i2c_dev->use_dma) { in stm32f7_i2c_isr_event_thread()
1624 dmaengine_terminate_async(dma->chan_using); in stm32f7_i2c_isr_event_thread()
1626 f7_msg->result = -ENXIO; in stm32f7_i2c_isr_event_thread()
1630 if (f7_msg->smbus) in stm32f7_i2c_isr_event_thread()
1639 if (i2c_dev->use_dma && !f7_msg->result) { in stm32f7_i2c_isr_event_thread()
1640 ret = wait_for_completion_timeout(&i2c_dev->dma->dma_complete, HZ); in stm32f7_i2c_isr_event_thread()
1642 dev_dbg(i2c_dev->dev, "<%s>: Timed out\n", __func__); in stm32f7_i2c_isr_event_thread()
1644 dmaengine_terminate_async(dma->chan_using); in stm32f7_i2c_isr_event_thread()
1645 f7_msg->result = -ETIMEDOUT; in stm32f7_i2c_isr_event_thread()
1648 if (f7_msg->stop) { in stm32f7_i2c_isr_event_thread()
1651 } else if (f7_msg->smbus) { in stm32f7_i2c_isr_event_thread()
1654 i2c_dev->msg_id++; in stm32f7_i2c_isr_event_thread()
1655 i2c_dev->msg++; in stm32f7_i2c_isr_event_thread()
1656 stm32f7_i2c_xfer_msg(i2c_dev, i2c_dev->msg); in stm32f7_i2c_isr_event_thread()
1672 i2c_dev->master_mode = false; in stm32f7_i2c_isr_event_thread()
1673 complete(&i2c_dev->complete); in stm32f7_i2c_isr_event_thread()
1684 status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_isr_error_thread()
1691 ktime_t timeout = ktime_add_ms(ktime_get(), i2c_dev->adap.timeout); in stm32f7_i2c_wait_polling()
1697 if (completion_done(&i2c_dev->complete)) in stm32f7_i2c_wait_polling()
1708 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_xfer_core()
1709 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_xfer_core()
1713 i2c_dev->msg = msgs; in stm32f7_i2c_xfer_core()
1714 i2c_dev->msg_num = num; in stm32f7_i2c_xfer_core()
1715 i2c_dev->msg_id = 0; in stm32f7_i2c_xfer_core()
1716 f7_msg->smbus = false; in stm32f7_i2c_xfer_core()
1718 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_xfer_core()
1728 if (!i2c_dev->atomic) in stm32f7_i2c_xfer_core()
1729 time_left = wait_for_completion_timeout(&i2c_dev->complete, in stm32f7_i2c_xfer_core()
1730 i2c_dev->adap.timeout); in stm32f7_i2c_xfer_core()
1734 ret = f7_msg->result; in stm32f7_i2c_xfer_core()
1736 if (i2c_dev->use_dma) in stm32f7_i2c_xfer_core()
1737 dmaengine_synchronize(dma->chan_using); in stm32f7_i2c_xfer_core()
1745 i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_xfer_core()
1750 dev_dbg(i2c_dev->dev, "Access to slave 0x%x timed out\n", in stm32f7_i2c_xfer_core()
1751 i2c_dev->msg->addr); in stm32f7_i2c_xfer_core()
1752 if (i2c_dev->use_dma) in stm32f7_i2c_xfer_core()
1753 dmaengine_terminate_sync(dma->chan_using); in stm32f7_i2c_xfer_core()
1755 ret = -ETIMEDOUT; in stm32f7_i2c_xfer_core()
1759 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_xfer_core()
1760 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_xfer_core()
1770 i2c_dev->atomic = false; in stm32f7_i2c_xfer()
1779 i2c_dev->atomic = true; in stm32f7_i2c_xfer_atomic()
1789 struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; in stm32f7_i2c_smbus_xfer()
1790 struct stm32_i2c_dma *dma = i2c_dev->dma; in stm32f7_i2c_smbus_xfer()
1791 struct device *dev = i2c_dev->dev; in stm32f7_i2c_smbus_xfer()
1795 f7_msg->addr = addr; in stm32f7_i2c_smbus_xfer()
1796 f7_msg->size = size; in stm32f7_i2c_smbus_xfer()
1797 f7_msg->read_write = read_write; in stm32f7_i2c_smbus_xfer()
1798 f7_msg->smbus = true; in stm32f7_i2c_smbus_xfer()
1812 time_left = wait_for_completion_timeout(&i2c_dev->complete, in stm32f7_i2c_smbus_xfer()
1813 i2c_dev->adap.timeout); in stm32f7_i2c_smbus_xfer()
1814 ret = f7_msg->result; in stm32f7_i2c_smbus_xfer()
1816 if (i2c_dev->use_dma) in stm32f7_i2c_smbus_xfer()
1817 dmaengine_synchronize(dma->chan_using); in stm32f7_i2c_smbus_xfer()
1825 i2c_dev->base + STM32F7_I2C_ISR); in stm32f7_i2c_smbus_xfer()
1830 dev_dbg(dev, "Access to slave 0x%x timed out\n", f7_msg->addr); in stm32f7_i2c_smbus_xfer()
1831 if (i2c_dev->use_dma) in stm32f7_i2c_smbus_xfer()
1832 dmaengine_terminate_sync(dma->chan_using); in stm32f7_i2c_smbus_xfer()
1834 ret = -ETIMEDOUT; in stm32f7_i2c_smbus_xfer()
1849 data->byte = f7_msg->smbus_buf[0]; in stm32f7_i2c_smbus_xfer()
1853 data->word = f7_msg->smbus_buf[0] | in stm32f7_i2c_smbus_xfer()
1854 (f7_msg->smbus_buf[1] << 8); in stm32f7_i2c_smbus_xfer()
1858 for (i = 0; i <= f7_msg->smbus_buf[0]; i++) in stm32f7_i2c_smbus_xfer()
1859 data->block[i] = f7_msg->smbus_buf[i]; in stm32f7_i2c_smbus_xfer()
1863 ret = -EINVAL; in stm32f7_i2c_smbus_xfer()
1876 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_wakeup()
1879 if (!i2c_dev->wakeup_src) in stm32f7_i2c_enable_wakeup()
1883 device_set_wakeup_enable(i2c_dev->dev, true); in stm32f7_i2c_enable_wakeup()
1886 device_set_wakeup_enable(i2c_dev->dev, false); in stm32f7_i2c_enable_wakeup()
1893 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter); in stm32f7_i2c_reg_slave()
1894 void __iomem *base = i2c_dev->base; in stm32f7_i2c_reg_slave()
1895 struct device *dev = i2c_dev->dev; in stm32f7_i2c_reg_slave()
1899 if (slave->flags & I2C_CLIENT_PEC) { in stm32f7_i2c_reg_slave()
1901 return -EINVAL; in stm32f7_i2c_reg_slave()
1906 return -EBUSY; in stm32f7_i2c_reg_slave()
1923 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1928 oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_reg_slave()
1930 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_reg_slave()
1931 oar1 |= STM32F7_I2C_OAR1_OA1_10(slave->addr); in stm32f7_i2c_reg_slave()
1934 oar1 |= STM32F7_I2C_OAR1_OA1_7(slave->addr); in stm32f7_i2c_reg_slave()
1937 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1938 writel_relaxed(oar1, i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_reg_slave()
1943 oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_reg_slave()
1945 if (slave->flags & I2C_CLIENT_TEN) { in stm32f7_i2c_reg_slave()
1946 ret = -EOPNOTSUPP; in stm32f7_i2c_reg_slave()
1950 oar2 |= STM32F7_I2C_OAR2_OA2_7(slave->addr); in stm32f7_i2c_reg_slave()
1952 i2c_dev->slave[id] = slave; in stm32f7_i2c_reg_slave()
1953 writel_relaxed(oar2, i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_reg_slave()
1957 dev_err(dev, "I2C slave id not supported\n"); in stm32f7_i2c_reg_slave()
1958 ret = -ENODEV; in stm32f7_i2c_reg_slave()
1965 /* Enable Address match interrupt, error interrupt and enable I2C */ in stm32f7_i2c_reg_slave()
1983 struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter); in stm32f7_i2c_unreg_slave()
1984 void __iomem *base = i2c_dev->base; in stm32f7_i2c_unreg_slave()
1992 WARN_ON(!i2c_dev->slave[id]); in stm32f7_i2c_unreg_slave()
1994 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
2006 i2c_dev->slave[id] = NULL; in stm32f7_i2c_unreg_slave()
2013 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
2014 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_unreg_slave()
2024 if (i2c_dev->bus_rate <= I2C_MAX_FAST_MODE_FREQ || in stm32f7_i2c_write_fm_plus_bits()
2025 (!i2c_dev->setup.fmp_cr1_bit && IS_ERR_OR_NULL(i2c_dev->regmap))) in stm32f7_i2c_write_fm_plus_bits()
2029 if (i2c_dev->setup.fmp_cr1_bit) { in stm32f7_i2c_write_fm_plus_bits()
2031 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, STM32_I2C_CR1_FMP); in stm32f7_i2c_write_fm_plus_bits()
2033 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, STM32_I2C_CR1_FMP); in stm32f7_i2c_write_fm_plus_bits()
2035 if (i2c_dev->fmp_sreg == i2c_dev->fmp_creg) in stm32f7_i2c_write_fm_plus_bits()
2036 ret = regmap_update_bits(i2c_dev->regmap, i2c_dev->fmp_sreg, in stm32f7_i2c_write_fm_plus_bits()
2037 i2c_dev->fmp_mask, enable ? i2c_dev->fmp_mask : 0); in stm32f7_i2c_write_fm_plus_bits()
2039 ret = regmap_write(i2c_dev->regmap, in stm32f7_i2c_write_fm_plus_bits()
2040 enable ? i2c_dev->fmp_sreg : i2c_dev->fmp_creg, in stm32f7_i2c_write_fm_plus_bits()
2041 i2c_dev->fmp_mask); in stm32f7_i2c_write_fm_plus_bits()
2050 struct device_node *np = pdev->dev.of_node; in stm32f7_i2c_setup_fm_plus_bits()
2053 i2c_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg-fmp"); in stm32f7_i2c_setup_fm_plus_bits()
2054 if (IS_ERR(i2c_dev->regmap)) in stm32f7_i2c_setup_fm_plus_bits()
2058 ret = of_property_read_u32_index(np, "st,syscfg-fmp", 1, in stm32f7_i2c_setup_fm_plus_bits()
2059 &i2c_dev->fmp_sreg); in stm32f7_i2c_setup_fm_plus_bits()
2063 i2c_dev->fmp_creg = i2c_dev->fmp_sreg + in stm32f7_i2c_setup_fm_plus_bits()
2064 i2c_dev->setup.fmp_clr_offset; in stm32f7_i2c_setup_fm_plus_bits()
2066 return of_property_read_u32_index(np, "st,syscfg-fmp", 2, in stm32f7_i2c_setup_fm_plus_bits()
2067 &i2c_dev->fmp_mask); in stm32f7_i2c_setup_fm_plus_bits()
2072 struct i2c_adapter *adap = &i2c_dev->adap; in stm32f7_i2c_enable_smbus_host()
2073 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_smbus_host()
2080 i2c_dev->host_notify_client = client; in stm32f7_i2c_enable_smbus_host()
2090 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_smbus_host()
2092 if (i2c_dev->host_notify_client) { in stm32f7_i2c_disable_smbus_host()
2096 i2c_free_slave_host_notify_device(i2c_dev->host_notify_client); in stm32f7_i2c_disable_smbus_host()
2103 struct i2c_adapter *adap = &i2c_dev->adap; in stm32f7_i2c_enable_smbus_alert()
2104 struct device *dev = i2c_dev->dev; in stm32f7_i2c_enable_smbus_alert()
2105 void __iomem *base = i2c_dev->base; in stm32f7_i2c_enable_smbus_alert()
2109 return -ENOMEM; in stm32f7_i2c_enable_smbus_alert()
2111 alert->ara = i2c_new_smbus_alert_device(adap, &alert->setup); in stm32f7_i2c_enable_smbus_alert()
2112 if (IS_ERR(alert->ara)) in stm32f7_i2c_enable_smbus_alert()
2113 return PTR_ERR(alert->ara); in stm32f7_i2c_enable_smbus_alert()
2115 i2c_dev->alert = alert; in stm32f7_i2c_enable_smbus_alert()
2125 struct stm32f7_i2c_alert *alert = i2c_dev->alert; in stm32f7_i2c_disable_smbus_alert()
2126 void __iomem *base = i2c_dev->base; in stm32f7_i2c_disable_smbus_alert()
2132 i2c_unregister_device(alert->ara); in stm32f7_i2c_disable_smbus_alert()
2147 if (i2c_dev->smbus_mode) in stm32f7_i2c_func()
2172 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in stm32f7_i2c_probe()
2174 return -ENOMEM; in stm32f7_i2c_probe()
2176 setup = of_device_get_match_data(&pdev->dev); in stm32f7_i2c_probe()
2178 dev_err(&pdev->dev, "Can't get device data\n"); in stm32f7_i2c_probe()
2179 return -ENODEV; in stm32f7_i2c_probe()
2181 i2c_dev->setup = *setup; in stm32f7_i2c_probe()
2183 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in stm32f7_i2c_probe()
2184 if (IS_ERR(i2c_dev->base)) in stm32f7_i2c_probe()
2185 return PTR_ERR(i2c_dev->base); in stm32f7_i2c_probe()
2186 phy_addr = (dma_addr_t)res->start; in stm32f7_i2c_probe()
2192 i2c_dev->wakeup_src = of_property_read_bool(pdev->dev.of_node, in stm32f7_i2c_probe()
2193 "wakeup-source"); in stm32f7_i2c_probe()
2195 i2c_dev->clk = devm_clk_get_enabled(&pdev->dev, NULL); in stm32f7_i2c_probe()
2196 if (IS_ERR(i2c_dev->clk)) in stm32f7_i2c_probe()
2197 return dev_err_probe(&pdev->dev, PTR_ERR(i2c_dev->clk), in stm32f7_i2c_probe()
2200 rst = devm_reset_control_get(&pdev->dev, NULL); in stm32f7_i2c_probe()
2202 return dev_err_probe(&pdev->dev, PTR_ERR(rst), in stm32f7_i2c_probe()
2209 i2c_dev->dev = &pdev->dev; in stm32f7_i2c_probe()
2211 ret = devm_request_threaded_irq(&pdev->dev, irq_event, in stm32f7_i2c_probe()
2215 pdev->name, i2c_dev); in stm32f7_i2c_probe()
2217 return dev_err_probe(&pdev->dev, ret, "Failed to request irq event\n"); in stm32f7_i2c_probe()
2219 if (!i2c_dev->setup.single_it_line) { in stm32f7_i2c_probe()
2224 ret = devm_request_threaded_irq(&pdev->dev, irq_error, in stm32f7_i2c_probe()
2228 pdev->name, i2c_dev); in stm32f7_i2c_probe()
2230 return dev_err_probe(&pdev->dev, ret, "Failed to request irq error\n"); in stm32f7_i2c_probe()
2233 ret = stm32f7_i2c_setup_timing(i2c_dev, &i2c_dev->setup); in stm32f7_i2c_probe()
2238 if (i2c_dev->bus_rate > I2C_MAX_FAST_MODE_FREQ) { in stm32f7_i2c_probe()
2239 if (!i2c_dev->setup.fmp_cr1_bit) { in stm32f7_i2c_probe()
2250 adap = &i2c_dev->adap; in stm32f7_i2c_probe()
2252 snprintf(adap->name, sizeof(adap->name), "STM32F7 I2C(%pa)", in stm32f7_i2c_probe()
2253 &res->start); in stm32f7_i2c_probe()
2254 adap->owner = THIS_MODULE; in stm32f7_i2c_probe()
2255 adap->timeout = 2 * HZ; in stm32f7_i2c_probe()
2256 adap->retries = 3; in stm32f7_i2c_probe()
2257 adap->algo = &stm32f7_i2c_algo; in stm32f7_i2c_probe()
2258 adap->dev.parent = &pdev->dev; in stm32f7_i2c_probe()
2259 adap->dev.of_node = pdev->dev.of_node; in stm32f7_i2c_probe()
2261 init_completion(&i2c_dev->complete); in stm32f7_i2c_probe()
2264 i2c_dev->dma = stm32_i2c_dma_request(i2c_dev->dev, phy_addr, in stm32f7_i2c_probe()
2267 if (IS_ERR(i2c_dev->dma)) { in stm32f7_i2c_probe()
2268 ret = PTR_ERR(i2c_dev->dma); in stm32f7_i2c_probe()
2270 if (ret != -ENODEV) in stm32f7_i2c_probe()
2272 dev_dbg(i2c_dev->dev, "No DMA option: fallback using interrupts\n"); in stm32f7_i2c_probe()
2273 i2c_dev->dma = NULL; in stm32f7_i2c_probe()
2276 if (i2c_dev->wakeup_src) { in stm32f7_i2c_probe()
2277 device_set_wakeup_capable(i2c_dev->dev, true); in stm32f7_i2c_probe()
2279 ret = dev_pm_set_wake_irq(i2c_dev->dev, irq_event); in stm32f7_i2c_probe()
2281 dev_err(i2c_dev->dev, "Failed to set wake up irq\n"); in stm32f7_i2c_probe()
2288 pm_runtime_set_autosuspend_delay(i2c_dev->dev, in stm32f7_i2c_probe()
2290 pm_runtime_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2291 pm_runtime_set_active(i2c_dev->dev); in stm32f7_i2c_probe()
2292 pm_runtime_enable(i2c_dev->dev); in stm32f7_i2c_probe()
2294 pm_runtime_get_noresume(&pdev->dev); in stm32f7_i2c_probe()
2298 i2c_dev->smbus_mode = of_property_read_bool(pdev->dev.of_node, "smbus"); in stm32f7_i2c_probe()
2304 if (i2c_dev->smbus_mode) { in stm32f7_i2c_probe()
2307 dev_err(i2c_dev->dev, in stm32f7_i2c_probe()
2308 "failed to enable SMBus Host-Notify protocol (%d)\n", in stm32f7_i2c_probe()
2314 if (of_property_read_bool(pdev->dev.of_node, "smbus-alert")) { in stm32f7_i2c_probe()
2317 dev_err(i2c_dev->dev, in stm32f7_i2c_probe()
2324 dev_info(i2c_dev->dev, "STM32F7 I2C-%d bus adapter\n", adap->nr); in stm32f7_i2c_probe()
2326 pm_runtime_mark_last_busy(i2c_dev->dev); in stm32f7_i2c_probe()
2327 pm_runtime_put_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2338 pm_runtime_put_noidle(i2c_dev->dev); in stm32f7_i2c_probe()
2339 pm_runtime_disable(i2c_dev->dev); in stm32f7_i2c_probe()
2340 pm_runtime_set_suspended(i2c_dev->dev); in stm32f7_i2c_probe()
2341 pm_runtime_dont_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_probe()
2343 if (i2c_dev->wakeup_src) in stm32f7_i2c_probe()
2344 dev_pm_clear_wake_irq(i2c_dev->dev); in stm32f7_i2c_probe()
2347 if (i2c_dev->wakeup_src) in stm32f7_i2c_probe()
2348 device_set_wakeup_capable(i2c_dev->dev, false); in stm32f7_i2c_probe()
2350 if (i2c_dev->dma) { in stm32f7_i2c_probe()
2351 stm32_i2c_dma_free(i2c_dev->dma); in stm32f7_i2c_probe()
2352 i2c_dev->dma = NULL; in stm32f7_i2c_probe()
2368 i2c_del_adapter(&i2c_dev->adap); in stm32f7_i2c_remove()
2369 pm_runtime_get_sync(i2c_dev->dev); in stm32f7_i2c_remove()
2371 if (i2c_dev->wakeup_src) { in stm32f7_i2c_remove()
2372 dev_pm_clear_wake_irq(i2c_dev->dev); in stm32f7_i2c_remove()
2377 device_init_wakeup(i2c_dev->dev, false); in stm32f7_i2c_remove()
2380 pm_runtime_put_noidle(i2c_dev->dev); in stm32f7_i2c_remove()
2381 pm_runtime_disable(i2c_dev->dev); in stm32f7_i2c_remove()
2382 pm_runtime_set_suspended(i2c_dev->dev); in stm32f7_i2c_remove()
2383 pm_runtime_dont_use_autosuspend(i2c_dev->dev); in stm32f7_i2c_remove()
2385 if (i2c_dev->dma) { in stm32f7_i2c_remove()
2386 stm32_i2c_dma_free(i2c_dev->dma); in stm32f7_i2c_remove()
2387 i2c_dev->dma = NULL; in stm32f7_i2c_remove()
2398 clk_disable(i2c_dev->clk); in stm32f7_i2c_runtime_suspend()
2409 ret = clk_enable(i2c_dev->clk); in stm32f7_i2c_runtime_resume()
2422 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; in stm32f7_i2c_regs_backup()
2424 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_regs_backup()
2428 backup_regs->cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_backup()
2429 backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_regs_backup()
2430 backup_regs->oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_regs_backup()
2431 backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_regs_backup()
2432 backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_regs_backup()
2435 pm_runtime_put_sync(i2c_dev->dev); in stm32f7_i2c_regs_backup()
2444 struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs; in stm32f7_i2c_regs_restore()
2446 ret = pm_runtime_resume_and_get(i2c_dev->dev); in stm32f7_i2c_regs_restore()
2450 cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_restore()
2452 stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_regs_restore()
2455 writel_relaxed(backup_regs->tmgr, i2c_dev->base + STM32F7_I2C_TIMINGR); in stm32f7_i2c_regs_restore()
2456 writel_relaxed(backup_regs->cr1 & ~STM32F7_I2C_CR1_PE, in stm32f7_i2c_regs_restore()
2457 i2c_dev->base + STM32F7_I2C_CR1); in stm32f7_i2c_regs_restore()
2458 if (backup_regs->cr1 & STM32F7_I2C_CR1_PE) in stm32f7_i2c_regs_restore()
2459 stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1, in stm32f7_i2c_regs_restore()
2461 writel_relaxed(backup_regs->cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_regs_restore()
2462 writel_relaxed(backup_regs->oar1, i2c_dev->base + STM32F7_I2C_OAR1); in stm32f7_i2c_regs_restore()
2463 writel_relaxed(backup_regs->oar2, i2c_dev->base + STM32F7_I2C_OAR2); in stm32f7_i2c_regs_restore()
2466 pm_runtime_put_sync(i2c_dev->dev); in stm32f7_i2c_regs_restore()
2476 i2c_mark_adapter_suspended(&i2c_dev->adap); in stm32f7_i2c_suspend()
2481 i2c_mark_adapter_resumed(&i2c_dev->adap); in stm32f7_i2c_suspend()
2508 i2c_mark_adapter_resumed(&i2c_dev->adap); in stm32f7_i2c_resume()
2520 { .compatible = "st,stm32f7-i2c", .data = &stm32f7_setup},
2521 { .compatible = "st,stm32mp15-i2c", .data = &stm32mp15_setup},
2522 { .compatible = "st,stm32mp13-i2c", .data = &stm32mp13_setup},
2523 { .compatible = "st,stm32mp25-i2c", .data = &stm32mp25_setup},
2530 .name = "stm32f7-i2c",
2541 MODULE_DESCRIPTION("STMicroelectronics STM32F7 I2C driver");