Lines Matching +full:i2c +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
7 * S3C2410 I2C Controller
13 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-s3c2410.h>
36 /* see s3c2410x user guide, v1.1, section 9 (p447) for more info */
44 #define S3C2410_IICCON_ACKEN (1 << 7)
46 #define S3C2410_IICCON_TXDIV_512 (1 << 6)
47 #define S3C2410_IICCON_IRQEN (1 << 5)
48 #define S3C2410_IICCON_IRQPEND (1 << 4)
55 #define S3C2410_IICSTAT_SLAVE_TX (1 << 6)
58 #define S3C2410_IICSTAT_START (1 << 5)
59 #define S3C2410_IICSTAT_BUSBUSY (1 << 5)
60 #define S3C2410_IICSTAT_TXRXEN (1 << 4)
61 #define S3C2410_IICSTAT_ARBITR (1 << 3)
62 #define S3C2410_IICSTAT_ASSLAVE (1 << 2)
63 #define S3C2410_IICSTAT_ADDR0 (1 << 1)
64 #define S3C2410_IICSTAT_LASTBIT (1 << 0)
67 #define S3C2410_IICLC_SDA_DELAY5 (1 << 0)
72 #define S3C2410_IICLC_FILTER_ON (1 << 2)
75 #define QUIRK_S3C2440 (1 << 0)
76 #define QUIRK_HDMIPHY (1 << 1)
77 #define QUIRK_NO_GPIO (1 << 2)
78 #define QUIRK_POLL (1 << 3)
79 #define QUIRK_ATOMIC (1 << 4)
87 /* i2c controller state */
125 .name = "s3c2410-i2c",
128 .name = "s3c2440-i2c",
131 .name = "s3c2440-hdmiphy-i2c",
137 static void i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat);
141 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
142 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
143 { .compatible = "samsung,s3c2440-hdmiphy-i2c",
145 { .compatible = "samsung,exynos5-sata-phy-i2c",
157 if (pdev->dev.of_node) in s3c24xx_get_device_quirks()
158 return (kernel_ulong_t)of_device_get_match_data(&pdev->dev); in s3c24xx_get_device_quirks()
160 return platform_get_device_id(pdev)->driver_data; in s3c24xx_get_device_quirks()
167 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret) in s3c24xx_i2c_master_complete() argument
169 dev_dbg(i2c->dev, "master_complete %d\n", ret); in s3c24xx_i2c_master_complete()
171 i2c->msg_ptr = 0; in s3c24xx_i2c_master_complete()
172 i2c->msg = NULL; in s3c24xx_i2c_master_complete()
173 i2c->msg_idx++; in s3c24xx_i2c_master_complete()
174 i2c->msg_num = 0; in s3c24xx_i2c_master_complete()
176 i2c->msg_idx = ret; in s3c24xx_i2c_master_complete()
178 if (!(i2c->quirks & (QUIRK_POLL | QUIRK_ATOMIC))) in s3c24xx_i2c_master_complete()
179 wake_up(&i2c->wait); in s3c24xx_i2c_master_complete()
182 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_ack() argument
186 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
187 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
190 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_enable_ack() argument
194 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
195 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
199 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_irq() argument
203 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
204 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
207 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_enable_irq() argument
211 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
212 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
215 static bool is_ack(struct s3c24xx_i2c *i2c) in is_ack() argument
219 for (tries = 50; tries; --tries) { in is_ack()
220 unsigned long tmp = readl(i2c->regs + S3C2410_IICCON); in is_ack()
231 if (!(readl(i2c->regs + S3C2410_IICSTAT) in is_ack()
237 dev_err(i2c->dev, "ack was not received\n"); in is_ack()
244 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, in s3c24xx_i2c_message_start() argument
247 unsigned int addr = (msg->addr & 0x7f) << 1; in s3c24xx_i2c_message_start()
254 if (msg->flags & I2C_M_RD) { in s3c24xx_i2c_message_start()
256 addr |= 1; in s3c24xx_i2c_message_start()
260 if (msg->flags & I2C_M_REV_DIR_ADDR) in s3c24xx_i2c_message_start()
261 addr ^= 1; in s3c24xx_i2c_message_start()
263 /* todo - check for whether ack wanted or not */ in s3c24xx_i2c_message_start()
264 s3c24xx_i2c_enable_ack(i2c); in s3c24xx_i2c_message_start()
266 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
267 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
269 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr); in s3c24xx_i2c_message_start()
270 writeb(addr, i2c->regs + S3C2410_IICDS); in s3c24xx_i2c_message_start()
276 ndelay(i2c->tx_setup); in s3c24xx_i2c_message_start()
278 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon); in s3c24xx_i2c_message_start()
279 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
282 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
285 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret) in s3c24xx_i2c_stop() argument
287 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
289 dev_dbg(i2c->dev, "STOP\n"); in s3c24xx_i2c_stop()
293 * 1) I2CSTAT.5 = 0 - Clear BUSY (or 'generate STOP') in s3c24xx_i2c_stop()
294 * 2) I2CCON.4 = 0 - Clear IRQPEND in s3c24xx_i2c_stop()
296 * 4*) I2CSTAT.4 = 0 - Clear TXRXEN in s3c24xx_i2c_stop()
302 * Master->Slave when they complete generating a STOP condition. in s3c24xx_i2c_stop()
315 * To avoid these extra post-STOP transactions on HDMI phy devices, we in s3c24xx_i2c_stop()
325 if (i2c->quirks & QUIRK_HDMIPHY) { in s3c24xx_i2c_stop()
326 /* Stop driving the I2C pins */ in s3c24xx_i2c_stop()
332 writel(iicstat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
334 i2c->state = STATE_STOP; in s3c24xx_i2c_stop()
336 s3c24xx_i2c_master_complete(i2c, ret); in s3c24xx_i2c_stop()
337 s3c24xx_i2c_disable_irq(i2c); in s3c24xx_i2c_stop()
348 static inline int is_lastmsg(struct s3c24xx_i2c *i2c) in is_lastmsg() argument
350 return i2c->msg_idx >= (i2c->msg_num - 1); in is_lastmsg()
356 static inline int is_msglast(struct s3c24xx_i2c *i2c) in is_msglast() argument
359 * msg->len is always 1 for the first byte of smbus block read. in is_msglast()
363 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in is_msglast()
366 return i2c->msg_ptr == i2c->msg->len-1; in is_msglast()
372 static inline int is_msgend(struct s3c24xx_i2c *i2c) in is_msgend() argument
374 return i2c->msg_ptr >= i2c->msg->len; in is_msgend()
380 static void i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) in i2c_s3c_irq_nextbyte() argument
385 switch (i2c->state) { in i2c_s3c_irq_nextbyte()
388 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); in i2c_s3c_irq_nextbyte()
392 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); in i2c_s3c_irq_nextbyte()
393 s3c24xx_i2c_disable_irq(i2c); in i2c_s3c_irq_nextbyte()
399 * bus, or started a new i2c message in i2c_s3c_irq_nextbyte()
402 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
404 dev_dbg(i2c->dev, "ack was not received\n"); in i2c_s3c_irq_nextbyte()
405 s3c24xx_i2c_stop(i2c, -ENXIO); in i2c_s3c_irq_nextbyte()
409 if (i2c->msg->flags & I2C_M_RD) in i2c_s3c_irq_nextbyte()
410 i2c->state = STATE_READ; in i2c_s3c_irq_nextbyte()
412 i2c->state = STATE_WRITE; in i2c_s3c_irq_nextbyte()
416 * as this is used by the i2c probe to find devices. in i2c_s3c_irq_nextbyte()
418 if (is_lastmsg(i2c) && i2c->msg->len == 0) { in i2c_s3c_irq_nextbyte()
419 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
423 if (i2c->state == STATE_READ) in i2c_s3c_irq_nextbyte()
436 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
438 dev_dbg(i2c->dev, "WRITE: No Ack\n"); in i2c_s3c_irq_nextbyte()
440 s3c24xx_i2c_stop(i2c, -ECONNREFUSED); in i2c_s3c_irq_nextbyte()
447 if (!is_msgend(i2c)) { in i2c_s3c_irq_nextbyte()
448 byte = i2c->msg->buf[i2c->msg_ptr++]; in i2c_s3c_irq_nextbyte()
449 writeb(byte, i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
458 ndelay(i2c->tx_setup); in i2c_s3c_irq_nextbyte()
460 } else if (!is_lastmsg(i2c)) { in i2c_s3c_irq_nextbyte()
461 /* we need to go to the next i2c message */ in i2c_s3c_irq_nextbyte()
463 dev_dbg(i2c->dev, "WRITE: Next Message\n"); in i2c_s3c_irq_nextbyte()
465 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
466 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
467 i2c->msg++; in i2c_s3c_irq_nextbyte()
470 if (i2c->msg->flags & I2C_M_NOSTART) { in i2c_s3c_irq_nextbyte()
472 if (i2c->msg->flags & I2C_M_RD) { in i2c_s3c_irq_nextbyte()
478 dev_dbg(i2c->dev, in i2c_s3c_irq_nextbyte()
479 "missing START before write->read\n"); in i2c_s3c_irq_nextbyte()
480 s3c24xx_i2c_stop(i2c, -EINVAL); in i2c_s3c_irq_nextbyte()
487 s3c24xx_i2c_message_start(i2c, i2c->msg); in i2c_s3c_irq_nextbyte()
488 i2c->state = STATE_START; in i2c_s3c_irq_nextbyte()
493 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
503 byte = readb(i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
504 i2c->msg->buf[i2c->msg_ptr++] = byte; in i2c_s3c_irq_nextbyte()
507 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in i2c_s3c_irq_nextbyte()
508 i2c->msg->len += byte; in i2c_s3c_irq_nextbyte()
510 if (is_msglast(i2c)) { in i2c_s3c_irq_nextbyte()
513 if (is_lastmsg(i2c)) in i2c_s3c_irq_nextbyte()
514 s3c24xx_i2c_disable_ack(i2c); in i2c_s3c_irq_nextbyte()
516 } else if (is_msgend(i2c)) { in i2c_s3c_irq_nextbyte()
521 if (is_lastmsg(i2c)) { in i2c_s3c_irq_nextbyte()
523 dev_dbg(i2c->dev, "READ: Send Stop\n"); in i2c_s3c_irq_nextbyte()
525 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
528 dev_dbg(i2c->dev, "READ: Next Transfer\n"); in i2c_s3c_irq_nextbyte()
530 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
531 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
532 i2c->msg++; in i2c_s3c_irq_nextbyte()
542 tmp = readl(i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
544 writel(tmp, i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
554 struct s3c24xx_i2c *i2c = dev_id; in s3c24xx_i2c_irq() local
558 status = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_irq()
562 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_irq()
565 if (i2c->state == STATE_IDLE) { in s3c24xx_i2c_irq()
566 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); in s3c24xx_i2c_irq()
568 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
570 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
578 i2c_s3c_irq_nextbyte(i2c, status); in s3c24xx_i2c_irq()
589 * If there is an event on the bus, or we have a pre-existing event at
590 * kernel boot time, we may not notice the event and the I2C controller
591 * will lock the bus with the I2C clock line low indefinitely.
593 static inline void s3c24xx_i2c_disable_bus(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_bus() argument
597 /* Stop driving the I2C pins */ in s3c24xx_i2c_disable_bus()
598 tmp = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
600 writel(tmp, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
603 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
606 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
611 * get the i2c bus for a master transaction
613 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_set_master() argument
618 while (timeout-- > 0) { in s3c24xx_i2c_set_master()
619 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_set_master()
624 msleep(1); in s3c24xx_i2c_set_master()
627 return -ETIMEDOUT; in s3c24xx_i2c_set_master()
631 * wait for the i2c bus to become idle.
633 static void s3c24xx_i2c_wait_idle(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_wait_idle() argument
642 dev_dbg(i2c->dev, "waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
648 * end of a transaction. However, really slow i2c devices can stretch in s3c24xx_i2c_wait_idle()
655 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
656 while ((iicstat & S3C2410_IICSTAT_START) && --spins) { in s3c24xx_i2c_wait_idle()
658 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
665 * up to 1/10th of the total timeout, then continue to poll at a in s3c24xx_i2c_wait_idle()
668 delay = 1; in s3c24xx_i2c_wait_idle()
673 delay <<= 1; in s3c24xx_i2c_wait_idle()
675 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
679 dev_warn(i2c->dev, "timeout waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
683 * this starts an i2c transfer
685 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, in s3c24xx_i2c_doxfer() argument
691 ret = s3c24xx_i2c_set_master(i2c); in s3c24xx_i2c_doxfer()
693 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); in s3c24xx_i2c_doxfer()
694 ret = -EAGAIN; in s3c24xx_i2c_doxfer()
698 i2c->msg = msgs; in s3c24xx_i2c_doxfer()
699 i2c->msg_num = num; in s3c24xx_i2c_doxfer()
700 i2c->msg_ptr = 0; in s3c24xx_i2c_doxfer()
701 i2c->msg_idx = 0; in s3c24xx_i2c_doxfer()
702 i2c->state = STATE_START; in s3c24xx_i2c_doxfer()
704 s3c24xx_i2c_enable_irq(i2c); in s3c24xx_i2c_doxfer()
705 s3c24xx_i2c_message_start(i2c, msgs); in s3c24xx_i2c_doxfer()
707 if (i2c->quirks & (QUIRK_POLL | QUIRK_ATOMIC)) { in s3c24xx_i2c_doxfer()
708 while ((i2c->msg_num != 0) && is_ack(i2c)) { in s3c24xx_i2c_doxfer()
709 unsigned long stat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_doxfer()
711 i2c_s3c_irq_nextbyte(i2c, stat); in s3c24xx_i2c_doxfer()
713 stat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_doxfer()
715 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_doxfer()
718 time_left = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); in s3c24xx_i2c_doxfer()
721 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
728 dev_dbg(i2c->dev, "timeout\n"); in s3c24xx_i2c_doxfer()
730 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
733 if (i2c->quirks & QUIRK_HDMIPHY) in s3c24xx_i2c_doxfer()
736 s3c24xx_i2c_wait_idle(i2c); in s3c24xx_i2c_doxfer()
738 s3c24xx_i2c_disable_bus(i2c); in s3c24xx_i2c_doxfer()
741 i2c->state = STATE_IDLE; in s3c24xx_i2c_doxfer()
747 * first port of call from the i2c bus code when an message needs
748 * transferring across the i2c bus.
753 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data; in s3c24xx_i2c_xfer() local
757 ret = clk_enable(i2c->clk); in s3c24xx_i2c_xfer()
761 for (retry = 0; retry < adap->retries; retry++) { in s3c24xx_i2c_xfer()
763 ret = s3c24xx_i2c_doxfer(i2c, msgs, num); in s3c24xx_i2c_xfer()
765 if (ret != -EAGAIN) { in s3c24xx_i2c_xfer()
766 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
770 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); in s3c24xx_i2c_xfer()
775 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
776 return -EREMOTEIO; in s3c24xx_i2c_xfer()
782 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data; in s3c24xx_i2c_xfer_atomic() local
785 disable_irq(i2c->irq); in s3c24xx_i2c_xfer_atomic()
786 i2c->quirks |= QUIRK_ATOMIC; in s3c24xx_i2c_xfer_atomic()
788 i2c->quirks &= ~QUIRK_ATOMIC; in s3c24xx_i2c_xfer_atomic()
789 enable_irq(i2c->irq); in s3c24xx_i2c_xfer_atomic()
794 /* declare our i2c functionality */
801 /* i2c bus registration info */
822 calc_divs += calc_div1-1; in s3c24xx_i2c_calcdivisor()
826 calc_divs = 1; in s3c24xx_i2c_calcdivisor()
841 static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got) in s3c24xx_i2c_clockrate() argument
843 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_clockrate()
844 unsigned long clkin = clk_get_rate(i2c->clk); in s3c24xx_i2c_clockrate()
850 i2c->clkrate = clkin; in s3c24xx_i2c_clockrate()
853 dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency); in s3c24xx_i2c_clockrate()
855 target_frequency = pdata->frequency ?: I2C_MAX_STANDARD_MODE_FREQ; in s3c24xx_i2c_clockrate()
862 dev_err(i2c->dev, in s3c24xx_i2c_clockrate()
865 return -EINVAL; in s3c24xx_i2c_clockrate()
870 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
872 iiccon |= (divs-1); in s3c24xx_i2c_clockrate()
877 if (i2c->quirks & QUIRK_POLL) in s3c24xx_i2c_clockrate()
880 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
882 if (i2c->quirks & QUIRK_S3C2440) { in s3c24xx_i2c_clockrate()
885 if (pdata->sda_delay) { in s3c24xx_i2c_clockrate()
886 sda_delay = clkin * pdata->sda_delay; in s3c24xx_i2c_clockrate()
895 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay); in s3c24xx_i2c_clockrate()
896 writel(sda_delay, i2c->regs + S3C2440_IICLC); in s3c24xx_i2c_clockrate()
903 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt_gpio() argument
907 if (i2c->quirks & QUIRK_NO_GPIO) in s3c24xx_i2c_parse_dt_gpio()
911 i2c->gpios[i] = devm_gpiod_get_index(i2c->dev, NULL, in s3c24xx_i2c_parse_dt_gpio()
913 if (IS_ERR(i2c->gpios[i])) { in s3c24xx_i2c_parse_dt_gpio()
914 dev_err(i2c->dev, "i2c gpio invalid at index %d\n", i); in s3c24xx_i2c_parse_dt_gpio()
915 return -EINVAL; in s3c24xx_i2c_parse_dt_gpio()
922 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt_gpio() argument
931 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_init() argument
938 pdata = i2c->pdata; in s3c24xx_i2c_init()
942 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); in s3c24xx_i2c_init()
944 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); in s3c24xx_i2c_init()
946 writel(0, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_init()
947 writel(0, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_init()
951 if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) { in s3c24xx_i2c_init()
952 dev_err(i2c->dev, "cannot meet bus frequency required\n"); in s3c24xx_i2c_init()
953 return -EINVAL; in s3c24xx_i2c_init()
956 /* todo - check that the i2c lines aren't being dragged anywhere */ in s3c24xx_i2c_init()
958 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq); in s3c24xx_i2c_init()
959 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02x\n", in s3c24xx_i2c_init()
960 readl(i2c->regs + S3C2410_IICCON)); in s3c24xx_i2c_init()
970 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt() argument
972 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_parse_dt()
978 pdata->bus_num = -1; /* i2c bus number is dynamically assigned */ in s3c24xx_i2c_parse_dt()
979 of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay); in s3c24xx_i2c_parse_dt()
980 of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr); in s3c24xx_i2c_parse_dt()
981 of_property_read_u32(np, "samsung,i2c-max-bus-freq", in s3c24xx_i2c_parse_dt()
982 (u32 *)&pdata->frequency); in s3c24xx_i2c_parse_dt()
984 * Exynos5's legacy i2c controller and new high speed i2c in s3c24xx_i2c_parse_dt()
986 * interrupts for 4-channel HS-I2C controller are enabled. in s3c24xx_i2c_parse_dt()
987 * If nodes for first four channels of legacy i2c controller in s3c24xx_i2c_parse_dt()
988 * are available then re-configure the interrupts via the in s3c24xx_i2c_parse_dt()
991 id = of_alias_get_id(np, "i2c"); in s3c24xx_i2c_parse_dt()
992 i2c->sysreg = syscon_regmap_lookup_by_phandle(np, in s3c24xx_i2c_parse_dt()
993 "samsung,sysreg-phandle"); in s3c24xx_i2c_parse_dt()
994 if (IS_ERR(i2c->sysreg)) in s3c24xx_i2c_parse_dt()
997 regmap_update_bits(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, BIT(id), 0); in s3c24xx_i2c_parse_dt()
1001 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) { } in s3c24xx_i2c_parse_dt() argument
1006 struct s3c24xx_i2c *i2c; in s3c24xx_i2c_probe() local
1011 if (!pdev->dev.of_node) { in s3c24xx_i2c_probe()
1012 pdata = dev_get_platdata(&pdev->dev); in s3c24xx_i2c_probe()
1014 dev_err(&pdev->dev, "no platform data\n"); in s3c24xx_i2c_probe()
1015 return -EINVAL; in s3c24xx_i2c_probe()
1019 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL); in s3c24xx_i2c_probe()
1020 if (!i2c) in s3c24xx_i2c_probe()
1021 return -ENOMEM; in s3c24xx_i2c_probe()
1023 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); in s3c24xx_i2c_probe()
1024 if (!i2c->pdata) in s3c24xx_i2c_probe()
1025 return -ENOMEM; in s3c24xx_i2c_probe()
1027 i2c->quirks = s3c24xx_get_device_quirks(pdev); in s3c24xx_i2c_probe()
1028 i2c->sysreg = ERR_PTR(-ENOENT); in s3c24xx_i2c_probe()
1030 memcpy(i2c->pdata, pdata, sizeof(*pdata)); in s3c24xx_i2c_probe()
1032 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c); in s3c24xx_i2c_probe()
1034 strscpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); in s3c24xx_i2c_probe()
1035 i2c->adap.owner = THIS_MODULE; in s3c24xx_i2c_probe()
1036 i2c->adap.algo = &s3c24xx_i2c_algorithm; in s3c24xx_i2c_probe()
1037 i2c->adap.retries = 2; in s3c24xx_i2c_probe()
1038 i2c->adap.class = I2C_CLASS_DEPRECATED; in s3c24xx_i2c_probe()
1039 i2c->tx_setup = 50; in s3c24xx_i2c_probe()
1041 init_waitqueue_head(&i2c->wait); in s3c24xx_i2c_probe()
1044 i2c->dev = &pdev->dev; in s3c24xx_i2c_probe()
1045 i2c->clk = devm_clk_get(&pdev->dev, "i2c"); in s3c24xx_i2c_probe()
1046 if (IS_ERR(i2c->clk)) { in s3c24xx_i2c_probe()
1047 dev_err(&pdev->dev, "cannot get clock\n"); in s3c24xx_i2c_probe()
1048 return -ENOENT; in s3c24xx_i2c_probe()
1051 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); in s3c24xx_i2c_probe()
1054 i2c->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in s3c24xx_i2c_probe()
1055 if (IS_ERR(i2c->regs)) in s3c24xx_i2c_probe()
1056 return PTR_ERR(i2c->regs); in s3c24xx_i2c_probe()
1058 dev_dbg(&pdev->dev, "registers %p (%p)\n", in s3c24xx_i2c_probe()
1059 i2c->regs, res); in s3c24xx_i2c_probe()
1061 /* setup info block for the i2c core */ in s3c24xx_i2c_probe()
1062 i2c->adap.algo_data = i2c; in s3c24xx_i2c_probe()
1063 i2c->adap.dev.parent = &pdev->dev; in s3c24xx_i2c_probe()
1064 i2c->pctrl = devm_pinctrl_get_select_default(i2c->dev); in s3c24xx_i2c_probe()
1066 /* inititalise the i2c gpio lines */ in s3c24xx_i2c_probe()
1067 if (i2c->pdata->cfg_gpio) in s3c24xx_i2c_probe()
1068 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev)); in s3c24xx_i2c_probe()
1069 else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c)) in s3c24xx_i2c_probe()
1070 return -EINVAL; in s3c24xx_i2c_probe()
1072 /* initialise the i2c controller */ in s3c24xx_i2c_probe()
1073 ret = clk_prepare_enable(i2c->clk); in s3c24xx_i2c_probe()
1075 dev_err(&pdev->dev, "I2C clock enable failed\n"); in s3c24xx_i2c_probe()
1079 ret = s3c24xx_i2c_init(i2c); in s3c24xx_i2c_probe()
1080 clk_disable(i2c->clk); in s3c24xx_i2c_probe()
1082 dev_err(&pdev->dev, "I2C controller init failed\n"); in s3c24xx_i2c_probe()
1083 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1091 if (!(i2c->quirks & QUIRK_POLL)) { in s3c24xx_i2c_probe()
1092 i2c->irq = ret = platform_get_irq(pdev, 0); in s3c24xx_i2c_probe()
1094 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1098 ret = devm_request_irq(&pdev->dev, i2c->irq, s3c24xx_i2c_irq, in s3c24xx_i2c_probe()
1099 0, dev_name(&pdev->dev), i2c); in s3c24xx_i2c_probe()
1101 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq); in s3c24xx_i2c_probe()
1102 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1113 i2c->adap.nr = i2c->pdata->bus_num; in s3c24xx_i2c_probe()
1114 i2c->adap.dev.of_node = pdev->dev.of_node; in s3c24xx_i2c_probe()
1116 platform_set_drvdata(pdev, i2c); in s3c24xx_i2c_probe()
1118 pm_runtime_enable(&pdev->dev); in s3c24xx_i2c_probe()
1120 ret = i2c_add_numbered_adapter(&i2c->adap); in s3c24xx_i2c_probe()
1122 pm_runtime_disable(&pdev->dev); in s3c24xx_i2c_probe()
1123 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1127 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); in s3c24xx_i2c_probe()
1133 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev); in s3c24xx_i2c_remove() local
1135 clk_unprepare(i2c->clk); in s3c24xx_i2c_remove()
1137 pm_runtime_disable(&pdev->dev); in s3c24xx_i2c_remove()
1139 i2c_del_adapter(&i2c->adap); in s3c24xx_i2c_remove()
1144 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev); in s3c24xx_i2c_suspend_noirq() local
1146 i2c_mark_adapter_suspended(&i2c->adap); in s3c24xx_i2c_suspend_noirq()
1148 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_suspend_noirq()
1149 regmap_read(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, &i2c->sys_i2c_cfg); in s3c24xx_i2c_suspend_noirq()
1156 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev); in s3c24xx_i2c_resume_noirq() local
1159 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_resume_noirq()
1160 regmap_write(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, i2c->sys_i2c_cfg); in s3c24xx_i2c_resume_noirq()
1162 ret = clk_enable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1165 s3c24xx_i2c_init(i2c); in s3c24xx_i2c_resume_noirq()
1166 clk_disable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1167 i2c_mark_adapter_resumed(&i2c->adap); in s3c24xx_i2c_resume_noirq()
1182 .name = "s3c-i2c",
1200 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");