Lines Matching defs:smbus
55 static inline void reg_write(struct pasemi_smbus *smbus, int reg, int val)
57 dev_dbg(smbus->dev, "smbus write reg %x val %08x\n", reg, val);
58 iowrite32(val, smbus->ioaddr + reg);
61 static inline int reg_read(struct pasemi_smbus *smbus, int reg)
64 ret = ioread32(smbus->ioaddr + reg);
65 dev_dbg(smbus->dev, "smbus read reg %x val %08x\n", reg, ret);
69 #define TXFIFO_WR(smbus, reg) reg_write((smbus), REG_MTXFIFO, (reg))
70 #define RXFIFO_RD(smbus) reg_read((smbus), REG_MRXFIFO)
72 static void pasemi_reset(struct pasemi_smbus *smbus)
74 u32 val = (CTL_MTR | CTL_MRR | (smbus->clk_div & CTL_CLK_M));
76 if (smbus->hw_rev >= 6)
79 reg_write(smbus, REG_CTL, val);
80 reinit_completion(&smbus->irq_completion);
83 static void pasemi_smb_clear(struct pasemi_smbus *smbus)
87 status = reg_read(smbus, REG_SMSTA);
88 reg_write(smbus, REG_SMSTA, status);
91 static int pasemi_smb_waitready(struct pasemi_smbus *smbus)
96 if (smbus->use_irq) {
97 reinit_completion(&smbus->irq_completion);
98 reg_write(smbus, REG_IMASK, SMSTA_XEN | SMSTA_MTN);
99 wait_for_completion_timeout(&smbus->irq_completion, msecs_to_jiffies(100));
100 reg_write(smbus, REG_IMASK, 0);
101 status = reg_read(smbus, REG_SMSTA);
103 status = reg_read(smbus, REG_SMSTA);
106 status = reg_read(smbus, REG_SMSTA);
115 dev_warn(smbus->dev, "Timeout, status 0x%08x\n", status);
116 reg_write(smbus, REG_SMSTA, status);
121 reg_write(smbus, REG_SMSTA, SMSTA_XEN);
129 struct pasemi_smbus *smbus = adapter->algo_data;
135 TXFIFO_WR(smbus, MTXFIFO_START | i2c_8bit_addr_from_msg(msg));
138 TXFIFO_WR(smbus, msg->len | MTXFIFO_READ |
141 err = pasemi_smb_waitready(smbus);
146 rd = RXFIFO_RD(smbus);
155 TXFIFO_WR(smbus, msg->buf[i]);
157 TXFIFO_WR(smbus, msg->buf[msg->len-1] |
161 err = pasemi_smb_waitready(smbus);
170 pasemi_reset(smbus);
177 struct pasemi_smbus *smbus = adapter->algo_data;
180 pasemi_smb_clear(smbus);
194 struct pasemi_smbus *smbus = adapter->algo_data;
203 pasemi_smb_clear(smbus);
207 TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START |
211 TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START);
213 TXFIFO_WR(smbus, 1 | MTXFIFO_STOP | MTXFIFO_READ);
215 TXFIFO_WR(smbus, MTXFIFO_STOP | command);
218 TXFIFO_WR(smbus, addr | MTXFIFO_START);
219 TXFIFO_WR(smbus, command);
221 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
222 TXFIFO_WR(smbus, 1 | MTXFIFO_READ | MTXFIFO_STOP);
224 TXFIFO_WR(smbus, MTXFIFO_STOP | data->byte);
228 TXFIFO_WR(smbus, addr | MTXFIFO_START);
229 TXFIFO_WR(smbus, command);
231 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
232 TXFIFO_WR(smbus, 2 | MTXFIFO_READ | MTXFIFO_STOP);
234 TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M);
235 TXFIFO_WR(smbus, MTXFIFO_STOP | (data->word >> 8));
239 TXFIFO_WR(smbus, addr | MTXFIFO_START);
240 TXFIFO_WR(smbus, command);
242 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
243 TXFIFO_WR(smbus, 1 | MTXFIFO_READ);
244 rd = RXFIFO_RD(smbus);
247 TXFIFO_WR(smbus, len | MTXFIFO_READ |
251 TXFIFO_WR(smbus, len);
253 TXFIFO_WR(smbus, data->block[i]);
254 TXFIFO_WR(smbus, data->block[len] | MTXFIFO_STOP);
259 TXFIFO_WR(smbus, addr | MTXFIFO_START);
260 TXFIFO_WR(smbus, command);
261 TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M);
262 TXFIFO_WR(smbus, (data->word >> 8) & MTXFIFO_DATA_M);
263 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START);
264 TXFIFO_WR(smbus, 2 | MTXFIFO_STOP | MTXFIFO_READ);
269 TXFIFO_WR(smbus, addr | MTXFIFO_START);
270 TXFIFO_WR(smbus, command);
271 TXFIFO_WR(smbus, len);
273 TXFIFO_WR(smbus, data->block[i]);
274 TXFIFO_WR(smbus, addr | I2C_SMBUS_READ);
275 TXFIFO_WR(smbus, MTXFIFO_READ | 1);
276 rd = RXFIFO_RD(smbus);
279 TXFIFO_WR(smbus, len | MTXFIFO_READ | MTXFIFO_STOP);
287 err = pasemi_smb_waitready(smbus);
297 rd = RXFIFO_RD(smbus);
306 rd = RXFIFO_RD(smbus);
312 rd = RXFIFO_RD(smbus);
323 rd = RXFIFO_RD(smbus);
336 pasemi_reset(smbus);
354 int pasemi_i2c_common_probe(struct pasemi_smbus *smbus)
358 smbus->adapter.owner = THIS_MODULE;
359 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
360 "PA Semi SMBus adapter (%s)", dev_name(smbus->dev));
361 smbus->adapter.algo = &smbus_algorithm;
362 smbus->adapter.algo_data = smbus;
365 smbus->adapter.dev.parent = smbus->dev;
366 smbus->use_irq = 0;
367 init_completion(&smbus->irq_completion);
369 if (smbus->hw_rev != PASEMI_HW_REV_PCI)
370 smbus->hw_rev = reg_read(smbus, REG_REV);
372 reg_write(smbus, REG_IMASK, 0);
374 pasemi_reset(smbus);
376 error = devm_i2c_add_adapter(smbus->dev, &smbus->adapter);
386 struct pasemi_smbus *smbus = dev_id;
388 reg_write(smbus, REG_IMASK, 0);
389 complete(&smbus->irq_completion);