Lines Matching +full:wakeup +full:- +full:threshold
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (C) 2004 - 2007 Texas Instruments.
30 #include <linux/platform_data/i2c-omap.h>
53 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */
104 /* I2C WE wakeup enable register */
106 #define OMAP_I2C_WE_RDR_WE (1 << 13) /* RX drain wakeup */
107 #define OMAP_I2C_WE_AAS_WE (1 << 9) /* Address as slave wakeup*/
108 #define OMAP_I2C_WE_BF_WE (1 << 8) /* Bus free wakeup */
109 #define OMAP_I2C_WE_STC_WE (1 << 6) /* Start condition wakeup */
110 #define OMAP_I2C_WE_GC_WE (1 << 5) /* General call wakeup */
111 #define OMAP_I2C_WE_DRDY_WE (1 << 3) /* TX/RX data ready wakeup */
112 #define OMAP_I2C_WE_ARDY_WE (1 << 2) /* Reg access ready wakeup */
113 #define OMAP_I2C_WE_NACK_WE (1 << 1) /* No acknowledgment wakeup */
114 #define OMAP_I2C_WE_AL_WE (1 << 0) /* Arbitration lost wakeup */
197 u8 threshold; member
204 unsigned bb_valid:1; /* true when BB-bit reflects
270 writew_relaxed(val, omap->base + in omap_i2c_write_reg()
271 (omap->regs[reg] << omap->reg_shift)); in omap_i2c_write_reg()
276 return readw_relaxed(omap->base + in omap_i2c_read_reg()
277 (omap->regs[reg] << omap->reg_shift)); in omap_i2c_read_reg()
286 omap_i2c_write_reg(omap, OMAP_I2C_PSC_REG, omap->pscstate); in __omap_i2c_init()
289 omap_i2c_write_reg(omap, OMAP_I2C_SCLL_REG, omap->scllstate); in __omap_i2c_init()
290 omap_i2c_write_reg(omap, OMAP_I2C_SCLH_REG, omap->sclhstate); in __omap_i2c_init()
291 if (omap->rev >= OMAP_I2C_REV_ON_3430_3530) in __omap_i2c_init()
292 omap_i2c_write_reg(omap, OMAP_I2C_WE_REG, omap->westate); in __omap_i2c_init()
307 if (omap->iestate) in __omap_i2c_init()
308 omap_i2c_write_reg(omap, OMAP_I2C_IE_REG, omap->iestate); in __omap_i2c_init()
316 if (omap->rev >= OMAP_I2C_OMAP1_REV_2) { in omap_i2c_reset()
332 dev_warn(omap->dev, "timeout waiting " in omap_i2c_reset()
334 return -ETIMEDOUT; in omap_i2c_reset()
342 if (omap->rev > OMAP_I2C_REV_ON_3430_3530) { in omap_i2c_reset()
343 /* Schedule I2C-bus monitoring on the next transfer */ in omap_i2c_reset()
344 omap->bb_valid = 0; in omap_i2c_reset()
360 if (omap->rev >= OMAP_I2C_REV_ON_3430_3530) { in omap_i2c_init()
366 omap->westate = OMAP_I2C_WE_ALL; in omap_i2c_init()
369 if (omap->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { in omap_i2c_init()
376 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init()
379 dev_err(omap->dev, "could not get fck: %i\n", error); in omap_i2c_init()
388 * between 7 - 12 MHz. The XOR input clock is typically in omap_i2c_init()
400 if (!(omap->flags & OMAP_I2C_FLAG_SIMPLE_CLOCK)) { in omap_i2c_init()
408 if (omap->speed > 400 || in omap_i2c_init()
409 omap->flags & OMAP_I2C_FLAG_FORCE_19200_INT_CLK) in omap_i2c_init()
411 else if (omap->speed > 100) in omap_i2c_init()
415 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init()
418 dev_err(omap->dev, "could not get fck: %i\n", error); in omap_i2c_init()
427 psc = psc - 1; in omap_i2c_init()
430 if (omap->speed > 400) { in omap_i2c_init()
435 fsscll = scl - (scl / 3) - 7; in omap_i2c_init()
436 fssclh = (scl / 3) - 5; in omap_i2c_init()
439 scl = fclk_rate / omap->speed; in omap_i2c_init()
440 hsscll = scl - (scl / 3) - 7; in omap_i2c_init()
441 hssclh = (scl / 3) - 5; in omap_i2c_init()
442 } else if (omap->speed > 100) { in omap_i2c_init()
446 scl = internal_clk / omap->speed; in omap_i2c_init()
447 fsscll = scl - (scl / 3) - 7; in omap_i2c_init()
448 fssclh = (scl / 3) - 5; in omap_i2c_init()
451 fsscll = internal_clk / (omap->speed * 2) - 7; in omap_i2c_init()
452 fssclh = internal_clk / (omap->speed * 2) - 5; in omap_i2c_init()
461 scll = fclk_rate / (omap->speed * 2) - 7 + psc; in omap_i2c_init()
462 sclh = fclk_rate / (omap->speed * 2) - 7 + psc; in omap_i2c_init()
465 omap->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY | in omap_i2c_init()
467 OMAP_I2C_IE_AL) | ((omap->fifo_size) ? in omap_i2c_init()
470 omap->pscstate = psc; in omap_i2c_init()
471 omap->scllstate = scll; in omap_i2c_init()
472 omap->sclhstate = sclh; in omap_i2c_init()
474 if (omap->rev <= OMAP_I2C_REV_ON_3430_3530) { in omap_i2c_init()
476 omap->bb_valid = 1; in omap_i2c_init()
496 return -EBUSY; /* recovery would not fix SCL */ in omap_i2c_recover_bus()
497 return i2c_recover_bus(&omap->adapter); in omap_i2c_recover_bus()
518 * Wait while BB-bit doesn't reflect the I2C bus state
520 * In a multimaster environment, after IP software reset, BB-bit value doesn't
521 * correspond to the current bus state. It may happen what BB-bit will be 0,
523 * Here are BB-bit values after reset:
529 * Later, if IP detect SDA=0 and SCL=1 (ACK) or SDA 1->0 while SCL=1 (START)
530 * combinations on the bus, it set BB-bit to 1.
531 * If IP detect SDA 0->1 while SCL=1 (STOP) combination on the bus,
532 * it set BB-bit to 0 and BF to 1.
552 if (omap->bb_valid) in omap_i2c_wait_for_bb_valid()
561 * state. BB-bit value is valid. in omap_i2c_wait_for_bb_valid()
582 * BB-bit value is valid. in omap_i2c_wait_for_bb_valid()
596 dev_warn(omap->dev, "timeout waiting for bus ready\n"); in omap_i2c_wait_for_bb_valid()
603 omap->bb_valid = 1; in omap_i2c_wait_for_bb_valid()
611 if (omap->flags & OMAP_I2C_FLAG_NO_FIFO) in omap_i2c_resize_fifo()
615 * Set up notification threshold based on message size. We're doing in omap_i2c_resize_fifo()
621 omap->threshold = clamp(size, (u8) 1, omap->fifo_size); in omap_i2c_resize_fifo()
626 /* Clear RX Threshold */ in omap_i2c_resize_fifo()
628 buf |= ((omap->threshold - 1) << 8) | OMAP_I2C_BUF_RXFIF_CLR; in omap_i2c_resize_fifo()
630 /* Clear TX Threshold */ in omap_i2c_resize_fifo()
632 buf |= (omap->threshold - 1) | OMAP_I2C_BUF_TXFIF_CLR; in omap_i2c_resize_fifo()
637 if (omap->rev < OMAP_I2C_REV_ON_3630) in omap_i2c_resize_fifo()
638 omap->b_hw = 1; /* Enable hardware fixes */ in omap_i2c_resize_fifo()
640 /* calculate wakeup latency constraint for MPU */ in omap_i2c_resize_fifo()
641 if (omap->set_mpu_wkup_lat != NULL) in omap_i2c_resize_fifo()
642 omap->latency = (1000000 * omap->threshold) / in omap_i2c_resize_fifo()
643 (1000 * omap->speed / 8); in omap_i2c_resize_fifo()
669 dev_dbg(omap->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n", in omap_i2c_xfer_msg()
670 msg->addr, msg->len, msg->flags, stop); in omap_i2c_xfer_msg()
672 omap->receiver = !!(msg->flags & I2C_M_RD); in omap_i2c_xfer_msg()
673 omap_i2c_resize_fifo(omap, msg->len, omap->receiver); in omap_i2c_xfer_msg()
675 omap_i2c_write_reg(omap, OMAP_I2C_SA_REG, msg->addr); in omap_i2c_xfer_msg()
678 omap->buf = msg->buf; in omap_i2c_xfer_msg()
679 omap->buf_len = msg->len; in omap_i2c_xfer_msg()
681 /* make sure writes to omap->buf_len are ordered */ in omap_i2c_xfer_msg()
684 omap_i2c_write_reg(omap, OMAP_I2C_CNT_REG, omap->buf_len); in omap_i2c_xfer_msg()
692 reinit_completion(&omap->cmd_complete); in omap_i2c_xfer_msg()
693 omap->cmd_err = 0; in omap_i2c_xfer_msg()
698 if (omap->speed > 400) in omap_i2c_xfer_msg()
701 if (msg->flags & I2C_M_STOP) in omap_i2c_xfer_msg()
703 if (msg->flags & I2C_M_TEN) in omap_i2c_xfer_msg()
705 if (!(msg->flags & I2C_M_RD)) in omap_i2c_xfer_msg()
708 if (!omap->b_hw && stop) in omap_i2c_xfer_msg()
720 if (omap->b_hw && stop) { in omap_i2c_xfer_msg()
728 dev_err(omap->dev, "controller timed out " in omap_i2c_xfer_msg()
730 return -ETIMEDOUT; in omap_i2c_xfer_msg()
745 time_left = wait_for_completion_timeout(&omap->cmd_complete, in omap_i2c_xfer_msg()
751 } while (ret == -EAGAIN); in omap_i2c_xfer_msg()
759 return -ETIMEDOUT; in omap_i2c_xfer_msg()
762 if (likely(!omap->cmd_err)) in omap_i2c_xfer_msg()
766 if (omap->cmd_err & (OMAP_I2C_STAT_ROVR | OMAP_I2C_STAT_XUDF)) { in omap_i2c_xfer_msg()
769 return -EIO; in omap_i2c_xfer_msg()
772 if (omap->cmd_err & OMAP_I2C_STAT_AL) in omap_i2c_xfer_msg()
773 return -EAGAIN; in omap_i2c_xfer_msg()
775 if (omap->cmd_err & OMAP_I2C_STAT_NACK) { in omap_i2c_xfer_msg()
776 if (msg->flags & I2C_M_IGNORE_NAK) in omap_i2c_xfer_msg()
782 return -EREMOTEIO; in omap_i2c_xfer_msg()
784 return -EIO; in omap_i2c_xfer_msg()
800 r = pm_runtime_get_sync(omap->dev); in omap_i2c_xfer_common()
812 if (omap->set_mpu_wkup_lat != NULL) in omap_i2c_xfer_common()
813 omap->set_mpu_wkup_lat(omap->dev, omap->latency); in omap_i2c_xfer_common()
816 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)), in omap_i2c_xfer_common()
827 if (omap->set_mpu_wkup_lat != NULL) in omap_i2c_xfer_common()
828 omap->set_mpu_wkup_lat(omap->dev, -1); in omap_i2c_xfer_common()
831 pm_runtime_put_autosuspend(omap->dev); in omap_i2c_xfer_common()
857 omap->cmd_err |= err; in omap_i2c_complete_cmd()
858 complete(&omap->cmd_complete); in omap_i2c_complete_cmd()
888 dev_dbg(omap->dev, "RDR when bus is busy.\n"); in i2c_omap_errata_i207()
904 if (pm_runtime_suspended(omap->dev)) in omap_i2c_omap1_isr()
912 dev_err(omap->dev, "Arbitration lost\n"); in omap_i2c_omap1_isr()
923 if (omap->buf_len) { in omap_i2c_omap1_isr()
925 *omap->buf++ = w; in omap_i2c_omap1_isr()
926 omap->buf_len--; in omap_i2c_omap1_isr()
927 if (omap->buf_len) { in omap_i2c_omap1_isr()
928 *omap->buf++ = w >> 8; in omap_i2c_omap1_isr()
929 omap->buf_len--; in omap_i2c_omap1_isr()
932 dev_err(omap->dev, "RRDY IRQ while no data requested\n"); in omap_i2c_omap1_isr()
935 if (omap->buf_len) { in omap_i2c_omap1_isr()
936 w = *omap->buf++; in omap_i2c_omap1_isr()
937 omap->buf_len--; in omap_i2c_omap1_isr()
938 if (omap->buf_len) { in omap_i2c_omap1_isr()
939 w |= *omap->buf++ << 8; in omap_i2c_omap1_isr()
940 omap->buf_len--; in omap_i2c_omap1_isr()
944 dev_err(omap->dev, "XRDY IRQ while no data to send\n"); in omap_i2c_omap1_isr()
975 omap->cmd_err |= OMAP_I2C_STAT_NACK; in errata_omap3_i462()
980 dev_err(omap->dev, "Arbitration lost\n"); in errata_omap3_i462()
981 omap->cmd_err |= OMAP_I2C_STAT_AL; in errata_omap3_i462()
985 return -EIO; in errata_omap3_i462()
989 } while (--timeout); in errata_omap3_i462()
992 dev_err(omap->dev, "timeout waiting on XUDF bit\n"); in errata_omap3_i462()
1004 while (num_bytes--) { in omap_i2c_receive_data()
1006 *omap->buf++ = w; in omap_i2c_receive_data()
1007 omap->buf_len--; in omap_i2c_receive_data()
1013 if (omap->flags & OMAP_I2C_FLAG_16BIT_DATA_REG) { in omap_i2c_receive_data()
1014 *omap->buf++ = w >> 8; in omap_i2c_receive_data()
1015 omap->buf_len--; in omap_i2c_receive_data()
1025 while (num_bytes--) { in omap_i2c_transmit_data()
1026 w = *omap->buf++; in omap_i2c_transmit_data()
1027 omap->buf_len--; in omap_i2c_transmit_data()
1033 if (omap->flags & OMAP_I2C_FLAG_16BIT_DATA_REG) { in omap_i2c_transmit_data()
1034 w |= *omap->buf++ << 8; in omap_i2c_transmit_data()
1035 omap->buf_len--; in omap_i2c_transmit_data()
1038 if (omap->errata & I2C_OMAP_ERRATA_I462) { in omap_i2c_transmit_data()
1064 if (omap->receiver) in omap_i2c_xfer_data()
1071 err = -EAGAIN; in omap_i2c_xfer_data()
1075 dev_dbg(omap->dev, "IRQ (ISR = 0x%04x)\n", stat); in omap_i2c_xfer_data()
1077 dev_warn(omap->dev, "Too much work in one IRQ\n"); in omap_i2c_xfer_data()
1082 omap->cmd_err |= OMAP_I2C_STAT_NACK; in omap_i2c_xfer_data()
1086 err = -EAGAIN; in omap_i2c_xfer_data()
1092 dev_err(omap->dev, "Arbitration lost\n"); in omap_i2c_xfer_data()
1116 if (omap->fifo_size) in omap_i2c_xfer_data()
1117 num_bytes = omap->buf_len; in omap_i2c_xfer_data()
1119 if (omap->errata & I2C_OMAP_ERRATA_I207) { in omap_i2c_xfer_data()
1133 if (omap->threshold) in omap_i2c_xfer_data()
1134 num_bytes = omap->threshold; in omap_i2c_xfer_data()
1145 if (omap->fifo_size) in omap_i2c_xfer_data()
1146 num_bytes = omap->buf_len; in omap_i2c_xfer_data()
1160 if (omap->threshold) in omap_i2c_xfer_data()
1161 num_bytes = omap->threshold; in omap_i2c_xfer_data()
1172 dev_err(omap->dev, "Receive overrun\n"); in omap_i2c_xfer_data()
1179 dev_err(omap->dev, "Transmit underflow\n"); in omap_i2c_xfer_data()
1196 if (ret != -EAGAIN) in omap_i2c_isr_thread()
1238 .compatible = "ti,omap4-i2c",
1242 .compatible = "ti,omap3-i2c",
1246 .compatible = "ti,omap2430-i2c",
1250 .compatible = "ti,omap2420-i2c",
1311 /* set SCL to high-impedance state (reset value is 0) */ in omap_i2c_prepare_recovery()
1313 /* set SDA to high-impedance state (reset value is 0) */ in omap_i2c_prepare_recovery()
1347 dev_get_platdata(&pdev->dev); in omap_i2c_probe()
1348 struct device_node *node = pdev->dev.of_node; in omap_i2c_probe()
1358 omap = devm_kzalloc(&pdev->dev, sizeof(struct omap_i2c_dev), GFP_KERNEL); in omap_i2c_probe()
1360 return -ENOMEM; in omap_i2c_probe()
1362 omap->base = devm_platform_ioremap_resource(pdev, 0); in omap_i2c_probe()
1363 if (IS_ERR(omap->base)) in omap_i2c_probe()
1364 return PTR_ERR(omap->base); in omap_i2c_probe()
1366 if (pdev->dev.of_node) { in omap_i2c_probe()
1369 pdata = device_get_match_data(&pdev->dev); in omap_i2c_probe()
1370 omap->flags = pdata->flags; in omap_i2c_probe()
1372 of_property_read_u32(node, "clock-frequency", &freq); in omap_i2c_probe()
1374 omap->speed = freq / 1000; in omap_i2c_probe()
1376 omap->speed = pdata->clkrate; in omap_i2c_probe()
1377 omap->flags = pdata->flags; in omap_i2c_probe()
1378 omap->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat; in omap_i2c_probe()
1381 omap->dev = &pdev->dev; in omap_i2c_probe()
1382 omap->irq = irq; in omap_i2c_probe()
1385 init_completion(&omap->cmd_complete); in omap_i2c_probe()
1387 omap->reg_shift = (omap->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; in omap_i2c_probe()
1389 pm_runtime_enable(omap->dev); in omap_i2c_probe()
1390 pm_runtime_set_autosuspend_delay(omap->dev, OMAP_I2C_PM_TIMEOUT); in omap_i2c_probe()
1391 pm_runtime_use_autosuspend(omap->dev); in omap_i2c_probe()
1393 r = pm_runtime_resume_and_get(omap->dev); in omap_i2c_probe()
1398 * Read the Rev hi bit-[15:14] ie scheme this is 1 indicates ver2. in omap_i2c_probe()
1403 rev = readw_relaxed(omap->base + 0x04); in omap_i2c_probe()
1405 omap->scheme = OMAP_I2C_SCHEME(rev); in omap_i2c_probe()
1406 switch (omap->scheme) { in omap_i2c_probe()
1408 omap->regs = (u8 *)reg_map_ip_v1; in omap_i2c_probe()
1409 omap->rev = omap_i2c_read_reg(omap, OMAP_I2C_REV_REG); in omap_i2c_probe()
1410 minor = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev); in omap_i2c_probe()
1411 major = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev); in omap_i2c_probe()
1415 omap->regs = (u8 *)reg_map_ip_v2; in omap_i2c_probe()
1420 omap->rev = rev; in omap_i2c_probe()
1423 omap->errata = 0; in omap_i2c_probe()
1425 if (omap->rev >= OMAP_I2C_REV_ON_2430 && in omap_i2c_probe()
1426 omap->rev < OMAP_I2C_REV_ON_4430_PLUS) in omap_i2c_probe()
1427 omap->errata |= I2C_OMAP_ERRATA_I207; in omap_i2c_probe()
1429 if (omap->rev <= OMAP_I2C_REV_ON_3430_3530) in omap_i2c_probe()
1430 omap->errata |= I2C_OMAP_ERRATA_I462; in omap_i2c_probe()
1432 if (!(omap->flags & OMAP_I2C_FLAG_NO_FIFO)) { in omap_i2c_probe()
1435 /* Set up the fifo size - Get total size */ in omap_i2c_probe()
1437 omap->fifo_size = 0x8 << s; in omap_i2c_probe()
1440 * Set up notification threshold as half the total available in omap_i2c_probe()
1445 omap->fifo_size = (omap->fifo_size / 2); in omap_i2c_probe()
1447 if (omap->rev < OMAP_I2C_REV_ON_3630) in omap_i2c_probe()
1448 omap->b_hw = 1; /* Enable hardware fixes */ in omap_i2c_probe()
1450 /* calculate wakeup latency constraint for MPU */ in omap_i2c_probe()
1451 if (omap->set_mpu_wkup_lat != NULL) in omap_i2c_probe()
1452 omap->latency = (1000000 * omap->fifo_size) / in omap_i2c_probe()
1453 (1000 * omap->speed / 8); in omap_i2c_probe()
1456 if (of_property_present(node, "mux-states")) { in omap_i2c_probe()
1459 mux_state = devm_mux_state_get(&pdev->dev, NULL); in omap_i2c_probe()
1462 dev_dbg(&pdev->dev, "failed to get I2C mux: %d\n", r); in omap_i2c_probe()
1465 omap->mux_state = mux_state; in omap_i2c_probe()
1466 r = mux_state_select(omap->mux_state); in omap_i2c_probe()
1468 dev_err(&pdev->dev, "failed to select I2C mux: %d\n", r); in omap_i2c_probe()
1478 if (omap->rev < OMAP_I2C_OMAP1_REV_2) in omap_i2c_probe()
1479 r = devm_request_irq(&pdev->dev, omap->irq, omap_i2c_omap1_isr, in omap_i2c_probe()
1480 IRQF_NO_SUSPEND, pdev->name, omap); in omap_i2c_probe()
1482 r = devm_request_threaded_irq(&pdev->dev, omap->irq, in omap_i2c_probe()
1485 pdev->name, omap); in omap_i2c_probe()
1488 dev_err(omap->dev, "failure requesting irq %i\n", omap->irq); in omap_i2c_probe()
1492 adap = &omap->adapter; in omap_i2c_probe()
1494 adap->owner = THIS_MODULE; in omap_i2c_probe()
1495 adap->class = I2C_CLASS_DEPRECATED; in omap_i2c_probe()
1496 strscpy(adap->name, "OMAP I2C adapter", sizeof(adap->name)); in omap_i2c_probe()
1497 adap->algo = &omap_i2c_algo; in omap_i2c_probe()
1498 adap->quirks = &omap_i2c_quirks; in omap_i2c_probe()
1499 adap->dev.parent = &pdev->dev; in omap_i2c_probe()
1500 adap->dev.of_node = pdev->dev.of_node; in omap_i2c_probe()
1501 adap->bus_recovery_info = &omap_i2c_bus_recovery_info; in omap_i2c_probe()
1504 adap->nr = pdev->id; in omap_i2c_probe()
1509 dev_info(omap->dev, "bus %d rev%d.%d at %d kHz\n", adap->nr, in omap_i2c_probe()
1510 major, minor, omap->speed); in omap_i2c_probe()
1512 pm_runtime_put_autosuspend(omap->dev); in omap_i2c_probe()
1519 if (omap->mux_state) in omap_i2c_probe()
1520 mux_state_deselect(omap->mux_state); in omap_i2c_probe()
1522 pm_runtime_put_sync(omap->dev); in omap_i2c_probe()
1524 pm_runtime_dont_use_autosuspend(omap->dev); in omap_i2c_probe()
1525 pm_runtime_disable(&pdev->dev); in omap_i2c_probe()
1535 i2c_del_adapter(&omap->adapter); in omap_i2c_remove()
1537 if (omap->mux_state) in omap_i2c_remove()
1538 mux_state_deselect(omap->mux_state); in omap_i2c_remove()
1540 ret = pm_runtime_get_sync(&pdev->dev); in omap_i2c_remove()
1542 dev_err(omap->dev, "Failed to resume hardware, skip disable\n"); in omap_i2c_remove()
1546 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap_i2c_remove()
1547 pm_runtime_put_sync(&pdev->dev); in omap_i2c_remove()
1548 pm_runtime_disable(&pdev->dev); in omap_i2c_remove()
1555 omap->iestate = omap_i2c_read_reg(omap, OMAP_I2C_IE_REG); in omap_i2c_runtime_suspend()
1557 if (omap->scheme == OMAP_I2C_SCHEME_0) in omap_i2c_runtime_suspend()
1563 if (omap->rev < OMAP_I2C_OMAP1_REV_2) { in omap_i2c_runtime_suspend()
1566 omap_i2c_write_reg(omap, OMAP_I2C_STAT_REG, omap->iestate); in omap_i2c_runtime_suspend()
1583 if (!omap->regs) in omap_i2c_runtime_resume()
1594 * If the controller is autosuspended, there is no way to wakeup it once in omap_i2c_suspend()
1598 * Wakeup the controller while runtime pm is enabled, so it is available in omap_i2c_suspend()