Lines Matching +full:i2c +full:- +full:sda +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * TI OMAP I2C master mode driver
7 * Copyright (C) 2004 - 2007 Texas Instruments.
19 #include <linux/delay.h>
20 #include <linux/i2c.h>
29 #include <linux/platform_data/i2c-omap.h>
34 /* I2C controller revisions */
37 /* I2C controller revisions present on specific hardware */
80 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
89 /* I2C Status Register (OMAP_I2C_STAT): */
103 /* I2C WE wakeup enable register */
121 /* I2C Buffer Configuration Register (OMAP_I2C_BUF): */
127 /* I2C Configuration Register (OMAP_I2C_CON): */
128 #define OMAP_I2C_CON_EN (1 << 15) /* I2C module enable */
139 /* I2C SCL time value when Master */
143 /* I2C System Test Register (OMAP_I2C_SYSTEST): */
151 #define OMAP_I2C_SYSTEST_SDA_I_FUNC (1 << 6) /* SDA line input value */
152 #define OMAP_I2C_SYSTEST_SDA_O_FUNC (1 << 5) /* SDA line output value */
153 /* SDA/SCL IO mode */
156 #define OMAP_I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense in */
157 #define OMAP_I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive out */
182 int reg_shift; /* bit shift for I2C register addresses */
203 unsigned bb_valid:1; /* true when BB-bit reflects
204 * the I2C bus state
268 writew_relaxed(val, omap->base + in omap_i2c_write_reg()
269 (omap->regs[reg] << omap->reg_shift)); in omap_i2c_write_reg()
274 return readw_relaxed(omap->base + in omap_i2c_read_reg()
275 (omap->regs[reg] << omap->reg_shift)); in omap_i2c_read_reg()
283 /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ in __omap_i2c_init()
284 omap_i2c_write_reg(omap, OMAP_I2C_PSC_REG, omap->pscstate); in __omap_i2c_init()
287 omap_i2c_write_reg(omap, OMAP_I2C_SCLL_REG, omap->scllstate); in __omap_i2c_init()
288 omap_i2c_write_reg(omap, OMAP_I2C_SCLH_REG, omap->sclhstate); in __omap_i2c_init()
289 if (omap->rev >= OMAP_I2C_REV_ON_3430_3530) in __omap_i2c_init()
290 omap_i2c_write_reg(omap, OMAP_I2C_WE_REG, omap->westate); in __omap_i2c_init()
292 /* Take the I2C module out of reset: */ in __omap_i2c_init()
305 if (omap->iestate) in __omap_i2c_init()
306 omap_i2c_write_reg(omap, OMAP_I2C_IE_REG, omap->iestate); in __omap_i2c_init()
314 if (omap->rev >= OMAP_I2C_OMAP1_REV_2) { in omap_i2c_reset()
317 /* Disable I2C controller before soft reset */ in omap_i2c_reset()
330 dev_warn(omap->dev, "timeout waiting " in omap_i2c_reset()
332 return -ETIMEDOUT; in omap_i2c_reset()
340 if (omap->rev > OMAP_I2C_REV_ON_3430_3530) { in omap_i2c_reset()
341 /* Schedule I2C-bus monitoring on the next transfer */ in omap_i2c_reset()
342 omap->bb_valid = 0; in omap_i2c_reset()
358 if (omap->rev >= OMAP_I2C_REV_ON_3430_3530) { in omap_i2c_init()
360 * Enabling all wakup sources to stop I2C freezing on in omap_i2c_init()
364 omap->westate = OMAP_I2C_WE_ALL; in omap_i2c_init()
367 if (omap->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { in omap_i2c_init()
369 * The I2C functional clock is the armxor_ck, so there's in omap_i2c_init()
374 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init()
377 dev_err(omap->dev, "could not get fck: %i\n", error); in omap_i2c_init()
385 /* TRM for 5912 says the I2C clock must be prescaled to be in omap_i2c_init()
386 * between 7 - 12 MHz. The XOR input clock is typically in omap_i2c_init()
398 if (!(omap->flags & OMAP_I2C_FLAG_SIMPLE_CLOCK)) { in omap_i2c_init()
406 if (omap->speed > 400 || in omap_i2c_init()
407 omap->flags & OMAP_I2C_FLAG_FORCE_19200_INT_CLK) in omap_i2c_init()
409 else if (omap->speed > 100) in omap_i2c_init()
413 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init()
416 dev_err(omap->dev, "could not get fck: %i\n", error); in omap_i2c_init()
425 psc = psc - 1; in omap_i2c_init()
428 if (omap->speed > 400) { in omap_i2c_init()
433 fsscll = scl - (scl / 3) - 7; in omap_i2c_init()
434 fssclh = (scl / 3) - 5; in omap_i2c_init()
437 scl = fclk_rate / omap->speed; in omap_i2c_init()
438 hsscll = scl - (scl / 3) - 7; in omap_i2c_init()
439 hssclh = (scl / 3) - 5; in omap_i2c_init()
440 } else if (omap->speed > 100) { in omap_i2c_init()
444 scl = internal_clk / omap->speed; in omap_i2c_init()
445 fsscll = scl - (scl / 3) - 7; in omap_i2c_init()
446 fssclh = (scl / 3) - 5; in omap_i2c_init()
449 fsscll = internal_clk / (omap->speed * 2) - 7; in omap_i2c_init()
450 fssclh = internal_clk / (omap->speed * 2) - 5; in omap_i2c_init()
459 scll = fclk_rate / (omap->speed * 2) - 7 + psc; in omap_i2c_init()
460 sclh = fclk_rate / (omap->speed * 2) - 7 + psc; in omap_i2c_init()
463 omap->iestate = (OMAP_I2C_IE_XRDY | OMAP_I2C_IE_RRDY | in omap_i2c_init()
465 OMAP_I2C_IE_AL) | ((omap->fifo_size) ? in omap_i2c_init()
468 omap->pscstate = psc; in omap_i2c_init()
469 omap->scllstate = scll; in omap_i2c_init()
470 omap->sclhstate = sclh; in omap_i2c_init()
472 if (omap->rev <= OMAP_I2C_REV_ON_3430_3530) { in omap_i2c_init()
474 omap->bb_valid = 1; in omap_i2c_init()
483 * Try bus recovery, but only if SDA is actually low.
494 return -EBUSY; /* recovery would not fix SCL */ in omap_i2c_recover_bus()
495 return i2c_recover_bus(&omap->adapter); in omap_i2c_recover_bus()
516 * Wait while BB-bit doesn't reflect the I2C bus state
518 * In a multimaster environment, after IP software reset, BB-bit value doesn't
519 * correspond to the current bus state. It may happen what BB-bit will be 0,
520 * while the bus is busy due to another I2C master activity.
521 * Here are BB-bit values after reset:
522 * SDA SCL BB NOTES
527 * Later, if IP detect SDA=0 and SCL=1 (ACK) or SDA 1->0 while SCL=1 (START)
528 * combinations on the bus, it set BB-bit to 1.
529 * If IP detect SDA 0->1 while SCL=1 (STOP) combination on the bus,
530 * it set BB-bit to 0 and BF to 1.
538 * starting to drive SDA low. In that case IP corrupt data
550 if (omap->bb_valid) in omap_i2c_wait_for_bb_valid()
558 * activity on the I2C bus. Now IP correctly tracks the bus in omap_i2c_wait_for_bb_valid()
559 * state. BB-bit value is valid. in omap_i2c_wait_for_bb_valid()
578 * SDA and SCL lines was high for 10 ms without bus in omap_i2c_wait_for_bb_valid()
580 * BB-bit value is valid. in omap_i2c_wait_for_bb_valid()
590 * SDA or SCL were low for the entire timeout without in omap_i2c_wait_for_bb_valid()
594 dev_warn(omap->dev, "timeout waiting for bus ready\n"); in omap_i2c_wait_for_bb_valid()
601 omap->bb_valid = 1; in omap_i2c_wait_for_bb_valid()
609 if (omap->flags & OMAP_I2C_FLAG_NO_FIFO) in omap_i2c_resize_fifo()
619 omap->threshold = clamp(size, (u8) 1, omap->fifo_size); in omap_i2c_resize_fifo()
626 buf |= ((omap->threshold - 1) << 8) | OMAP_I2C_BUF_RXFIF_CLR; in omap_i2c_resize_fifo()
630 buf |= (omap->threshold - 1) | OMAP_I2C_BUF_TXFIF_CLR; in omap_i2c_resize_fifo()
635 if (omap->rev < OMAP_I2C_REV_ON_3630) in omap_i2c_resize_fifo()
636 omap->b_hw = 1; /* Enable hardware fixes */ in omap_i2c_resize_fifo()
639 if (omap->set_mpu_wkup_lat != NULL) in omap_i2c_resize_fifo()
640 omap->latency = (1000000 * omap->threshold) / in omap_i2c_resize_fifo()
641 (1000 * omap->speed / 8); in omap_i2c_resize_fifo()
667 dev_dbg(omap->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n", in omap_i2c_xfer_msg()
668 msg->addr, msg->len, msg->flags, stop); in omap_i2c_xfer_msg()
670 omap->receiver = !!(msg->flags & I2C_M_RD); in omap_i2c_xfer_msg()
671 omap_i2c_resize_fifo(omap, msg->len, omap->receiver); in omap_i2c_xfer_msg()
673 omap_i2c_write_reg(omap, OMAP_I2C_SA_REG, msg->addr); in omap_i2c_xfer_msg()
676 omap->buf = msg->buf; in omap_i2c_xfer_msg()
677 omap->buf_len = msg->len; in omap_i2c_xfer_msg()
679 /* make sure writes to omap->buf_len are ordered */ in omap_i2c_xfer_msg()
682 omap_i2c_write_reg(omap, OMAP_I2C_CNT_REG, omap->buf_len); in omap_i2c_xfer_msg()
690 reinit_completion(&omap->cmd_complete); in omap_i2c_xfer_msg()
691 omap->cmd_err = 0; in omap_i2c_xfer_msg()
696 if (omap->speed > 400) in omap_i2c_xfer_msg()
699 if (msg->flags & I2C_M_STOP) in omap_i2c_xfer_msg()
701 if (msg->flags & I2C_M_TEN) in omap_i2c_xfer_msg()
703 if (!(msg->flags & I2C_M_RD)) in omap_i2c_xfer_msg()
706 if (!omap->b_hw && stop) in omap_i2c_xfer_msg()
718 if (omap->b_hw && stop) { in omap_i2c_xfer_msg()
719 unsigned long delay = jiffies + OMAP_I2C_TIMEOUT; in omap_i2c_xfer_msg() local
724 /* Let the user know if i2c is in a bad state */ in omap_i2c_xfer_msg()
725 if (time_after(jiffies, delay)) { in omap_i2c_xfer_msg()
726 dev_err(omap->dev, "controller timed out " in omap_i2c_xfer_msg()
728 return -ETIMEDOUT; in omap_i2c_xfer_msg()
743 time_left = wait_for_completion_timeout(&omap->cmd_complete, in omap_i2c_xfer_msg()
749 } while (ret == -EAGAIN); in omap_i2c_xfer_msg()
757 return -ETIMEDOUT; in omap_i2c_xfer_msg()
760 if (likely(!omap->cmd_err)) in omap_i2c_xfer_msg()
764 if (omap->cmd_err & (OMAP_I2C_STAT_ROVR | OMAP_I2C_STAT_XUDF)) { in omap_i2c_xfer_msg()
767 return -EIO; in omap_i2c_xfer_msg()
770 if (omap->cmd_err & OMAP_I2C_STAT_AL) in omap_i2c_xfer_msg()
771 return -EAGAIN; in omap_i2c_xfer_msg()
773 if (omap->cmd_err & OMAP_I2C_STAT_NACK) { in omap_i2c_xfer_msg()
774 if (msg->flags & I2C_M_IGNORE_NAK) in omap_i2c_xfer_msg()
780 return -EREMOTEIO; in omap_i2c_xfer_msg()
782 return -EIO; in omap_i2c_xfer_msg()
798 r = pm_runtime_get_sync(omap->dev); in omap_i2c_xfer_common()
810 if (omap->set_mpu_wkup_lat != NULL) in omap_i2c_xfer_common()
811 omap->set_mpu_wkup_lat(omap->dev, omap->latency); in omap_i2c_xfer_common()
814 r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)), in omap_i2c_xfer_common()
825 if (omap->set_mpu_wkup_lat != NULL) in omap_i2c_xfer_common()
826 omap->set_mpu_wkup_lat(omap->dev, -1); in omap_i2c_xfer_common()
829 pm_runtime_mark_last_busy(omap->dev); in omap_i2c_xfer_common()
830 pm_runtime_put_autosuspend(omap->dev); in omap_i2c_xfer_common()
856 omap->cmd_err |= err; in omap_i2c_complete_cmd()
857 complete(&omap->cmd_complete); in omap_i2c_complete_cmd()
869 * I2C Errata(Errata Nos. OMAP2: 1.67, OMAP3: 1.8) in i2c_omap_errata_i207()
887 dev_dbg(omap->dev, "RDR when bus is busy.\n"); in i2c_omap_errata_i207()
903 if (pm_runtime_suspended(omap->dev)) in omap_i2c_omap1_isr()
911 dev_err(omap->dev, "Arbitration lost\n"); in omap_i2c_omap1_isr()
922 if (omap->buf_len) { in omap_i2c_omap1_isr()
924 *omap->buf++ = w; in omap_i2c_omap1_isr()
925 omap->buf_len--; in omap_i2c_omap1_isr()
926 if (omap->buf_len) { in omap_i2c_omap1_isr()
927 *omap->buf++ = w >> 8; in omap_i2c_omap1_isr()
928 omap->buf_len--; in omap_i2c_omap1_isr()
931 dev_err(omap->dev, "RRDY IRQ while no data requested\n"); in omap_i2c_omap1_isr()
934 if (omap->buf_len) { in omap_i2c_omap1_isr()
935 w = *omap->buf++; in omap_i2c_omap1_isr()
936 omap->buf_len--; in omap_i2c_omap1_isr()
937 if (omap->buf_len) { in omap_i2c_omap1_isr()
938 w |= *omap->buf++ << 8; in omap_i2c_omap1_isr()
939 omap->buf_len--; in omap_i2c_omap1_isr()
943 dev_err(omap->dev, "XRDY IRQ while no data to send\n"); in omap_i2c_omap1_isr()
958 * them from the memory to the I2C interface.
974 omap->cmd_err |= OMAP_I2C_STAT_NACK; in errata_omap3_i462()
979 dev_err(omap->dev, "Arbitration lost\n"); in errata_omap3_i462()
980 omap->cmd_err |= OMAP_I2C_STAT_AL; in errata_omap3_i462()
984 return -EIO; in errata_omap3_i462()
988 } while (--timeout); in errata_omap3_i462()
991 dev_err(omap->dev, "timeout waiting on XUDF bit\n"); in errata_omap3_i462()
1003 while (num_bytes--) { in omap_i2c_receive_data()
1005 *omap->buf++ = w; in omap_i2c_receive_data()
1006 omap->buf_len--; in omap_i2c_receive_data()
1012 if (omap->flags & OMAP_I2C_FLAG_16BIT_DATA_REG) { in omap_i2c_receive_data()
1013 *omap->buf++ = w >> 8; in omap_i2c_receive_data()
1014 omap->buf_len--; in omap_i2c_receive_data()
1024 while (num_bytes--) { in omap_i2c_transmit_data()
1025 w = *omap->buf++; in omap_i2c_transmit_data()
1026 omap->buf_len--; in omap_i2c_transmit_data()
1032 if (omap->flags & OMAP_I2C_FLAG_16BIT_DATA_REG) { in omap_i2c_transmit_data()
1033 w |= *omap->buf++ << 8; in omap_i2c_transmit_data()
1034 omap->buf_len--; in omap_i2c_transmit_data()
1037 if (omap->errata & I2C_OMAP_ERRATA_I462) { in omap_i2c_transmit_data()
1080 if (omap->receiver) in omap_i2c_xfer_data()
1087 err = -EAGAIN; in omap_i2c_xfer_data()
1091 dev_dbg(omap->dev, "IRQ (ISR = 0x%04x)\n", stat); in omap_i2c_xfer_data()
1093 dev_warn(omap->dev, "Too much work in one IRQ\n"); in omap_i2c_xfer_data()
1103 dev_err(omap->dev, "Arbitration lost\n"); in omap_i2c_xfer_data()
1127 if (omap->fifo_size) in omap_i2c_xfer_data()
1128 num_bytes = omap->buf_len; in omap_i2c_xfer_data()
1130 if (omap->errata & I2C_OMAP_ERRATA_I207) { in omap_i2c_xfer_data()
1144 if (omap->threshold) in omap_i2c_xfer_data()
1145 num_bytes = omap->threshold; in omap_i2c_xfer_data()
1156 if (omap->fifo_size) in omap_i2c_xfer_data()
1157 num_bytes = omap->buf_len; in omap_i2c_xfer_data()
1171 if (omap->threshold) in omap_i2c_xfer_data()
1172 num_bytes = omap->threshold; in omap_i2c_xfer_data()
1183 dev_err(omap->dev, "Receive overrun\n"); in omap_i2c_xfer_data()
1190 dev_err(omap->dev, "Transmit underflow\n"); in omap_i2c_xfer_data()
1207 if (ret != -EAGAIN) in omap_i2c_isr_thread()
1249 .compatible = "ti,omap4-i2c",
1253 .compatible = "ti,omap3-i2c",
1257 .compatible = "ti,omap2430-i2c",
1261 .compatible = "ti,omap2420-i2c",
1320 /* select SDA/SCL IO mode */ in omap_i2c_prepare_recovery()
1322 /* set SCL to high-impedance state (reset value is 0) */ in omap_i2c_prepare_recovery()
1324 /* set SDA to high-impedance state (reset value is 0) */ in omap_i2c_prepare_recovery()
1358 dev_get_platdata(&pdev->dev); in omap_i2c_probe()
1359 struct device_node *node = pdev->dev.of_node; in omap_i2c_probe()
1369 omap = devm_kzalloc(&pdev->dev, sizeof(struct omap_i2c_dev), GFP_KERNEL); in omap_i2c_probe()
1371 return -ENOMEM; in omap_i2c_probe()
1373 omap->base = devm_platform_ioremap_resource(pdev, 0); in omap_i2c_probe()
1374 if (IS_ERR(omap->base)) in omap_i2c_probe()
1375 return PTR_ERR(omap->base); in omap_i2c_probe()
1377 if (pdev->dev.of_node) { in omap_i2c_probe()
1380 pdata = device_get_match_data(&pdev->dev); in omap_i2c_probe()
1381 omap->flags = pdata->flags; in omap_i2c_probe()
1383 of_property_read_u32(node, "clock-frequency", &freq); in omap_i2c_probe()
1385 omap->speed = freq / 1000; in omap_i2c_probe()
1387 omap->speed = pdata->clkrate; in omap_i2c_probe()
1388 omap->flags = pdata->flags; in omap_i2c_probe()
1389 omap->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat; in omap_i2c_probe()
1392 omap->dev = &pdev->dev; in omap_i2c_probe()
1393 omap->irq = irq; in omap_i2c_probe()
1396 init_completion(&omap->cmd_complete); in omap_i2c_probe()
1398 omap->reg_shift = (omap->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; in omap_i2c_probe()
1400 pm_runtime_enable(omap->dev); in omap_i2c_probe()
1401 pm_runtime_set_autosuspend_delay(omap->dev, OMAP_I2C_PM_TIMEOUT); in omap_i2c_probe()
1402 pm_runtime_use_autosuspend(omap->dev); in omap_i2c_probe()
1404 r = pm_runtime_resume_and_get(omap->dev); in omap_i2c_probe()
1409 * Read the Rev hi bit-[15:14] ie scheme this is 1 indicates ver2. in omap_i2c_probe()
1414 rev = readw_relaxed(omap->base + 0x04); in omap_i2c_probe()
1416 omap->scheme = OMAP_I2C_SCHEME(rev); in omap_i2c_probe()
1417 switch (omap->scheme) { in omap_i2c_probe()
1419 omap->regs = (u8 *)reg_map_ip_v1; in omap_i2c_probe()
1420 omap->rev = omap_i2c_read_reg(omap, OMAP_I2C_REV_REG); in omap_i2c_probe()
1421 minor = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev); in omap_i2c_probe()
1422 major = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev); in omap_i2c_probe()
1426 omap->regs = (u8 *)reg_map_ip_v2; in omap_i2c_probe()
1431 omap->rev = rev; in omap_i2c_probe()
1434 omap->errata = 0; in omap_i2c_probe()
1436 if (omap->rev >= OMAP_I2C_REV_ON_2430 && in omap_i2c_probe()
1437 omap->rev < OMAP_I2C_REV_ON_4430_PLUS) in omap_i2c_probe()
1438 omap->errata |= I2C_OMAP_ERRATA_I207; in omap_i2c_probe()
1440 if (omap->rev <= OMAP_I2C_REV_ON_3430_3530) in omap_i2c_probe()
1441 omap->errata |= I2C_OMAP_ERRATA_I462; in omap_i2c_probe()
1443 if (!(omap->flags & OMAP_I2C_FLAG_NO_FIFO)) { in omap_i2c_probe()
1446 /* Set up the fifo size - Get total size */ in omap_i2c_probe()
1448 omap->fifo_size = 0x8 << s; in omap_i2c_probe()
1456 omap->fifo_size = (omap->fifo_size / 2); in omap_i2c_probe()
1458 if (omap->rev < OMAP_I2C_REV_ON_3630) in omap_i2c_probe()
1459 omap->b_hw = 1; /* Enable hardware fixes */ in omap_i2c_probe()
1462 if (omap->set_mpu_wkup_lat != NULL) in omap_i2c_probe()
1463 omap->latency = (1000000 * omap->fifo_size) / in omap_i2c_probe()
1464 (1000 * omap->speed / 8); in omap_i2c_probe()
1470 if (omap->rev < OMAP_I2C_OMAP1_REV_2) in omap_i2c_probe()
1471 r = devm_request_irq(&pdev->dev, omap->irq, omap_i2c_omap1_isr, in omap_i2c_probe()
1472 IRQF_NO_SUSPEND, pdev->name, omap); in omap_i2c_probe()
1474 r = devm_request_threaded_irq(&pdev->dev, omap->irq, in omap_i2c_probe()
1477 pdev->name, omap); in omap_i2c_probe()
1480 dev_err(omap->dev, "failure requesting irq %i\n", omap->irq); in omap_i2c_probe()
1484 adap = &omap->adapter; in omap_i2c_probe()
1486 adap->owner = THIS_MODULE; in omap_i2c_probe()
1487 adap->class = I2C_CLASS_DEPRECATED; in omap_i2c_probe()
1488 strscpy(adap->name, "OMAP I2C adapter", sizeof(adap->name)); in omap_i2c_probe()
1489 adap->algo = &omap_i2c_algo; in omap_i2c_probe()
1490 adap->quirks = &omap_i2c_quirks; in omap_i2c_probe()
1491 adap->dev.parent = &pdev->dev; in omap_i2c_probe()
1492 adap->dev.of_node = pdev->dev.of_node; in omap_i2c_probe()
1493 adap->bus_recovery_info = &omap_i2c_bus_recovery_info; in omap_i2c_probe()
1495 /* i2c device drivers may be active on return from add_adapter() */ in omap_i2c_probe()
1496 adap->nr = pdev->id; in omap_i2c_probe()
1501 dev_info(omap->dev, "bus %d rev%d.%d at %d kHz\n", adap->nr, in omap_i2c_probe()
1502 major, minor, omap->speed); in omap_i2c_probe()
1504 pm_runtime_mark_last_busy(omap->dev); in omap_i2c_probe()
1505 pm_runtime_put_autosuspend(omap->dev); in omap_i2c_probe()
1511 pm_runtime_dont_use_autosuspend(omap->dev); in omap_i2c_probe()
1512 pm_runtime_put_sync(omap->dev); in omap_i2c_probe()
1514 pm_runtime_disable(&pdev->dev); in omap_i2c_probe()
1524 i2c_del_adapter(&omap->adapter); in omap_i2c_remove()
1526 ret = pm_runtime_get_sync(&pdev->dev); in omap_i2c_remove()
1528 dev_err(omap->dev, "Failed to resume hardware, skip disable\n"); in omap_i2c_remove()
1532 pm_runtime_dont_use_autosuspend(&pdev->dev); in omap_i2c_remove()
1533 pm_runtime_put_sync(&pdev->dev); in omap_i2c_remove()
1534 pm_runtime_disable(&pdev->dev); in omap_i2c_remove()
1541 omap->iestate = omap_i2c_read_reg(omap, OMAP_I2C_IE_REG); in omap_i2c_runtime_suspend()
1543 if (omap->scheme == OMAP_I2C_SCHEME_0) in omap_i2c_runtime_suspend()
1549 if (omap->rev < OMAP_I2C_OMAP1_REV_2) { in omap_i2c_runtime_suspend()
1552 omap_i2c_write_reg(omap, OMAP_I2C_STAT_REG, omap->iestate); in omap_i2c_runtime_suspend()
1569 if (!omap->regs) in omap_i2c_runtime_resume()
1616 /* I2C may be needed to bring up other drivers */
1631 MODULE_DESCRIPTION("TI OMAP I2C bus adapter");