Lines Matching +full:npcm750 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
3 * Nuvoton NPCM7xx I2C Controller driver
11 #include <linux/i2c.h>
29 * External I2C Interface driver xfer indication values, which indicate status
58 /* I2C Bank (module had 2 banks of registers) */
64 /* Internal I2C states values (for the I2C module state machine). */
125 #define NPCM_I2CTXF_CTL 0x12 /* Tx-FIFO Control */
128 #define NPCM_I2CTXF_STS 0x1A /* Tx-FIFO Status */
129 #define NPCM_I2CRXF_STS 0x1C /* Rx-FIFO Status */
130 #define NPCM_I2CRXF_CTL 0x1E /* Rx-FIFO Control */
549 /* Status of one I2C module */
602 u8 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
608 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
613 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_init_params()
614 bus->rd_size = 0; in npcm_i2c_init_params()
615 bus->wr_size = 0; in npcm_i2c_init_params()
616 bus->rd_ind = 0; in npcm_i2c_init_params()
617 bus->wr_ind = 0; in npcm_i2c_init_params()
618 bus->read_block_use = false; in npcm_i2c_init_params()
619 bus->int_time_stamp = 0; in npcm_i2c_init_params()
620 bus->PEC_use = false; in npcm_i2c_init_params()
621 bus->PEC_mask = 0; in npcm_i2c_init_params()
623 if (bus->slave) in npcm_i2c_init_params()
624 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_init_params()
630 iowrite8(data, bus->reg + NPCM_I2CSDA); in npcm_i2c_wr_byte()
635 return ioread8(bus->reg + NPCM_I2CSDA); in npcm_i2c_rd_byte()
642 return !!(I2CCTL3_SCL_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SCL()
649 return !!(I2CCTL3_SDA_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SDA()
654 if (bus->operation == I2C_READ_OPER) in npcm_i2c_get_index()
655 return bus->rd_ind; in npcm_i2c_get_index()
656 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_get_index()
657 return bus->wr_ind; in npcm_i2c_get_index()
664 return bus->wr_size == 0 && bus->rd_size == 0; in npcm_i2c_is_quick()
676 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_disable()
680 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
682 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
684 bus->state = I2C_DISABLE; in npcm_i2c_disable()
689 u8 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
692 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
693 bus->state = I2C_IDLE; in npcm_i2c_enable()
702 val = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
704 iowrite8(val, bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
706 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
712 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
719 tx_fifo_sts = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_tx_fifo_empty()
721 if ((tx_fifo_sts & bus->data->txf_sts_tx_bytes) == 0) in npcm_i2c_tx_fifo_empty()
732 rx_fifo_sts = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_rx_fifo_full()
734 if ((rx_fifo_sts & bus->data->rxf_sts_rx_bytes) == 0) in npcm_i2c_rx_fifo_full()
745 val = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
747 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
754 val = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
756 iowrite8(val, bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
763 val = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
765 iowrite8(val, bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
772 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
778 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
785 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
788 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
796 * override HW issue: I2C may fail to supply stop condition in Master in npcm_i2c_master_stop()
801 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
804 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
806 if (!bus->fifo_use) in npcm_i2c_master_stop()
811 if (bus->operation == I2C_READ_OPER) in npcm_i2c_master_stop()
816 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_master_stop()
823 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
829 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
836 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
839 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
848 iowrite8(val, bus->reg + NPCM_I2CST); in npcm_i2c_clear_master_status()
857 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
863 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
875 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
880 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
883 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
888 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
892 dev_err(bus->dev, "try to enable more than 2 SA not supported\n"); in npcm_i2c_slave_enable()
895 return -EFAULT; in npcm_i2c_slave_enable()
898 iowrite8(sa_reg, bus->reg + npcm_i2caddr[addr_type]); in npcm_i2c_slave_enable()
916 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
923 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
926 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_reset()
927 iowrite8(0xFF, bus->reg + NPCM_I2CST); in npcm_i2c_reset()
933 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_reset()
936 if (bus->slave) { in npcm_i2c_reset()
937 addr = bus->slave->addr; in npcm_i2c_reset()
945 bus->state = I2C_IDLE; in npcm_i2c_reset()
950 return !!FIELD_GET(NPCM_I2CST_MASTER, ioread8(bus->reg + NPCM_I2CST)); in npcm_i2c_is_master()
960 msgs = bus->msgs; in npcm_i2c_callback()
961 msgs_num = bus->msgs_num; in npcm_i2c_callback()
963 * check that transaction was not timed-out, and msgs still in npcm_i2c_callback()
969 if (completion_done(&bus->cmd_complete)) in npcm_i2c_callback()
974 bus->cmd_err = bus->msgs_num; in npcm_i2c_callback()
975 if (bus->tx_complete_cnt < ULLONG_MAX) in npcm_i2c_callback()
976 bus->tx_complete_cnt++; in npcm_i2c_callback()
980 if (bus->msgs) { in npcm_i2c_callback()
991 bus->cmd_err = -ENXIO; in npcm_i2c_callback()
996 bus->cmd_err = -EAGAIN; in npcm_i2c_callback()
1000 /* I2C wake up */ in npcm_i2c_callback()
1006 bus->operation = I2C_NO_OPER; in npcm_i2c_callback()
1008 if (bus->slave) in npcm_i2c_callback()
1009 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_callback()
1012 complete(&bus->cmd_complete); in npcm_i2c_callback()
1017 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_fifo_usage()
1018 return (bus->data->txf_sts_tx_bytes & in npcm_i2c_fifo_usage()
1019 ioread8(bus->reg + NPCM_I2CTXF_STS)); in npcm_i2c_fifo_usage()
1020 if (bus->operation == I2C_READ_OPER) in npcm_i2c_fifo_usage()
1021 return (bus->data->rxf_sts_rx_bytes & in npcm_i2c_fifo_usage()
1022 ioread8(bus->reg + NPCM_I2CRXF_STS)); in npcm_i2c_fifo_usage()
1034 size_free_fifo = bus->data->fifo_size - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
1035 while (max_bytes-- && size_free_fifo) { in npcm_i2c_write_to_fifo_master()
1036 if (bus->wr_ind < bus->wr_size) in npcm_i2c_write_to_fifo_master()
1037 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_write_to_fifo_master()
1040 size_free_fifo = bus->data->fifo_size - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
1046 * configure the FIFO before using it. If nread is -1 RX FIFO will not be
1053 if (!bus->fifo_use) in npcm_i2c_set_fifo()
1061 rxf_ctl = min_t(int, nread, bus->data->fifo_size); in npcm_i2c_set_fifo()
1064 if (nread <= bus->data->fifo_size) in npcm_i2c_set_fifo()
1065 rxf_ctl |= bus->data->rxf_ctl_last_pec; in npcm_i2c_set_fifo()
1072 if (bus->rd_ind == 0 && bus->read_block_use) { in npcm_i2c_set_fifo()
1078 iowrite8(rxf_ctl, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_set_fifo()
1083 if (nwrite > bus->data->fifo_size) in npcm_i2c_set_fifo()
1085 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
1087 iowrite8(nwrite, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
1097 while (bytes_in_fifo--) { in npcm_i2c_read_fifo()
1099 if (bus->rd_ind < bus->rd_size) in npcm_i2c_read_fifo()
1100 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_read_fifo()
1121 dev_err(bus->dev, "get slave: try to use more than 2 SA not supported\n"); in npcm_i2c_get_slave_addr()
1123 slave_add = ioread8(bus->reg + npcm_i2caddr[(int)addr_type]); in npcm_i2c_get_slave_addr()
1136 if (ioread8(bus->reg + npcm_i2caddr[i]) == slave_add) in npcm_i2c_remove_slave_addr()
1137 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_remove_slave_addr()
1151 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_write_fifo_slave()
1152 while (max_bytes-- && bus->data->fifo_size != npcm_i2c_fifo_usage(bus)) { in npcm_i2c_write_fifo_slave()
1153 if (bus->slv_wr_size <= 0) in npcm_i2c_write_fifo_slave()
1155 bus->slv_wr_ind = bus->slv_wr_ind & (bus->data->fifo_size - 1); in npcm_i2c_write_fifo_slave()
1156 npcm_i2c_wr_byte(bus, bus->slv_wr_buf[bus->slv_wr_ind]); in npcm_i2c_write_fifo_slave()
1157 bus->slv_wr_ind++; in npcm_i2c_write_fifo_slave()
1158 bus->slv_wr_ind = bus->slv_wr_ind & (bus->data->fifo_size - 1); in npcm_i2c_write_fifo_slave()
1159 bus->slv_wr_size--; in npcm_i2c_write_fifo_slave()
1167 if (!bus->slave) in npcm_i2c_read_fifo_slave()
1170 while (bytes_in_fifo--) { in npcm_i2c_read_fifo_slave()
1173 bus->slv_rd_ind = bus->slv_rd_ind & (bus->data->fifo_size - 1); in npcm_i2c_read_fifo_slave()
1174 bus->slv_rd_buf[bus->slv_rd_ind] = data; in npcm_i2c_read_fifo_slave()
1175 bus->slv_rd_ind++; in npcm_i2c_read_fifo_slave()
1178 if (bus->slv_rd_ind == 1 && bus->read_block_use) in npcm_i2c_read_fifo_slave()
1179 bus->slv_rd_size = data + bus->PEC_use + 1; in npcm_i2c_read_fifo_slave()
1188 int ret = bus->slv_wr_ind; in npcm_i2c_slave_get_wr_buf()
1191 for (i = 0; i < bus->data->fifo_size; i++) { in npcm_i2c_slave_get_wr_buf()
1192 if (bus->slv_wr_size >= bus->data->fifo_size) in npcm_i2c_slave_get_wr_buf()
1194 if (bus->state == I2C_SLAVE_MATCH) { in npcm_i2c_slave_get_wr_buf()
1195 i2c_slave_event(bus->slave, I2C_SLAVE_READ_REQUESTED, &value); in npcm_i2c_slave_get_wr_buf()
1196 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_get_wr_buf()
1198 i2c_slave_event(bus->slave, I2C_SLAVE_READ_PROCESSED, &value); in npcm_i2c_slave_get_wr_buf()
1200 ind = (bus->slv_wr_ind + bus->slv_wr_size) & (bus->data->fifo_size - 1); in npcm_i2c_slave_get_wr_buf()
1201 bus->slv_wr_buf[ind] = value; in npcm_i2c_slave_get_wr_buf()
1202 bus->slv_wr_size++; in npcm_i2c_slave_get_wr_buf()
1204 return bus->data->fifo_size - ret; in npcm_i2c_slave_get_wr_buf()
1211 for (i = 0; i < bus->slv_rd_ind; i++) in npcm_i2c_slave_send_rd_buf()
1212 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_RECEIVED, in npcm_i2c_slave_send_rd_buf()
1213 &bus->slv_rd_buf[i]); in npcm_i2c_slave_send_rd_buf()
1218 if (bus->slv_rd_ind) { in npcm_i2c_slave_send_rd_buf()
1219 bus->slv_wr_size = 0; in npcm_i2c_slave_send_rd_buf()
1220 bus->slv_wr_ind = 0; in npcm_i2c_slave_send_rd_buf()
1223 bus->slv_rd_ind = 0; in npcm_i2c_slave_send_rd_buf()
1224 bus->slv_rd_size = bus->adap.quirks->max_read_len; in npcm_i2c_slave_send_rd_buf()
1233 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_receive()
1234 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_receive()
1235 bus->slv_rd_size = nread; in npcm_i2c_slave_receive()
1236 bus->slv_rd_ind = 0; in npcm_i2c_slave_receive()
1238 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_slave_receive()
1239 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_slave_receive()
1250 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_xmit()
1263 * NACK on read will be once reached to bus->adap->quirks->max_read_len.
1272 left_in_fifo = bus->data->txf_sts_tx_bytes & in npcm_i2c_slave_wr_buf_sync()
1273 ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_slave_wr_buf_sync()
1276 if (left_in_fifo >= bus->data->fifo_size || in npcm_i2c_slave_wr_buf_sync()
1277 bus->slv_wr_size >= bus->data->fifo_size) in npcm_i2c_slave_wr_buf_sync()
1281 bus->slv_wr_ind = bus->slv_wr_ind - left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1282 bus->slv_wr_size = bus->slv_wr_size + left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1284 if (bus->slv_wr_ind < 0) in npcm_i2c_slave_wr_buf_sync()
1285 bus->slv_wr_ind += bus->data->fifo_size; in npcm_i2c_slave_wr_buf_sync()
1290 if (NPCM_I2CST_XMIT & ioread8(bus->reg + NPCM_I2CST)) { in npcm_i2c_slave_rd_wr()
1295 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_rd_wr()
1296 npcm_i2c_slave_xmit(bus, bus->adap.quirks->max_write_len, in npcm_i2c_slave_rd_wr()
1297 bus->slv_wr_buf); in npcm_i2c_slave_rd_wr()
1305 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_rd_wr()
1307 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_slave_rd_wr()
1309 npcm_i2c_slave_receive(bus, bus->adap.quirks->max_read_len, in npcm_i2c_slave_rd_wr()
1310 bus->slv_rd_buf); in npcm_i2c_slave_rd_wr()
1318 u8 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1322 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_int_slave_handler()
1324 if (bus->fifo_use) in npcm_i2c_int_slave_handler()
1327 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1330 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1331 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1332 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1338 iowrite8(NPCM_I2CST_NEGACK, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1349 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_int_slave_handler()
1352 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1354 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1360 if (completion_done(&bus->cmd_complete) == false) { in npcm_i2c_int_slave_handler()
1361 bus->cmd_err = -EIO; in npcm_i2c_int_slave_handler()
1362 complete(&bus->cmd_complete); in npcm_i2c_int_slave_handler()
1364 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1365 iowrite8(NPCM_I2CST_BER, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1373 bus->stop_ind = I2C_SLAVE_DONE_IND; in npcm_i2c_int_slave_handler()
1375 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1382 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1389 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1390 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1391 i2c_slave_event(bus->slave, I2C_SLAVE_STOP, 0); in npcm_i2c_int_slave_handler()
1392 iowrite8(NPCM_I2CST_SLVSTP, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1393 if (bus->fifo_use) { in npcm_i2c_int_slave_handler()
1399 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1401 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1405 /* restart condition occurred and Rx-FIFO was not empty */ in npcm_i2c_int_slave_handler()
1406 if (bus->fifo_use && FIELD_GET(NPCM_I2CFIF_CTS_SLVRSTR, in npcm_i2c_int_slave_handler()
1407 ioread8(bus->reg + NPCM_I2CFIF_CTS))) { in npcm_i2c_int_slave_handler()
1408 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1409 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1410 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1412 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1413 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1416 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1426 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1430 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_int_slave_handler()
1431 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1433 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1435 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_REQUESTED, in npcm_i2c_int_slave_handler()
1437 bus->operation = I2C_READ_OPER; in npcm_i2c_int_slave_handler()
1439 if (bus->own_slave_addr == 0xFF) { in npcm_i2c_int_slave_handler()
1441 val = ioread8(bus->reg + NPCM_I2CCST); in npcm_i2c_int_slave_handler()
1448 i2ccst3 = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_int_slave_handler()
1449 i2ccst2 = ioread8(bus->reg + NPCM_I2CCST2); in npcm_i2c_int_slave_handler()
1452 * the i2c module can response to 10 own SA. in npcm_i2c_int_slave_handler()
1462 bus->own_slave_addr = addr; in npcm_i2c_int_slave_handler()
1463 if (bus->PEC_mask & BIT(info)) in npcm_i2c_int_slave_handler()
1464 bus->PEC_use = true; in npcm_i2c_int_slave_handler()
1466 bus->PEC_use = false; in npcm_i2c_int_slave_handler()
1469 bus->own_slave_addr = 0; in npcm_i2c_int_slave_handler()
1471 bus->own_slave_addr = 0x61; in npcm_i2c_int_slave_handler()
1480 * (regular write-read mode) in npcm_i2c_int_slave_handler()
1482 if ((bus->state == I2C_OPER_STARTED && in npcm_i2c_int_slave_handler()
1483 bus->operation == I2C_READ_OPER && in npcm_i2c_int_slave_handler()
1484 bus->stop_ind == I2C_SLAVE_XMIT_IND) || in npcm_i2c_int_slave_handler()
1485 bus->stop_ind == I2C_SLAVE_RCV_IND) { in npcm_i2c_int_slave_handler()
1487 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1492 bus->stop_ind = I2C_SLAVE_XMIT_IND; in npcm_i2c_int_slave_handler()
1494 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_int_slave_handler()
1495 bus->state = I2C_SLAVE_MATCH; in npcm_i2c_int_slave_handler()
1497 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1501 /* Slave SDA status is set - tx or rx */ in npcm_i2c_int_slave_handler()
1503 (bus->fifo_use && in npcm_i2c_int_slave_handler()
1506 iowrite8(NPCM_I2CST_SDAST, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1525 struct npcm_i2c *bus = i2c_get_adapdata(client->adapter); in npcm_i2c_reg_slave()
1527 bus->slave = client; in npcm_i2c_reg_slave()
1529 if (client->flags & I2C_CLIENT_TEN) in npcm_i2c_reg_slave()
1530 return -EAFNOSUPPORT; in npcm_i2c_reg_slave()
1532 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1535 bus->slv_rd_size = 0; in npcm_i2c_reg_slave()
1536 bus->slv_wr_size = 0; in npcm_i2c_reg_slave()
1537 bus->slv_rd_ind = 0; in npcm_i2c_reg_slave()
1538 bus->slv_wr_ind = 0; in npcm_i2c_reg_slave()
1539 if (client->flags & I2C_CLIENT_PEC) in npcm_i2c_reg_slave()
1540 bus->PEC_use = true; in npcm_i2c_reg_slave()
1542 dev_info(bus->dev, "i2c%d register slave SA=0x%x, PEC=%d\n", bus->num, in npcm_i2c_reg_slave()
1543 client->addr, bus->PEC_use); in npcm_i2c_reg_slave()
1545 npcm_i2c_slave_enable(bus, I2C_SLAVE_ADDR1, client->addr, true); in npcm_i2c_reg_slave()
1551 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1557 struct npcm_i2c *bus = client->adapter->algo_data; in npcm_i2c_unreg_slave()
1560 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1561 if (!bus->slave) { in npcm_i2c_unreg_slave()
1562 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1563 return -EINVAL; in npcm_i2c_unreg_slave()
1566 npcm_i2c_remove_slave_addr(bus, client->addr); in npcm_i2c_unreg_slave()
1567 bus->slave = NULL; in npcm_i2c_unreg_slave()
1568 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1580 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1589 if (rcount < (2 * bus->data->fifo_size) && rcount > bus->data->fifo_size) in npcm_i2c_master_fifo_read()
1590 fifo_bytes = rcount - bus->data->fifo_size; in npcm_i2c_master_fifo_read()
1593 /* last bytes are about to be read - end of tx */ in npcm_i2c_master_fifo_read()
1594 bus->state = I2C_STOP_PENDING; in npcm_i2c_master_fifo_read()
1595 bus->stop_ind = ind; in npcm_i2c_master_fifo_read()
1602 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1603 npcm_i2c_set_fifo(bus, rcount, -1); in npcm_i2c_master_fifo_read()
1611 if (bus->fifo_use) in npcm_i2c_irq_master_handler_write()
1614 /* Master write operation - last byte handling */ in npcm_i2c_irq_master_handler_write()
1615 if (bus->wr_ind == bus->wr_size) { in npcm_i2c_irq_master_handler_write()
1616 if (bus->fifo_use && npcm_i2c_fifo_usage(bus) > 0) in npcm_i2c_irq_master_handler_write()
1626 if (bus->rd_size == 0) { in npcm_i2c_irq_master_handler_write()
1629 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_write()
1630 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_master_handler_write()
1636 /* last write-byte written on previous int - restart */ in npcm_i2c_irq_master_handler_write()
1637 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_master_handler_write()
1642 * Receiving one byte only - stall after successful in npcm_i2c_irq_master_handler_write()
1645 * unintentionally NACK the next multi-byte read. in npcm_i2c_irq_master_handler_write()
1647 if (bus->rd_size == 1) in npcm_i2c_irq_master_handler_write()
1651 bus->operation = I2C_READ_OPER; in npcm_i2c_irq_master_handler_write()
1653 npcm_i2c_wr_byte(bus, bus->dest_addr | 0x1); in npcm_i2c_irq_master_handler_write()
1657 if (!bus->fifo_use || bus->wr_size == 1) { in npcm_i2c_irq_master_handler_write()
1658 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_irq_master_handler_write()
1660 wcount = bus->wr_size - bus->wr_ind; in npcm_i2c_irq_master_handler_write()
1661 npcm_i2c_set_fifo(bus, -1, wcount); in npcm_i2c_irq_master_handler_write()
1674 block_extra_bytes_size = bus->read_block_use + bus->PEC_use; in npcm_i2c_irq_master_handler_read()
1680 if (bus->rd_ind == 0) { /* first byte handling: */ in npcm_i2c_irq_master_handler_read()
1681 if (bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1685 bus->rd_size = data + block_extra_bytes_size; in npcm_i2c_irq_master_handler_read()
1686 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_irq_master_handler_read()
1689 if (bus->fifo_use) { in npcm_i2c_irq_master_handler_read()
1690 data = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1692 iowrite8(data, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1695 npcm_i2c_set_fifo(bus, bus->rd_size - 1, -1); in npcm_i2c_irq_master_handler_read()
1702 if (bus->rd_size == block_extra_bytes_size && in npcm_i2c_irq_master_handler_read()
1703 bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1704 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_read()
1705 bus->stop_ind = I2C_BLOCK_BYTES_ERR_IND; in npcm_i2c_irq_master_handler_read()
1706 bus->cmd_err = -EIO; in npcm_i2c_irq_master_handler_read()
1718 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_nmatch()
1720 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_nmatch()
1721 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_nmatch()
1729 if (bus->nack_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_nack()
1730 bus->nack_cnt++; in npcm_i2c_irq_handle_nack()
1732 if (bus->fifo_use) { in npcm_i2c_irq_handle_nack()
1737 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_irq_handle_nack()
1738 bus->wr_ind -= npcm_i2c_fifo_usage(bus); in npcm_i2c_irq_handle_nack()
1741 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_nack()
1745 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_irq_handle_nack()
1760 readx_poll_timeout_atomic(ioread8, bus->reg + NPCM_I2CCST, val, in npcm_i2c_irq_handle_nack()
1765 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_nack()
1772 npcm_i2c_callback(bus, bus->stop_ind, bus->wr_ind); in npcm_i2c_irq_handle_nack()
1778 if (bus->ber_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_ber()
1779 bus->ber_cnt++; in npcm_i2c_irq_handle_ber()
1780 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_ber()
1784 bus->ber_state = true; in npcm_i2c_irq_handle_ber()
1788 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_irq_handle_ber()
1790 bus->cmd_err = -EAGAIN; in npcm_i2c_irq_handle_ber()
1791 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_ber()
1793 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_ber()
1800 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_eob()
1801 npcm_i2c_callback(bus, bus->stop_ind, bus->rd_ind); in npcm_i2c_irq_handle_eob()
1808 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_handle_stall_after_start()
1809 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_handle_stall_after_start()
1812 } else if ((bus->rd_size == 1) && !bus->read_block_use) { in npcm_i2c_irq_handle_stall_after_start()
1814 * Receiving one byte only - set NACK after ensuring in npcm_i2c_irq_handle_stall_after_start()
1820 /* Reset stall-after-address-byte */ in npcm_i2c_irq_handle_stall_after_start()
1824 iowrite8(NPCM_I2CST_STASTR, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_stall_after_start()
1827 /* SDA status is set - TX or RX, master */
1835 if (bus->state == I2C_IDLE) { in npcm_i2c_irq_handle_sda()
1836 bus->stop_ind = I2C_WAKE_UP_IND; in npcm_i2c_irq_handle_sda()
1838 if (npcm_i2c_is_quick(bus) || bus->read_block_use) in npcm_i2c_irq_handle_sda()
1848 * Receiving one byte only - stall after successful completion in npcm_i2c_irq_handle_sda()
1851 * multi-byte read in npcm_i2c_irq_handle_sda()
1853 if (bus->wr_size == 0 && bus->rd_size == 1) in npcm_i2c_irq_handle_sda()
1856 /* Initiate I2C master tx */ in npcm_i2c_irq_handle_sda()
1861 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1866 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1868 /* re-enable */ in npcm_i2c_irq_handle_sda()
1870 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1879 if (bus->wr_size) in npcm_i2c_irq_handle_sda()
1880 npcm_i2c_set_fifo(bus, -1, bus->wr_size); in npcm_i2c_irq_handle_sda()
1882 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_handle_sda()
1884 bus->state = I2C_OPER_STARTED; in npcm_i2c_irq_handle_sda()
1886 if (npcm_i2c_is_quick(bus) || bus->wr_size) in npcm_i2c_irq_handle_sda()
1887 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_irq_handle_sda()
1889 npcm_i2c_wr_byte(bus, bus->dest_addr | BIT(0)); in npcm_i2c_irq_handle_sda()
1892 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_irq_handle_sda()
1894 else if (bus->operation == I2C_READ_OPER) in npcm_i2c_irq_handle_sda()
1902 int ret = -EIO; in npcm_i2c_int_master_handler()
1904 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_master_handler()
1924 ioread8(bus->reg + NPCM_I2CCTL1)) == 1) && in npcm_i2c_int_master_handler()
1926 ioread8(bus->reg + NPCM_I2CCST3)))) { in npcm_i2c_int_master_handler()
1930 if (bus->slave) in npcm_i2c_int_master_handler()
1931 iowrite8(bus->slave->addr | NPCM_I2CADDR_SAEN, in npcm_i2c_int_master_handler()
1932 bus->reg + NPCM_I2CADDR1); in npcm_i2c_int_master_handler()
1943 /* SDA status is set - TX or RX, master */ in npcm_i2c_int_master_handler()
1945 (bus->fifo_use && in npcm_i2c_int_master_handler()
1960 int status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
1966 dev_dbg(bus->dev, "bus%d-0x%x recovery skipped, bus not stuck", in npcm_i2c_recovery_tgclk()
1967 bus->num, bus->dest_addr); in npcm_i2c_recovery_tgclk()
1969 bus->ber_state = false; in npcm_i2c_recovery_tgclk()
1976 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1979 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_recovery_tgclk()
1980 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_recovery_tgclk()
1987 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1990 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1991 npcm_i2c_set_fifo(bus, -1, 0); in npcm_i2c_recovery_tgclk()
1996 iowrite8(NPCM_I2CCST_TGSCL, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
2003 } while (!done && iter--); in npcm_i2c_recovery_tgclk()
2005 /* If SDA line is released: send start-addr-stop, to re-sync. */ in npcm_i2c_recovery_tgclk()
2008 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_recovery_tgclk()
2026 status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
2028 if (bus->rec_fail_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
2029 bus->rec_fail_cnt++; in npcm_i2c_recovery_tgclk()
2031 if (bus->rec_succ_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
2032 bus->rec_succ_cnt++; in npcm_i2c_recovery_tgclk()
2034 bus->ber_state = false; in npcm_i2c_recovery_tgclk()
2042 struct i2c_bus_recovery_info *rinfo = &bus->rinfo; in npcm_i2c_recovery_init()
2044 rinfo->recover_bus = npcm_i2c_recovery_tgclk; in npcm_i2c_recovery_init()
2047 * npcm i2c HW allows direct reading of SCL and SDA. in npcm_i2c_recovery_init()
2052 rinfo->get_scl = npcm_i2c_get_SCL; in npcm_i2c_recovery_init()
2053 rinfo->get_sda = npcm_i2c_get_SDA; in npcm_i2c_recovery_init()
2054 _adap->bus_recovery_info = rinfo; in npcm_i2c_recovery_init()
2064 * NPCM7XX i2c module timing parameters are dependent on module core clk (APB)
2077 bus->bus_freq = bus_freq_hz; in npcm_i2c_init_clk()
2095 return -EINVAL; in npcm_i2c_init_clk()
2099 if (bus->apb_clk >= smb_timing[scl_table_cnt].core_clk) in npcm_i2c_init_clk()
2103 return -EINVAL; in npcm_i2c_init_clk()
2107 bus->reg + NPCM_I2CCTL2); in npcm_i2c_init_clk()
2112 bus->reg + NPCM_I2CCTL3); in npcm_i2c_init_clk()
2120 * k1 = 2 * SCLLT7-0 -> Low Time = k1 / 2 in npcm_i2c_init_clk()
2121 * k2 = 2 * SCLLT7-0 -> High Time = k2 / 2 in npcm_i2c_init_clk()
2123 iowrite8(smb_timing[scl_table_cnt].scllt, bus->reg + NPCM_I2CSCLLT); in npcm_i2c_init_clk()
2124 iowrite8(smb_timing[scl_table_cnt].sclht, bus->reg + NPCM_I2CSCLHT); in npcm_i2c_init_clk()
2126 iowrite8(smb_timing[scl_table_cnt].dbcnt, bus->reg + NPCM_I2CCTL5); in npcm_i2c_init_clk()
2129 iowrite8(smb_timing[scl_table_cnt].hldt, bus->reg + NPCM_I2CCTL4); in npcm_i2c_init_clk()
2144 if ((bus->state != I2C_DISABLE && bus->state != I2C_IDLE) || in npcm_i2c_init_module()
2146 return -EINVAL; in npcm_i2c_init_module()
2152 if (FIELD_GET(I2C_VER_FIFO_EN, ioread8(bus->reg + I2C_VER))) { in npcm_i2c_init_module()
2153 bus->fifo_use = true; in npcm_i2c_init_module()
2155 val = ioread8(bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
2157 iowrite8(val, bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
2160 bus->fifo_use = false; in npcm_i2c_init_module()
2163 /* Configure I2C module clock frequency */ in npcm_i2c_init_module()
2166 dev_err(bus->dev, "npcm_i2c_init_clk failed\n"); in npcm_i2c_init_module()
2172 bus->state = I2C_IDLE; in npcm_i2c_init_module()
2173 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
2175 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
2180 if ((npcm_i2c_get_SDA(&bus->adap) == 0) || (npcm_i2c_get_SCL(&bus->adap) == 0)) { in npcm_i2c_init_module()
2181 dev_err(bus->dev, "I2C%d init fail: lines are low\n", bus->num); in npcm_i2c_init_module()
2182 dev_err(bus->dev, "SDA=%d SCL=%d\n", npcm_i2c_get_SDA(&bus->adap), in npcm_i2c_init_module()
2183 npcm_i2c_get_SCL(&bus->adap)); in npcm_i2c_init_module()
2184 return -ENXIO; in npcm_i2c_init_module()
2197 bus->state = I2C_DISABLE; in __npcm_i2c_init()
2198 bus->master_or_slave = I2C_SLAVE; in __npcm_i2c_init()
2199 bus->int_time_stamp = 0; in __npcm_i2c_init()
2201 bus->slave = NULL; in __npcm_i2c_init()
2204 ret = device_property_read_u32(&pdev->dev, "clock-frequency", in __npcm_i2c_init()
2207 dev_info(&pdev->dev, "Could not read clock-frequency property"); in __npcm_i2c_init()
2213 dev_err(&pdev->dev, "npcm_i2c_init_module failed\n"); in __npcm_i2c_init()
2225 bus->master_or_slave = I2C_MASTER; in npcm_i2c_bus_irq()
2227 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_bus_irq()
2228 bus->int_time_stamp = jiffies; in npcm_i2c_bus_irq()
2233 if (bus->slave) { in npcm_i2c_bus_irq()
2234 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_bus_irq()
2250 if (bus->state != I2C_IDLE) { in npcm_i2c_master_start_xmit()
2251 bus->cmd_err = -EBUSY; in npcm_i2c_master_start_xmit()
2254 bus->wr_buf = write_data; in npcm_i2c_master_start_xmit()
2255 bus->wr_size = nwrite; in npcm_i2c_master_start_xmit()
2256 bus->wr_ind = 0; in npcm_i2c_master_start_xmit()
2257 bus->rd_buf = read_data; in npcm_i2c_master_start_xmit()
2258 bus->rd_size = nread; in npcm_i2c_master_start_xmit()
2259 bus->rd_ind = 0; in npcm_i2c_master_start_xmit()
2260 bus->PEC_use = 0; in npcm_i2c_master_start_xmit()
2262 /* for tx PEC is appended to buffer from i2c IF. PEC flag is ignored */ in npcm_i2c_master_start_xmit()
2264 bus->PEC_use = use_PEC; in npcm_i2c_master_start_xmit()
2266 bus->read_block_use = use_read_block; in npcm_i2c_master_start_xmit()
2268 bus->operation = I2C_READ_OPER; in npcm_i2c_master_start_xmit()
2270 bus->operation = I2C_WRITE_OPER; in npcm_i2c_master_start_xmit()
2271 if (bus->fifo_use) { in npcm_i2c_master_start_xmit()
2276 i2cfif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2279 iowrite8(i2cfif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2282 bus->state = I2C_IDLE; in npcm_i2c_master_start_xmit()
2302 if (bus->state == I2C_DISABLE) { in npcm_i2c_master_xfer()
2303 dev_err(bus->dev, "I2C%d module is disabled", bus->num); in npcm_i2c_master_xfer()
2304 return -EINVAL; in npcm_i2c_master_xfer()
2308 if (msg0->flags & I2C_M_RD) { /* read */ in npcm_i2c_master_xfer()
2311 read_data = msg0->buf; in npcm_i2c_master_xfer()
2312 if (msg0->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2315 if (msg0->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2318 nread = msg0->len; in npcm_i2c_master_xfer()
2321 nwrite = msg0->len; in npcm_i2c_master_xfer()
2322 write_data = msg0->buf; in npcm_i2c_master_xfer()
2327 read_data = msg1->buf; in npcm_i2c_master_xfer()
2328 if (msg1->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2331 if (msg1->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2334 nread = msg1->len; in npcm_i2c_master_xfer()
2341 dev_err(bus->dev, "i2c%d buffer too big\n", bus->num); in npcm_i2c_master_xfer()
2342 return -EINVAL; in npcm_i2c_master_xfer()
2345 time_left = jiffies + bus->adap.timeout / bus->adap.retries + 1; in npcm_i2c_master_xfer()
2352 spin_lock_irqsave(&bus->lock, flags); in npcm_i2c_master_xfer()
2353 bus_busy = ioread8(bus->reg + NPCM_I2CCST) & NPCM_I2CCST_BB; in npcm_i2c_master_xfer()
2355 if (!bus_busy && bus->slave) in npcm_i2c_master_xfer()
2356 iowrite8((bus->slave->addr & 0x7F), in npcm_i2c_master_xfer()
2357 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2359 spin_unlock_irqrestore(&bus->lock, flags); in npcm_i2c_master_xfer()
2368 * from the bus->dest_addr for the i2c_recover_bus() call later. in npcm_i2c_master_xfer()
2371 * the i2c bus if some error condition occurs. in npcm_i2c_master_xfer()
2376 bus->dest_addr = i2c_8bit_addr_from_msg(msg0) & ~I2C_M_RD; in npcm_i2c_master_xfer()
2387 if (bus_busy || bus->ber_state) { in npcm_i2c_master_xfer()
2388 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_master_xfer()
2391 return -EAGAIN; in npcm_i2c_master_xfer()
2395 bus->msgs = msgs; in npcm_i2c_master_xfer()
2396 bus->msgs_num = num; in npcm_i2c_master_xfer()
2397 bus->cmd_err = 0; in npcm_i2c_master_xfer()
2398 bus->read_block_use = read_block; in npcm_i2c_master_xfer()
2400 reinit_completion(&bus->cmd_complete); in npcm_i2c_master_xfer()
2412 timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); in npcm_i2c_master_xfer()
2413 timeout = max_t(unsigned long, bus->adap.timeout / bus->adap.retries, in npcm_i2c_master_xfer()
2415 time_left = wait_for_completion_timeout(&bus->cmd_complete, in npcm_i2c_master_xfer()
2419 if (bus->timeout_cnt < ULLONG_MAX) in npcm_i2c_master_xfer()
2420 bus->timeout_cnt++; in npcm_i2c_master_xfer()
2421 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_master_xfer()
2423 bus->cmd_err = -EIO; in npcm_i2c_master_xfer()
2424 bus->state = I2C_IDLE; in npcm_i2c_master_xfer()
2430 if (bus->cmd_err == -EAGAIN) in npcm_i2c_master_xfer()
2431 bus->cmd_err = i2c_recover_bus(adap); in npcm_i2c_master_xfer()
2438 else if (bus->cmd_err && in npcm_i2c_master_xfer()
2439 (bus->data->rxf_ctl_last_pec & ioread8(bus->reg + NPCM_I2CRXF_CTL))) in npcm_i2c_master_xfer()
2448 if (bus->slave) in npcm_i2c_master_xfer()
2449 iowrite8((bus->slave->addr & 0x7F) | NPCM_I2CADDR_SAEN, in npcm_i2c_master_xfer()
2450 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2454 return bus->cmd_err; in npcm_i2c_master_xfer()
2484 debugfs_create_u64("ber_cnt", 0444, bus->adap.debugfs, &bus->ber_cnt); in npcm_i2c_init_debugfs()
2485 debugfs_create_u64("nack_cnt", 0444, bus->adap.debugfs, &bus->nack_cnt); in npcm_i2c_init_debugfs()
2486 debugfs_create_u64("rec_succ_cnt", 0444, bus->adap.debugfs, &bus->rec_succ_cnt); in npcm_i2c_init_debugfs()
2487 debugfs_create_u64("rec_fail_cnt", 0444, bus->adap.debugfs, &bus->rec_fail_cnt); in npcm_i2c_init_debugfs()
2488 debugfs_create_u64("timeout_cnt", 0444, bus->adap.debugfs, &bus->timeout_cnt); in npcm_i2c_init_debugfs()
2489 debugfs_create_u64("tx_complete_cnt", 0444, bus->adap.debugfs, &bus->tx_complete_cnt); in npcm_i2c_init_debugfs()
2494 struct device_node *np = pdev->dev.of_node; in npcm_i2c_probe_bus()
2496 struct device *dev = &pdev->dev; in npcm_i2c_probe_bus()
2503 bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); in npcm_i2c_probe_bus()
2505 return -ENOMEM; in npcm_i2c_probe_bus()
2507 bus->dev = &pdev->dev; in npcm_i2c_probe_bus()
2509 bus->data = of_device_get_match_data(dev); in npcm_i2c_probe_bus()
2510 if (!bus->data) { in npcm_i2c_probe_bus()
2512 return -EINVAL; in npcm_i2c_probe_bus()
2515 bus->num = of_alias_get_id(pdev->dev.of_node, "i2c"); in npcm_i2c_probe_bus()
2517 i2c_clk = devm_clk_get(&pdev->dev, NULL); in npcm_i2c_probe_bus()
2520 bus->apb_clk = clk_get_rate(i2c_clk); in npcm_i2c_probe_bus()
2522 gcr_regmap = syscon_regmap_lookup_by_phandle(np, "nuvoton,sys-mgr"); in npcm_i2c_probe_bus()
2524 gcr_regmap = syscon_regmap_lookup_by_compatible("nuvoton,npcm750-gcr"); in npcm_i2c_probe_bus()
2528 regmap_write(gcr_regmap, NPCM_I2CSEGCTL, bus->data->segctl_init_val); in npcm_i2c_probe_bus()
2530 bus->reg = devm_platform_ioremap_resource(pdev, 0); in npcm_i2c_probe_bus()
2531 if (IS_ERR(bus->reg)) in npcm_i2c_probe_bus()
2532 return PTR_ERR(bus->reg); in npcm_i2c_probe_bus()
2534 spin_lock_init(&bus->lock); in npcm_i2c_probe_bus()
2535 init_completion(&bus->cmd_complete); in npcm_i2c_probe_bus()
2537 adap = &bus->adap; in npcm_i2c_probe_bus()
2538 adap->owner = THIS_MODULE; in npcm_i2c_probe_bus()
2539 adap->retries = 3; in npcm_i2c_probe_bus()
2545 adap->timeout = 2 * HZ; in npcm_i2c_probe_bus()
2546 adap->algo = &npcm_i2c_algo; in npcm_i2c_probe_bus()
2547 adap->quirks = &npcm_i2c_quirks; in npcm_i2c_probe_bus()
2548 adap->algo_data = bus; in npcm_i2c_probe_bus()
2549 adap->dev.parent = &pdev->dev; in npcm_i2c_probe_bus()
2550 adap->dev.of_node = pdev->dev.of_node; in npcm_i2c_probe_bus()
2551 adap->nr = pdev->id; in npcm_i2c_probe_bus()
2560 * might do a warm reset during the last smbus/i2c transfer session. in npcm_i2c_probe_bus()
2564 ret = devm_request_irq(bus->dev, irq, npcm_i2c_bus_irq, 0, in npcm_i2c_probe_bus()
2565 dev_name(bus->dev), bus); in npcm_i2c_probe_bus()
2577 snprintf(bus->adap.name, sizeof(bus->adap.name), "npcm_i2c_%d", in npcm_i2c_probe_bus()
2578 bus->num); in npcm_i2c_probe_bus()
2579 ret = i2c_add_numbered_adapter(&bus->adap); in npcm_i2c_probe_bus()
2593 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2595 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2596 i2c_del_adapter(&bus->adap); in npcm_i2c_remove_bus()
2600 { .compatible = "nuvoton,npcm750-i2c", .data = &npxm7xx_i2c_data },
2601 { .compatible = "nuvoton,npcm845-i2c", .data = &npxm8xx_i2c_data },
2610 .name = "nuvoton-i2c",
2620 MODULE_DESCRIPTION("Nuvoton I2C Bus Driver");