Lines Matching +full:data +full:- +full:bus
1 // SPDX-License-Identifier: GPL-2.0
30 * of the bus.
125 #define NPCM_I2CTXF_CTL 0x12 /* Tx-FIFO Control */
126 #define NPCM_I2CT_OUT 0x14 /* Bus T.O. */
127 #define NPCM_I2CPEC 0x16 /* PEC Data */
128 #define NPCM_I2CTXF_STS 0x1A /* Tx-FIFO Status */
129 #define NPCM_I2CRXF_STS 0x1C /* Rx-FIFO Status */
130 #define NPCM_I2CRXF_CTL 0x1E /* Rx-FIFO Control */
155 #define NPCM_I2CST_BER BIT(5) /* Bus error */
161 #define NPCM_I2CCST_BB BIT(1) /* Bus busy */
554 const struct npcm_i2c_data *data; member
596 bool ber_state; /* Indicate the bus error state */
599 static inline void npcm_i2c_select_bank(struct npcm_i2c *bus, in npcm_i2c_select_bank() argument
602 u8 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
608 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
611 static void npcm_i2c_init_params(struct npcm_i2c *bus) in npcm_i2c_init_params() argument
613 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_init_params()
614 bus->rd_size = 0; in npcm_i2c_init_params()
615 bus->wr_size = 0; in npcm_i2c_init_params()
616 bus->rd_ind = 0; in npcm_i2c_init_params()
617 bus->wr_ind = 0; in npcm_i2c_init_params()
618 bus->read_block_use = false; in npcm_i2c_init_params()
619 bus->int_time_stamp = 0; in npcm_i2c_init_params()
620 bus->PEC_use = false; in npcm_i2c_init_params()
621 bus->PEC_mask = 0; in npcm_i2c_init_params()
623 if (bus->slave) in npcm_i2c_init_params()
624 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_init_params()
628 static inline void npcm_i2c_wr_byte(struct npcm_i2c *bus, u8 data) in npcm_i2c_wr_byte() argument
630 iowrite8(data, bus->reg + NPCM_I2CSDA); in npcm_i2c_wr_byte()
633 static inline u8 npcm_i2c_rd_byte(struct npcm_i2c *bus) in npcm_i2c_rd_byte() argument
635 return ioread8(bus->reg + NPCM_I2CSDA); in npcm_i2c_rd_byte()
640 struct npcm_i2c *bus = container_of(_adap, struct npcm_i2c, adap); in npcm_i2c_get_SCL() local
642 return !!(I2CCTL3_SCL_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SCL()
647 struct npcm_i2c *bus = container_of(_adap, struct npcm_i2c, adap); in npcm_i2c_get_SDA() local
649 return !!(I2CCTL3_SDA_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SDA()
652 static inline u16 npcm_i2c_get_index(struct npcm_i2c *bus) in npcm_i2c_get_index() argument
654 if (bus->operation == I2C_READ_OPER) in npcm_i2c_get_index()
655 return bus->rd_ind; in npcm_i2c_get_index()
656 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_get_index()
657 return bus->wr_ind; in npcm_i2c_get_index()
662 static inline bool npcm_i2c_is_quick(struct npcm_i2c *bus) in npcm_i2c_is_quick() argument
664 return bus->wr_size == 0 && bus->rd_size == 0; in npcm_i2c_is_quick()
667 static void npcm_i2c_disable(struct npcm_i2c *bus) in npcm_i2c_disable() argument
676 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_disable()
680 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
682 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
684 bus->state = I2C_DISABLE; in npcm_i2c_disable()
687 static void npcm_i2c_enable(struct npcm_i2c *bus) in npcm_i2c_enable() argument
689 u8 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
692 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
693 bus->state = I2C_IDLE; in npcm_i2c_enable()
697 static inline void npcm_i2c_eob_int(struct npcm_i2c *bus, bool enable) in npcm_i2c_eob_int() argument
702 val = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
704 iowrite8(val, bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
706 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
712 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
715 static inline bool npcm_i2c_tx_fifo_empty(struct npcm_i2c *bus) in npcm_i2c_tx_fifo_empty() argument
719 tx_fifo_sts = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_tx_fifo_empty()
721 if ((tx_fifo_sts & bus->data->txf_sts_tx_bytes) == 0) in npcm_i2c_tx_fifo_empty()
728 static inline bool npcm_i2c_rx_fifo_full(struct npcm_i2c *bus) in npcm_i2c_rx_fifo_full() argument
732 rx_fifo_sts = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_rx_fifo_full()
734 if ((rx_fifo_sts & bus->data->rxf_sts_rx_bytes) == 0) in npcm_i2c_rx_fifo_full()
741 static inline void npcm_i2c_clear_fifo_int(struct npcm_i2c *bus) in npcm_i2c_clear_fifo_int() argument
745 val = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
747 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
750 static inline void npcm_i2c_clear_tx_fifo(struct npcm_i2c *bus) in npcm_i2c_clear_tx_fifo() argument
754 val = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
756 iowrite8(val, bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
759 static inline void npcm_i2c_clear_rx_fifo(struct npcm_i2c *bus) in npcm_i2c_clear_rx_fifo() argument
763 val = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
765 iowrite8(val, bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
768 static void npcm_i2c_int_enable(struct npcm_i2c *bus, bool enable) in npcm_i2c_int_enable() argument
772 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
778 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
781 static inline void npcm_i2c_master_start(struct npcm_i2c *bus) in npcm_i2c_master_start() argument
785 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
788 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
791 static inline void npcm_i2c_master_stop(struct npcm_i2c *bus) in npcm_i2c_master_stop() argument
801 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
804 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
806 if (!bus->fifo_use) in npcm_i2c_master_stop()
809 npcm_i2c_select_bank(bus, I2C_BANK_1); in npcm_i2c_master_stop()
811 if (bus->operation == I2C_READ_OPER) in npcm_i2c_master_stop()
812 npcm_i2c_clear_rx_fifo(bus); in npcm_i2c_master_stop()
814 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_master_stop()
815 npcm_i2c_clear_fifo_int(bus); in npcm_i2c_master_stop()
816 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_master_stop()
819 static inline void npcm_i2c_stall_after_start(struct npcm_i2c *bus, bool stall) in npcm_i2c_stall_after_start() argument
823 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
829 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
832 static inline void npcm_i2c_nack(struct npcm_i2c *bus) in npcm_i2c_nack() argument
836 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
839 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
842 static inline void npcm_i2c_clear_master_status(struct npcm_i2c *bus) in npcm_i2c_clear_master_status() argument
848 iowrite8(val, bus->reg + NPCM_I2CST); in npcm_i2c_clear_master_status()
852 static void npcm_i2c_slave_int_enable(struct npcm_i2c *bus, bool enable) in npcm_i2c_slave_int_enable() argument
857 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
863 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
866 static int npcm_i2c_slave_enable(struct npcm_i2c *bus, enum i2c_addr addr_type, in npcm_i2c_slave_enable() argument
875 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
880 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
883 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
888 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
892 dev_err(bus->dev, "try to enable more than 2 SA not supported\n"); in npcm_i2c_slave_enable()
895 return -EFAULT; in npcm_i2c_slave_enable()
898 iowrite8(sa_reg, bus->reg + npcm_i2caddr[addr_type]); in npcm_i2c_slave_enable()
899 npcm_i2c_slave_int_enable(bus, enable); in npcm_i2c_slave_enable()
905 static void npcm_i2c_reset(struct npcm_i2c *bus) in npcm_i2c_reset() argument
916 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
918 npcm_i2c_disable(bus); in npcm_i2c_reset()
919 npcm_i2c_enable(bus); in npcm_i2c_reset()
923 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
925 /* Clear BB (BUS BUSY) bit */ in npcm_i2c_reset()
926 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_reset()
927 iowrite8(0xFF, bus->reg + NPCM_I2CST); in npcm_i2c_reset()
930 npcm_i2c_eob_int(bus, false); in npcm_i2c_reset()
933 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_reset()
936 if (bus->slave) { in npcm_i2c_reset()
937 addr = bus->slave->addr; in npcm_i2c_reset()
938 npcm_i2c_slave_enable(bus, I2C_SLAVE_ADDR1, addr, true); in npcm_i2c_reset()
943 npcm_i2c_clear_master_status(bus); in npcm_i2c_reset()
945 bus->state = I2C_IDLE; in npcm_i2c_reset()
948 static inline bool npcm_i2c_is_master(struct npcm_i2c *bus) in npcm_i2c_is_master() argument
950 return !!FIELD_GET(NPCM_I2CST_MASTER, ioread8(bus->reg + NPCM_I2CST)); in npcm_i2c_is_master()
953 static void npcm_i2c_callback(struct npcm_i2c *bus, in npcm_i2c_callback() argument
960 msgs = bus->msgs; in npcm_i2c_callback()
961 msgs_num = bus->msgs_num; in npcm_i2c_callback()
963 * check that transaction was not timed-out, and msgs still in npcm_i2c_callback()
969 if (completion_done(&bus->cmd_complete)) in npcm_i2c_callback()
974 bus->cmd_err = bus->msgs_num; in npcm_i2c_callback()
975 if (bus->tx_complete_cnt < ULLONG_MAX) in npcm_i2c_callback()
976 bus->tx_complete_cnt++; in npcm_i2c_callback()
980 if (bus->msgs) { in npcm_i2c_callback()
991 bus->cmd_err = -ENXIO; in npcm_i2c_callback()
995 /* Bus error */ in npcm_i2c_callback()
996 bus->cmd_err = -EAGAIN; in npcm_i2c_callback()
1006 bus->operation = I2C_NO_OPER; in npcm_i2c_callback()
1008 if (bus->slave) in npcm_i2c_callback()
1009 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_callback()
1012 complete(&bus->cmd_complete); in npcm_i2c_callback()
1015 static u8 npcm_i2c_fifo_usage(struct npcm_i2c *bus) in npcm_i2c_fifo_usage() argument
1017 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_fifo_usage()
1018 return (bus->data->txf_sts_tx_bytes & in npcm_i2c_fifo_usage()
1019 ioread8(bus->reg + NPCM_I2CTXF_STS)); in npcm_i2c_fifo_usage()
1020 if (bus->operation == I2C_READ_OPER) in npcm_i2c_fifo_usage()
1021 return (bus->data->rxf_sts_rx_bytes & in npcm_i2c_fifo_usage()
1022 ioread8(bus->reg + NPCM_I2CRXF_STS)); in npcm_i2c_fifo_usage()
1026 static void npcm_i2c_write_to_fifo_master(struct npcm_i2c *bus, u16 max_bytes) in npcm_i2c_write_to_fifo_master() argument
1034 size_free_fifo = bus->data->fifo_size - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
1035 while (max_bytes-- && size_free_fifo) { in npcm_i2c_write_to_fifo_master()
1036 if (bus->wr_ind < bus->wr_size) in npcm_i2c_write_to_fifo_master()
1037 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_write_to_fifo_master()
1039 npcm_i2c_wr_byte(bus, 0xFF); in npcm_i2c_write_to_fifo_master()
1040 size_free_fifo = bus->data->fifo_size - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
1046 * configure the FIFO before using it. If nread is -1 RX FIFO will not be
1049 static void npcm_i2c_set_fifo(struct npcm_i2c *bus, int nread, int nwrite) in npcm_i2c_set_fifo() argument
1053 if (!bus->fifo_use) in npcm_i2c_set_fifo()
1055 npcm_i2c_select_bank(bus, I2C_BANK_1); in npcm_i2c_set_fifo()
1056 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_set_fifo()
1057 npcm_i2c_clear_rx_fifo(bus); in npcm_i2c_set_fifo()
1061 rxf_ctl = min_t(int, nread, bus->data->fifo_size); in npcm_i2c_set_fifo()
1064 if (nread <= bus->data->fifo_size) in npcm_i2c_set_fifo()
1065 rxf_ctl |= bus->data->rxf_ctl_last_pec; in npcm_i2c_set_fifo()
1072 if (bus->rd_ind == 0 && bus->read_block_use) { in npcm_i2c_set_fifo()
1078 iowrite8(rxf_ctl, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_set_fifo()
1083 if (nwrite > bus->data->fifo_size) in npcm_i2c_set_fifo()
1084 /* data to send is more then FIFO size. */ in npcm_i2c_set_fifo()
1085 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
1087 iowrite8(nwrite, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
1089 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_set_fifo()
1093 static void npcm_i2c_read_fifo(struct npcm_i2c *bus, u8 bytes_in_fifo) in npcm_i2c_read_fifo() argument
1095 u8 data; in npcm_i2c_read_fifo() local
1097 while (bytes_in_fifo--) { in npcm_i2c_read_fifo()
1098 data = npcm_i2c_rd_byte(bus); in npcm_i2c_read_fifo()
1099 if (bus->rd_ind < bus->rd_size) in npcm_i2c_read_fifo()
1100 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_read_fifo()
1104 static void npcm_i2c_master_abort(struct npcm_i2c *bus) in npcm_i2c_master_abort() argument
1107 if (!npcm_i2c_is_master(bus)) in npcm_i2c_master_abort()
1110 npcm_i2c_eob_int(bus, true); in npcm_i2c_master_abort()
1111 npcm_i2c_master_stop(bus); in npcm_i2c_master_abort()
1112 npcm_i2c_clear_master_status(bus); in npcm_i2c_master_abort()
1116 static u8 npcm_i2c_get_slave_addr(struct npcm_i2c *bus, enum i2c_addr addr_type) in npcm_i2c_get_slave_addr() argument
1119 dev_err(bus->dev, "get slave: try to use more than 2 SA not supported\n"); in npcm_i2c_get_slave_addr()
1121 return ioread8(bus->reg + npcm_i2caddr[addr_type]); in npcm_i2c_get_slave_addr()
1124 static int npcm_i2c_remove_slave_addr(struct npcm_i2c *bus, u8 slave_add) in npcm_i2c_remove_slave_addr() argument
1132 if (ioread8(bus->reg + npcm_i2caddr[i]) == slave_add) in npcm_i2c_remove_slave_addr()
1133 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_remove_slave_addr()
1139 static void npcm_i2c_write_fifo_slave(struct npcm_i2c *bus, u16 max_bytes) in npcm_i2c_write_fifo_slave() argument
1145 npcm_i2c_clear_fifo_int(bus); in npcm_i2c_write_fifo_slave()
1146 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_write_fifo_slave()
1147 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_write_fifo_slave()
1148 while (max_bytes-- && bus->data->fifo_size != npcm_i2c_fifo_usage(bus)) { in npcm_i2c_write_fifo_slave()
1149 if (bus->slv_wr_size <= 0) in npcm_i2c_write_fifo_slave()
1151 bus->slv_wr_ind = bus->slv_wr_ind & (bus->data->fifo_size - 1); in npcm_i2c_write_fifo_slave()
1152 npcm_i2c_wr_byte(bus, bus->slv_wr_buf[bus->slv_wr_ind]); in npcm_i2c_write_fifo_slave()
1153 bus->slv_wr_ind++; in npcm_i2c_write_fifo_slave()
1154 bus->slv_wr_ind = bus->slv_wr_ind & (bus->data->fifo_size - 1); in npcm_i2c_write_fifo_slave()
1155 bus->slv_wr_size--; in npcm_i2c_write_fifo_slave()
1159 static void npcm_i2c_read_fifo_slave(struct npcm_i2c *bus, u8 bytes_in_fifo) in npcm_i2c_read_fifo_slave() argument
1161 u8 data; in npcm_i2c_read_fifo_slave() local
1163 if (!bus->slave) in npcm_i2c_read_fifo_slave()
1166 while (bytes_in_fifo--) { in npcm_i2c_read_fifo_slave()
1167 data = npcm_i2c_rd_byte(bus); in npcm_i2c_read_fifo_slave()
1169 bus->slv_rd_ind = bus->slv_rd_ind & (bus->data->fifo_size - 1); in npcm_i2c_read_fifo_slave()
1170 bus->slv_rd_buf[bus->slv_rd_ind] = data; in npcm_i2c_read_fifo_slave()
1171 bus->slv_rd_ind++; in npcm_i2c_read_fifo_slave()
1174 if (bus->slv_rd_ind == 1 && bus->read_block_use) in npcm_i2c_read_fifo_slave()
1175 bus->slv_rd_size = data + bus->PEC_use + 1; in npcm_i2c_read_fifo_slave()
1179 static int npcm_i2c_slave_get_wr_buf(struct npcm_i2c *bus) in npcm_i2c_slave_get_wr_buf() argument
1184 int ret = bus->slv_wr_ind; in npcm_i2c_slave_get_wr_buf()
1187 for (i = 0; i < bus->data->fifo_size; i++) { in npcm_i2c_slave_get_wr_buf()
1188 if (bus->slv_wr_size >= bus->data->fifo_size) in npcm_i2c_slave_get_wr_buf()
1190 if (bus->state == I2C_SLAVE_MATCH) { in npcm_i2c_slave_get_wr_buf()
1191 i2c_slave_event(bus->slave, I2C_SLAVE_READ_REQUESTED, &value); in npcm_i2c_slave_get_wr_buf()
1192 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_get_wr_buf()
1194 i2c_slave_event(bus->slave, I2C_SLAVE_READ_PROCESSED, &value); in npcm_i2c_slave_get_wr_buf()
1196 ind = (bus->slv_wr_ind + bus->slv_wr_size) & (bus->data->fifo_size - 1); in npcm_i2c_slave_get_wr_buf()
1197 bus->slv_wr_buf[ind] = value; in npcm_i2c_slave_get_wr_buf()
1198 bus->slv_wr_size++; in npcm_i2c_slave_get_wr_buf()
1200 return bus->data->fifo_size - ret; in npcm_i2c_slave_get_wr_buf()
1203 static void npcm_i2c_slave_send_rd_buf(struct npcm_i2c *bus) in npcm_i2c_slave_send_rd_buf() argument
1207 for (i = 0; i < bus->slv_rd_ind; i++) in npcm_i2c_slave_send_rd_buf()
1208 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_RECEIVED, in npcm_i2c_slave_send_rd_buf()
1209 &bus->slv_rd_buf[i]); in npcm_i2c_slave_send_rd_buf()
1212 * got data from master (new offset in device), ignore wr fifo: in npcm_i2c_slave_send_rd_buf()
1214 if (bus->slv_rd_ind) { in npcm_i2c_slave_send_rd_buf()
1215 bus->slv_wr_size = 0; in npcm_i2c_slave_send_rd_buf()
1216 bus->slv_wr_ind = 0; in npcm_i2c_slave_send_rd_buf()
1219 bus->slv_rd_ind = 0; in npcm_i2c_slave_send_rd_buf()
1220 bus->slv_rd_size = bus->adap.quirks->max_read_len; in npcm_i2c_slave_send_rd_buf()
1222 npcm_i2c_clear_fifo_int(bus); in npcm_i2c_slave_send_rd_buf()
1223 npcm_i2c_clear_rx_fifo(bus); in npcm_i2c_slave_send_rd_buf()
1226 static void npcm_i2c_slave_receive(struct npcm_i2c *bus, u16 nread, in npcm_i2c_slave_receive() argument
1229 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_receive()
1230 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_receive()
1231 bus->slv_rd_size = nread; in npcm_i2c_slave_receive()
1232 bus->slv_rd_ind = 0; in npcm_i2c_slave_receive()
1234 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_slave_receive()
1235 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_slave_receive()
1236 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_slave_receive()
1237 npcm_i2c_clear_rx_fifo(bus); in npcm_i2c_slave_receive()
1240 static void npcm_i2c_slave_xmit(struct npcm_i2c *bus, u16 nwrite, in npcm_i2c_slave_xmit() argument
1246 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_xmit()
1249 npcm_i2c_slave_get_wr_buf(bus); in npcm_i2c_slave_xmit()
1250 npcm_i2c_write_fifo_slave(bus, nwrite); in npcm_i2c_slave_xmit()
1258 * to the FIFO and onward to the bus.
1259 * NACK on read will be once reached to bus->adap->quirks->max_read_len.
1264 static void npcm_i2c_slave_wr_buf_sync(struct npcm_i2c *bus) in npcm_i2c_slave_wr_buf_sync() argument
1268 left_in_fifo = bus->data->txf_sts_tx_bytes & in npcm_i2c_slave_wr_buf_sync()
1269 ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_slave_wr_buf_sync()
1272 if (left_in_fifo >= bus->data->fifo_size || in npcm_i2c_slave_wr_buf_sync()
1273 bus->slv_wr_size >= bus->data->fifo_size) in npcm_i2c_slave_wr_buf_sync()
1277 bus->slv_wr_ind = bus->slv_wr_ind - left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1278 bus->slv_wr_size = bus->slv_wr_size + left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1280 if (bus->slv_wr_ind < 0) in npcm_i2c_slave_wr_buf_sync()
1281 bus->slv_wr_ind += bus->data->fifo_size; in npcm_i2c_slave_wr_buf_sync()
1284 static void npcm_i2c_slave_rd_wr(struct npcm_i2c *bus) in npcm_i2c_slave_rd_wr() argument
1286 if (NPCM_I2CST_XMIT & ioread8(bus->reg + NPCM_I2CST)) { in npcm_i2c_slave_rd_wr()
1289 * transmit data. Write till the master will NACK in npcm_i2c_slave_rd_wr()
1291 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_rd_wr()
1292 npcm_i2c_slave_xmit(bus, bus->adap.quirks->max_write_len, in npcm_i2c_slave_rd_wr()
1293 bus->slv_wr_buf); in npcm_i2c_slave_rd_wr()
1297 * receive data. in npcm_i2c_slave_rd_wr()
1301 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_rd_wr()
1302 npcm_i2c_read_fifo_slave(bus, npcm_i2c_fifo_usage(bus)); in npcm_i2c_slave_rd_wr()
1303 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_slave_rd_wr()
1304 npcm_i2c_slave_send_rd_buf(bus); in npcm_i2c_slave_rd_wr()
1305 npcm_i2c_slave_receive(bus, bus->adap.quirks->max_read_len, in npcm_i2c_slave_rd_wr()
1306 bus->slv_rd_buf); in npcm_i2c_slave_rd_wr()
1310 static irqreturn_t npcm_i2c_int_slave_handler(struct npcm_i2c *bus) in npcm_i2c_int_slave_handler() argument
1314 u8 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1318 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_int_slave_handler()
1319 npcm_i2c_slave_wr_buf_sync(bus); in npcm_i2c_int_slave_handler()
1320 if (bus->fifo_use) in npcm_i2c_int_slave_handler()
1323 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1326 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1327 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1328 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1334 iowrite8(NPCM_I2CST_NEGACK, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1339 /* Slave mode: a Bus Error (BER) has been identified */ in npcm_i2c_int_slave_handler()
1342 * Check whether bus arbitration or Start or Stop during data in npcm_i2c_int_slave_handler()
1343 * xfer bus arbitration problem should not result in recovery in npcm_i2c_int_slave_handler()
1345 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_int_slave_handler()
1347 /* wait for bus busy before clear fifo */ in npcm_i2c_int_slave_handler()
1348 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1350 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1356 if (completion_done(&bus->cmd_complete) == false) { in npcm_i2c_int_slave_handler()
1357 bus->cmd_err = -EIO; in npcm_i2c_int_slave_handler()
1358 complete(&bus->cmd_complete); in npcm_i2c_int_slave_handler()
1360 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1361 iowrite8(NPCM_I2CST_BER, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1367 u8 bytes_in_fifo = npcm_i2c_fifo_usage(bus); in npcm_i2c_int_slave_handler()
1369 bus->stop_ind = I2C_SLAVE_DONE_IND; in npcm_i2c_int_slave_handler()
1371 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1372 npcm_i2c_read_fifo_slave(bus, bytes_in_fifo); in npcm_i2c_int_slave_handler()
1375 npcm_i2c_slave_send_rd_buf(bus); in npcm_i2c_int_slave_handler()
1378 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1385 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1386 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1387 i2c_slave_event(bus->slave, I2C_SLAVE_STOP, 0); in npcm_i2c_int_slave_handler()
1388 iowrite8(NPCM_I2CST_SLVSTP, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1389 if (bus->fifo_use) { in npcm_i2c_int_slave_handler()
1390 npcm_i2c_clear_fifo_int(bus); in npcm_i2c_int_slave_handler()
1391 npcm_i2c_clear_rx_fifo(bus); in npcm_i2c_int_slave_handler()
1392 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_int_slave_handler()
1395 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1397 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1401 /* restart condition occurred and Rx-FIFO was not empty */ in npcm_i2c_int_slave_handler()
1402 if (bus->fifo_use && FIELD_GET(NPCM_I2CFIF_CTS_SLVRSTR, in npcm_i2c_int_slave_handler()
1403 ioread8(bus->reg + NPCM_I2CFIF_CTS))) { in npcm_i2c_int_slave_handler()
1404 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1405 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1406 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1407 npcm_i2c_read_fifo_slave(bus, npcm_i2c_fifo_usage(bus)); in npcm_i2c_int_slave_handler()
1408 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1409 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1412 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1413 npcm_i2c_slave_rd_wr(bus); in npcm_i2c_int_slave_handler()
1422 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1423 npcm_i2c_clear_fifo_int(bus); in npcm_i2c_int_slave_handler()
1424 npcm_i2c_clear_rx_fifo(bus); in npcm_i2c_int_slave_handler()
1425 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_int_slave_handler()
1426 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_int_slave_handler()
1427 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1429 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1431 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_REQUESTED, in npcm_i2c_int_slave_handler()
1433 bus->operation = I2C_READ_OPER; in npcm_i2c_int_slave_handler()
1435 if (bus->own_slave_addr == 0xFF) { in npcm_i2c_int_slave_handler()
1437 val = ioread8(bus->reg + NPCM_I2CCST); in npcm_i2c_int_slave_handler()
1444 i2ccst3 = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_int_slave_handler()
1445 i2ccst2 = ioread8(bus->reg + NPCM_I2CCST2); in npcm_i2c_int_slave_handler()
1456 addr = npcm_i2c_get_slave_addr(bus, eaddr); in npcm_i2c_int_slave_handler()
1458 bus->own_slave_addr = addr; in npcm_i2c_int_slave_handler()
1459 if (bus->PEC_mask & BIT(info)) in npcm_i2c_int_slave_handler()
1460 bus->PEC_use = true; in npcm_i2c_int_slave_handler()
1462 bus->PEC_use = false; in npcm_i2c_int_slave_handler()
1465 bus->own_slave_addr = 0; in npcm_i2c_int_slave_handler()
1467 bus->own_slave_addr = 0x61; in npcm_i2c_int_slave_handler()
1473 * 2. Start, SA, read, data, restart, SA, read, ... in npcm_i2c_int_slave_handler()
1475 * 3. Start, SA, write, data, restart, SA, read, .. in npcm_i2c_int_slave_handler()
1476 * (regular write-read mode) in npcm_i2c_int_slave_handler()
1478 if ((bus->state == I2C_OPER_STARTED && in npcm_i2c_int_slave_handler()
1479 bus->operation == I2C_READ_OPER && in npcm_i2c_int_slave_handler()
1480 bus->stop_ind == I2C_SLAVE_XMIT_IND) || in npcm_i2c_int_slave_handler()
1481 bus->stop_ind == I2C_SLAVE_RCV_IND) { in npcm_i2c_int_slave_handler()
1483 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1488 bus->stop_ind = I2C_SLAVE_XMIT_IND; in npcm_i2c_int_slave_handler()
1490 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_int_slave_handler()
1491 bus->state = I2C_SLAVE_MATCH; in npcm_i2c_int_slave_handler()
1492 npcm_i2c_slave_rd_wr(bus); in npcm_i2c_int_slave_handler()
1493 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1497 /* Slave SDA status is set - tx or rx */ in npcm_i2c_int_slave_handler()
1499 (bus->fifo_use && in npcm_i2c_int_slave_handler()
1500 (npcm_i2c_tx_fifo_empty(bus) || npcm_i2c_rx_fifo_full(bus)))) { in npcm_i2c_int_slave_handler()
1501 npcm_i2c_slave_rd_wr(bus); in npcm_i2c_int_slave_handler()
1502 iowrite8(NPCM_I2CST_SDAST, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1511 npcm_i2c_eob_int(bus, false); in npcm_i2c_int_slave_handler()
1512 npcm_i2c_clear_master_status(bus); in npcm_i2c_int_slave_handler()
1521 struct npcm_i2c *bus = i2c_get_adapdata(client->adapter); in npcm_i2c_reg_slave() local
1523 bus->slave = client; in npcm_i2c_reg_slave()
1525 if (client->flags & I2C_CLIENT_TEN) in npcm_i2c_reg_slave()
1526 return -EAFNOSUPPORT; in npcm_i2c_reg_slave()
1528 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1530 npcm_i2c_init_params(bus); in npcm_i2c_reg_slave()
1531 bus->slv_rd_size = 0; in npcm_i2c_reg_slave()
1532 bus->slv_wr_size = 0; in npcm_i2c_reg_slave()
1533 bus->slv_rd_ind = 0; in npcm_i2c_reg_slave()
1534 bus->slv_wr_ind = 0; in npcm_i2c_reg_slave()
1535 if (client->flags & I2C_CLIENT_PEC) in npcm_i2c_reg_slave()
1536 bus->PEC_use = true; in npcm_i2c_reg_slave()
1538 dev_info(bus->dev, "i2c%d register slave SA=0x%x, PEC=%d\n", bus->num, in npcm_i2c_reg_slave()
1539 client->addr, bus->PEC_use); in npcm_i2c_reg_slave()
1541 npcm_i2c_slave_enable(bus, I2C_SLAVE_ADDR1, client->addr, true); in npcm_i2c_reg_slave()
1542 npcm_i2c_clear_fifo_int(bus); in npcm_i2c_reg_slave()
1543 npcm_i2c_clear_rx_fifo(bus); in npcm_i2c_reg_slave()
1544 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_reg_slave()
1545 npcm_i2c_slave_int_enable(bus, true); in npcm_i2c_reg_slave()
1547 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1553 struct npcm_i2c *bus = client->adapter->algo_data; in npcm_i2c_unreg_slave() local
1556 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1557 if (!bus->slave) { in npcm_i2c_unreg_slave()
1558 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1559 return -EINVAL; in npcm_i2c_unreg_slave()
1561 npcm_i2c_slave_int_enable(bus, false); in npcm_i2c_unreg_slave()
1562 npcm_i2c_remove_slave_addr(bus, client->addr); in npcm_i2c_unreg_slave()
1563 bus->slave = NULL; in npcm_i2c_unreg_slave()
1564 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1569 static void npcm_i2c_master_fifo_read(struct npcm_i2c *bus) in npcm_i2c_master_fifo_read() argument
1575 fifo_bytes = npcm_i2c_fifo_usage(bus); in npcm_i2c_master_fifo_read()
1576 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1581 * we read the data in the following way. If the number of bytes to in npcm_i2c_master_fifo_read()
1583 * and in the next int we read rest of the data. in npcm_i2c_master_fifo_read()
1585 if (rcount < (2 * bus->data->fifo_size) && rcount > bus->data->fifo_size) in npcm_i2c_master_fifo_read()
1586 fifo_bytes = rcount - bus->data->fifo_size; in npcm_i2c_master_fifo_read()
1589 /* last bytes are about to be read - end of tx */ in npcm_i2c_master_fifo_read()
1590 bus->state = I2C_STOP_PENDING; in npcm_i2c_master_fifo_read()
1591 bus->stop_ind = ind; in npcm_i2c_master_fifo_read()
1592 npcm_i2c_eob_int(bus, true); in npcm_i2c_master_fifo_read()
1594 npcm_i2c_master_stop(bus); in npcm_i2c_master_fifo_read()
1595 npcm_i2c_read_fifo(bus, fifo_bytes); in npcm_i2c_master_fifo_read()
1597 npcm_i2c_read_fifo(bus, fifo_bytes); in npcm_i2c_master_fifo_read()
1598 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1599 npcm_i2c_set_fifo(bus, rcount, -1); in npcm_i2c_master_fifo_read()
1603 static void npcm_i2c_irq_master_handler_write(struct npcm_i2c *bus) in npcm_i2c_irq_master_handler_write() argument
1607 if (bus->fifo_use) in npcm_i2c_irq_master_handler_write()
1608 npcm_i2c_clear_tx_fifo(bus); /* clear the TX fifo status bit */ in npcm_i2c_irq_master_handler_write()
1610 /* Master write operation - last byte handling */ in npcm_i2c_irq_master_handler_write()
1611 if (bus->wr_ind == bus->wr_size) { in npcm_i2c_irq_master_handler_write()
1612 if (bus->fifo_use && npcm_i2c_fifo_usage(bus) > 0) in npcm_i2c_irq_master_handler_write()
1622 if (bus->rd_size == 0) { in npcm_i2c_irq_master_handler_write()
1624 npcm_i2c_eob_int(bus, true); in npcm_i2c_irq_master_handler_write()
1625 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_write()
1626 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_master_handler_write()
1627 npcm_i2c_master_stop(bus); in npcm_i2c_irq_master_handler_write()
1629 npcm_i2c_wr_byte(bus, 0xFF); in npcm_i2c_irq_master_handler_write()
1632 /* last write-byte written on previous int - restart */ in npcm_i2c_irq_master_handler_write()
1633 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_master_handler_write()
1635 npcm_i2c_master_start(bus); in npcm_i2c_irq_master_handler_write()
1638 * Receiving one byte only - stall after successful in npcm_i2c_irq_master_handler_write()
1641 * unintentionally NACK the next multi-byte read. in npcm_i2c_irq_master_handler_write()
1643 if (bus->rd_size == 1) in npcm_i2c_irq_master_handler_write()
1644 npcm_i2c_stall_after_start(bus, true); in npcm_i2c_irq_master_handler_write()
1647 bus->operation = I2C_READ_OPER; in npcm_i2c_irq_master_handler_write()
1649 npcm_i2c_wr_byte(bus, bus->dest_addr | 0x1); in npcm_i2c_irq_master_handler_write()
1653 if (!bus->fifo_use || bus->wr_size == 1) { in npcm_i2c_irq_master_handler_write()
1654 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_irq_master_handler_write()
1656 wcount = bus->wr_size - bus->wr_ind; in npcm_i2c_irq_master_handler_write()
1657 npcm_i2c_set_fifo(bus, -1, wcount); in npcm_i2c_irq_master_handler_write()
1659 npcm_i2c_write_to_fifo_master(bus, wcount); in npcm_i2c_irq_master_handler_write()
1664 static void npcm_i2c_irq_master_handler_read(struct npcm_i2c *bus) in npcm_i2c_irq_master_handler_read() argument
1667 u8 data; in npcm_i2c_irq_master_handler_read() local
1670 block_extra_bytes_size = bus->read_block_use + bus->PEC_use; in npcm_i2c_irq_master_handler_read()
1676 if (bus->rd_ind == 0) { /* first byte handling: */ in npcm_i2c_irq_master_handler_read()
1677 if (bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1679 data = npcm_i2c_rd_byte(bus); in npcm_i2c_irq_master_handler_read()
1680 data = clamp_val(data, 1, I2C_SMBUS_BLOCK_MAX); in npcm_i2c_irq_master_handler_read()
1681 bus->rd_size = data + block_extra_bytes_size; in npcm_i2c_irq_master_handler_read()
1682 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_irq_master_handler_read()
1685 if (bus->fifo_use) { in npcm_i2c_irq_master_handler_read()
1686 data = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1687 data = data | NPCM_I2CFIF_CTS_RXF_TXE; in npcm_i2c_irq_master_handler_read()
1688 iowrite8(data, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1691 npcm_i2c_set_fifo(bus, bus->rd_size - 1, -1); in npcm_i2c_irq_master_handler_read()
1692 npcm_i2c_stall_after_start(bus, false); in npcm_i2c_irq_master_handler_read()
1694 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_irq_master_handler_read()
1695 npcm_i2c_master_fifo_read(bus); in npcm_i2c_irq_master_handler_read()
1698 if (bus->rd_size == block_extra_bytes_size && in npcm_i2c_irq_master_handler_read()
1699 bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1700 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_read()
1701 bus->stop_ind = I2C_BLOCK_BYTES_ERR_IND; in npcm_i2c_irq_master_handler_read()
1702 bus->cmd_err = -EIO; in npcm_i2c_irq_master_handler_read()
1703 npcm_i2c_eob_int(bus, true); in npcm_i2c_irq_master_handler_read()
1704 npcm_i2c_master_stop(bus); in npcm_i2c_irq_master_handler_read()
1705 npcm_i2c_read_fifo(bus, npcm_i2c_fifo_usage(bus)); in npcm_i2c_irq_master_handler_read()
1707 npcm_i2c_master_fifo_read(bus); in npcm_i2c_irq_master_handler_read()
1712 static void npcm_i2c_irq_handle_nmatch(struct npcm_i2c *bus) in npcm_i2c_irq_handle_nmatch() argument
1714 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_nmatch()
1715 npcm_i2c_nack(bus); in npcm_i2c_irq_handle_nmatch()
1716 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_nmatch()
1717 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_nmatch()
1721 static void npcm_i2c_irq_handle_nack(struct npcm_i2c *bus) in npcm_i2c_irq_handle_nack() argument
1725 if (bus->nack_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_nack()
1726 bus->nack_cnt++; in npcm_i2c_irq_handle_nack()
1728 if (bus->fifo_use) { in npcm_i2c_irq_handle_nack()
1733 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_irq_handle_nack()
1734 bus->wr_ind -= npcm_i2c_fifo_usage(bus); in npcm_i2c_irq_handle_nack()
1737 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_nack()
1741 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_irq_handle_nack()
1743 if (npcm_i2c_is_master(bus)) { in npcm_i2c_irq_handle_nack()
1745 npcm_i2c_eob_int(bus, false); in npcm_i2c_irq_handle_nack()
1746 npcm_i2c_master_stop(bus); in npcm_i2c_irq_handle_nack()
1749 npcm_i2c_rd_byte(bus); in npcm_i2c_irq_handle_nack()
1752 * The bus is released from stall only after the SW clears in npcm_i2c_irq_handle_nack()
1755 npcm_i2c_clear_master_status(bus); in npcm_i2c_irq_handle_nack()
1756 readx_poll_timeout_atomic(ioread8, bus->reg + NPCM_I2CCST, val, in npcm_i2c_irq_handle_nack()
1758 /* Verify no status bits are still set after bus is released */ in npcm_i2c_irq_handle_nack()
1759 npcm_i2c_clear_master_status(bus); in npcm_i2c_irq_handle_nack()
1761 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_nack()
1765 * In such case, the bus is released from stall only after the in npcm_i2c_irq_handle_nack()
1768 npcm_i2c_callback(bus, bus->stop_ind, bus->wr_ind); in npcm_i2c_irq_handle_nack()
1771 /* Master mode: a Bus Error has been identified */
1772 static void npcm_i2c_irq_handle_ber(struct npcm_i2c *bus) in npcm_i2c_irq_handle_ber() argument
1774 if (bus->ber_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_ber()
1775 bus->ber_cnt++; in npcm_i2c_irq_handle_ber()
1776 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_ber()
1777 if (npcm_i2c_is_master(bus)) { in npcm_i2c_irq_handle_ber()
1778 npcm_i2c_master_abort(bus); in npcm_i2c_irq_handle_ber()
1780 bus->ber_state = true; in npcm_i2c_irq_handle_ber()
1781 npcm_i2c_clear_master_status(bus); in npcm_i2c_irq_handle_ber()
1783 /* Clear BB (BUS BUSY) bit */ in npcm_i2c_irq_handle_ber()
1784 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_irq_handle_ber()
1786 bus->cmd_err = -EAGAIN; in npcm_i2c_irq_handle_ber()
1787 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_ber()
1789 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_ber()
1793 static void npcm_i2c_irq_handle_eob(struct npcm_i2c *bus) in npcm_i2c_irq_handle_eob() argument
1795 npcm_i2c_eob_int(bus, false); in npcm_i2c_irq_handle_eob()
1796 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_eob()
1797 npcm_i2c_callback(bus, bus->stop_ind, bus->rd_ind); in npcm_i2c_irq_handle_eob()
1801 static void npcm_i2c_irq_handle_stall_after_start(struct npcm_i2c *bus) in npcm_i2c_irq_handle_stall_after_start() argument
1803 if (npcm_i2c_is_quick(bus)) { in npcm_i2c_irq_handle_stall_after_start()
1804 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_handle_stall_after_start()
1805 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_handle_stall_after_start()
1806 npcm_i2c_eob_int(bus, true); in npcm_i2c_irq_handle_stall_after_start()
1807 npcm_i2c_master_stop(bus); in npcm_i2c_irq_handle_stall_after_start()
1808 } else if ((bus->rd_size == 1) && !bus->read_block_use) { in npcm_i2c_irq_handle_stall_after_start()
1810 * Receiving one byte only - set NACK after ensuring in npcm_i2c_irq_handle_stall_after_start()
1813 npcm_i2c_nack(bus); in npcm_i2c_irq_handle_stall_after_start()
1816 /* Reset stall-after-address-byte */ in npcm_i2c_irq_handle_stall_after_start()
1817 npcm_i2c_stall_after_start(bus, false); in npcm_i2c_irq_handle_stall_after_start()
1820 iowrite8(NPCM_I2CST_STASTR, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_stall_after_start()
1823 /* SDA status is set - TX or RX, master */
1824 static void npcm_i2c_irq_handle_sda(struct npcm_i2c *bus, u8 i2cst) in npcm_i2c_irq_handle_sda() argument
1828 if (!npcm_i2c_is_master(bus)) in npcm_i2c_irq_handle_sda()
1831 if (bus->state == I2C_IDLE) { in npcm_i2c_irq_handle_sda()
1832 bus->stop_ind = I2C_WAKE_UP_IND; in npcm_i2c_irq_handle_sda()
1834 if (npcm_i2c_is_quick(bus) || bus->read_block_use) in npcm_i2c_irq_handle_sda()
1839 npcm_i2c_stall_after_start(bus, true); in npcm_i2c_irq_handle_sda()
1841 npcm_i2c_stall_after_start(bus, false); in npcm_i2c_irq_handle_sda()
1844 * Receiving one byte only - stall after successful completion in npcm_i2c_irq_handle_sda()
1847 * multi-byte read in npcm_i2c_irq_handle_sda()
1849 if (bus->wr_size == 0 && bus->rd_size == 1) in npcm_i2c_irq_handle_sda()
1850 npcm_i2c_stall_after_start(bus, true); in npcm_i2c_irq_handle_sda()
1855 npcm_i2c_select_bank(bus, I2C_BANK_1); in npcm_i2c_irq_handle_sda()
1857 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1862 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1864 /* re-enable */ in npcm_i2c_irq_handle_sda()
1866 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1875 if (bus->wr_size) in npcm_i2c_irq_handle_sda()
1876 npcm_i2c_set_fifo(bus, -1, bus->wr_size); in npcm_i2c_irq_handle_sda()
1878 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_handle_sda()
1880 bus->state = I2C_OPER_STARTED; in npcm_i2c_irq_handle_sda()
1882 if (npcm_i2c_is_quick(bus) || bus->wr_size) in npcm_i2c_irq_handle_sda()
1883 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_irq_handle_sda()
1885 npcm_i2c_wr_byte(bus, bus->dest_addr | BIT(0)); in npcm_i2c_irq_handle_sda()
1888 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_irq_handle_sda()
1889 npcm_i2c_irq_master_handler_write(bus); in npcm_i2c_irq_handle_sda()
1890 else if (bus->operation == I2C_READ_OPER) in npcm_i2c_irq_handle_sda()
1891 npcm_i2c_irq_master_handler_read(bus); in npcm_i2c_irq_handle_sda()
1895 static int npcm_i2c_int_master_handler(struct npcm_i2c *bus) in npcm_i2c_int_master_handler() argument
1898 int ret = -EIO; in npcm_i2c_int_master_handler()
1900 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_master_handler()
1903 npcm_i2c_irq_handle_nmatch(bus); in npcm_i2c_int_master_handler()
1908 npcm_i2c_irq_handle_nack(bus); in npcm_i2c_int_master_handler()
1912 /* Master mode: a Bus Error has been identified */ in npcm_i2c_int_master_handler()
1914 npcm_i2c_irq_handle_ber(bus); in npcm_i2c_int_master_handler()
1920 ioread8(bus->reg + NPCM_I2CCTL1)) == 1) && in npcm_i2c_int_master_handler()
1922 ioread8(bus->reg + NPCM_I2CCST3)))) { in npcm_i2c_int_master_handler()
1923 npcm_i2c_irq_handle_eob(bus); in npcm_i2c_int_master_handler()
1926 if (bus->slave) in npcm_i2c_int_master_handler()
1927 iowrite8(bus->slave->addr | NPCM_I2CADDR_SAEN, in npcm_i2c_int_master_handler()
1928 bus->reg + NPCM_I2CADDR1); in npcm_i2c_int_master_handler()
1935 npcm_i2c_irq_handle_stall_after_start(bus); in npcm_i2c_int_master_handler()
1939 /* SDA status is set - TX or RX, master */ in npcm_i2c_int_master_handler()
1941 (bus->fifo_use && in npcm_i2c_int_master_handler()
1942 (npcm_i2c_tx_fifo_empty(bus) || npcm_i2c_rx_fifo_full(bus)))) { in npcm_i2c_int_master_handler()
1943 npcm_i2c_irq_handle_sda(bus, i2cst); in npcm_i2c_int_master_handler()
1956 int status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
1957 struct npcm_i2c *bus = container_of(_adap, struct npcm_i2c, adap); in npcm_i2c_recovery_tgclk() local
1962 dev_dbg(bus->dev, "bus%d-0x%x recovery skipped, bus not stuck", in npcm_i2c_recovery_tgclk()
1963 bus->num, bus->dest_addr); in npcm_i2c_recovery_tgclk()
1964 npcm_i2c_reset(bus); in npcm_i2c_recovery_tgclk()
1965 bus->ber_state = false; in npcm_i2c_recovery_tgclk()
1969 npcm_i2c_int_enable(bus, false); in npcm_i2c_recovery_tgclk()
1970 npcm_i2c_disable(bus); in npcm_i2c_recovery_tgclk()
1971 npcm_i2c_enable(bus); in npcm_i2c_recovery_tgclk()
1972 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1973 npcm_i2c_clear_tx_fifo(bus); in npcm_i2c_recovery_tgclk()
1974 npcm_i2c_clear_rx_fifo(bus); in npcm_i2c_recovery_tgclk()
1975 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_recovery_tgclk()
1976 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_recovery_tgclk()
1977 npcm_i2c_stall_after_start(bus, false); in npcm_i2c_recovery_tgclk()
1980 npcm_i2c_select_bank(bus, I2C_BANK_1); in npcm_i2c_recovery_tgclk()
1983 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1986 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1987 npcm_i2c_set_fifo(bus, -1, 0); in npcm_i2c_recovery_tgclk()
1992 iowrite8(NPCM_I2CCST_TGSCL, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1999 } while (!done && iter--); in npcm_i2c_recovery_tgclk()
2001 /* If SDA line is released: send start-addr-stop, to re-sync. */ in npcm_i2c_recovery_tgclk()
2004 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_recovery_tgclk()
2005 npcm_i2c_master_start(bus); in npcm_i2c_recovery_tgclk()
2010 if (npcm_i2c_is_master(bus) > 0) { in npcm_i2c_recovery_tgclk()
2012 npcm_i2c_master_stop(bus); in npcm_i2c_recovery_tgclk()
2016 npcm_i2c_reset(bus); in npcm_i2c_recovery_tgclk()
2017 npcm_i2c_int_enable(bus, true); in npcm_i2c_recovery_tgclk()
2022 status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
2024 if (bus->rec_fail_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
2025 bus->rec_fail_cnt++; in npcm_i2c_recovery_tgclk()
2027 if (bus->rec_succ_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
2028 bus->rec_succ_cnt++; in npcm_i2c_recovery_tgclk()
2030 bus->ber_state = false; in npcm_i2c_recovery_tgclk()
2037 struct npcm_i2c *bus = container_of(_adap, struct npcm_i2c, adap); in npcm_i2c_recovery_init() local
2038 struct i2c_bus_recovery_info *rinfo = &bus->rinfo; in npcm_i2c_recovery_init()
2040 rinfo->recover_bus = npcm_i2c_recovery_tgclk; in npcm_i2c_recovery_init()
2048 rinfo->get_scl = npcm_i2c_get_SCL; in npcm_i2c_recovery_init()
2049 rinfo->get_sda = npcm_i2c_get_SDA; in npcm_i2c_recovery_init()
2050 _adap->bus_recovery_info = rinfo; in npcm_i2c_recovery_init()
2061 * and bus frequency.
2062 * 100kHz bus requires tSCL = 4 * SCLFRQ * tCLK. LT and HT are symmetric.
2063 * 400kHz bus requires asymmetric HT and LT. A different equation is recommended
2067 static int npcm_i2c_init_clk(struct npcm_i2c *bus, u32 bus_freq_hz) in npcm_i2c_init_clk() argument
2073 bus->bus_freq = bus_freq_hz; in npcm_i2c_init_clk()
2091 return -EINVAL; in npcm_i2c_init_clk()
2095 if (bus->apb_clk >= smb_timing[scl_table_cnt].core_clk) in npcm_i2c_init_clk()
2099 return -EINVAL; in npcm_i2c_init_clk()
2103 bus->reg + NPCM_I2CCTL2); in npcm_i2c_init_clk()
2108 bus->reg + NPCM_I2CCTL3); in npcm_i2c_init_clk()
2111 npcm_i2c_select_bank(bus, I2C_BANK_0); in npcm_i2c_init_clk()
2116 * k1 = 2 * SCLLT7-0 -> Low Time = k1 / 2 in npcm_i2c_init_clk()
2117 * k2 = 2 * SCLLT7-0 -> High Time = k2 / 2 in npcm_i2c_init_clk()
2119 iowrite8(smb_timing[scl_table_cnt].scllt, bus->reg + NPCM_I2CSCLLT); in npcm_i2c_init_clk()
2120 iowrite8(smb_timing[scl_table_cnt].sclht, bus->reg + NPCM_I2CSCLHT); in npcm_i2c_init_clk()
2122 iowrite8(smb_timing[scl_table_cnt].dbcnt, bus->reg + NPCM_I2CCTL5); in npcm_i2c_init_clk()
2125 iowrite8(smb_timing[scl_table_cnt].hldt, bus->reg + NPCM_I2CCTL4); in npcm_i2c_init_clk()
2128 npcm_i2c_select_bank(bus, I2C_BANK_1); in npcm_i2c_init_clk()
2133 static int npcm_i2c_init_module(struct npcm_i2c *bus, enum i2c_mode mode, in npcm_i2c_init_module() argument
2140 if ((bus->state != I2C_DISABLE && bus->state != I2C_IDLE) || in npcm_i2c_init_module()
2142 return -EINVAL; in npcm_i2c_init_module()
2144 npcm_i2c_int_enable(bus, false); in npcm_i2c_init_module()
2145 npcm_i2c_disable(bus); in npcm_i2c_init_module()
2148 if (FIELD_GET(I2C_VER_FIFO_EN, ioread8(bus->reg + I2C_VER))) { in npcm_i2c_init_module()
2149 bus->fifo_use = true; in npcm_i2c_init_module()
2150 npcm_i2c_select_bank(bus, I2C_BANK_0); in npcm_i2c_init_module()
2151 val = ioread8(bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
2153 iowrite8(val, bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
2154 npcm_i2c_select_bank(bus, I2C_BANK_1); in npcm_i2c_init_module()
2156 bus->fifo_use = false; in npcm_i2c_init_module()
2160 ret = npcm_i2c_init_clk(bus, bus_freq_hz); in npcm_i2c_init_module()
2162 dev_err(bus->dev, "npcm_i2c_init_clk failed\n"); in npcm_i2c_init_module()
2167 npcm_i2c_enable(bus); in npcm_i2c_init_module()
2168 bus->state = I2C_IDLE; in npcm_i2c_init_module()
2169 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
2171 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
2173 npcm_i2c_reset(bus); in npcm_i2c_init_module()
2176 if ((npcm_i2c_get_SDA(&bus->adap) == 0) || (npcm_i2c_get_SCL(&bus->adap) == 0)) { in npcm_i2c_init_module()
2177 dev_warn(bus->dev, " I2C%d SDA=%d SCL=%d, attempting to recover\n", bus->num, in npcm_i2c_init_module()
2178 npcm_i2c_get_SDA(&bus->adap), npcm_i2c_get_SCL(&bus->adap)); in npcm_i2c_init_module()
2179 if (npcm_i2c_recovery_tgclk(&bus->adap)) { in npcm_i2c_init_module()
2180 dev_err(bus->dev, "I2C%d init fail: SDA=%d SCL=%d\n", in npcm_i2c_init_module()
2181 bus->num, npcm_i2c_get_SDA(&bus->adap), in npcm_i2c_init_module()
2182 npcm_i2c_get_SCL(&bus->adap)); in npcm_i2c_init_module()
2183 return -ENXIO; in npcm_i2c_init_module()
2187 npcm_i2c_int_enable(bus, true); in npcm_i2c_init_module()
2191 static int __npcm_i2c_init(struct npcm_i2c *bus, struct platform_device *pdev) in __npcm_i2c_init() argument
2196 /* Initialize the internal data structures */ in __npcm_i2c_init()
2197 bus->state = I2C_DISABLE; in __npcm_i2c_init()
2198 bus->master_or_slave = I2C_SLAVE; in __npcm_i2c_init()
2199 bus->int_time_stamp = 0; in __npcm_i2c_init()
2201 bus->slave = NULL; in __npcm_i2c_init()
2204 ret = device_property_read_u32(&pdev->dev, "clock-frequency", in __npcm_i2c_init()
2207 dev_info(&pdev->dev, "Could not read clock-frequency property"); in __npcm_i2c_init()
2211 ret = npcm_i2c_init_module(bus, I2C_MASTER, clk_freq_hz); in __npcm_i2c_init()
2213 dev_err(&pdev->dev, "npcm_i2c_init_module failed\n"); in __npcm_i2c_init()
2222 struct npcm_i2c *bus = dev_id; in npcm_i2c_bus_irq() local
2224 if (npcm_i2c_is_master(bus)) in npcm_i2c_bus_irq()
2225 bus->master_or_slave = I2C_MASTER; in npcm_i2c_bus_irq()
2227 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_bus_irq()
2228 bus->int_time_stamp = jiffies; in npcm_i2c_bus_irq()
2229 if (!npcm_i2c_int_master_handler(bus)) in npcm_i2c_bus_irq()
2233 if (bus->slave) { in npcm_i2c_bus_irq()
2234 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_bus_irq()
2235 if (npcm_i2c_int_slave_handler(bus)) in npcm_i2c_bus_irq()
2240 npcm_i2c_clear_master_status(bus); in npcm_i2c_bus_irq()
2245 static bool npcm_i2c_master_start_xmit(struct npcm_i2c *bus, in npcm_i2c_master_start_xmit() argument
2250 if (bus->state != I2C_IDLE) { in npcm_i2c_master_start_xmit()
2251 bus->cmd_err = -EBUSY; in npcm_i2c_master_start_xmit()
2254 bus->wr_buf = write_data; in npcm_i2c_master_start_xmit()
2255 bus->wr_size = nwrite; in npcm_i2c_master_start_xmit()
2256 bus->wr_ind = 0; in npcm_i2c_master_start_xmit()
2257 bus->rd_buf = read_data; in npcm_i2c_master_start_xmit()
2258 bus->rd_size = nread; in npcm_i2c_master_start_xmit()
2259 bus->rd_ind = 0; in npcm_i2c_master_start_xmit()
2260 bus->PEC_use = 0; in npcm_i2c_master_start_xmit()
2264 bus->PEC_use = use_PEC; in npcm_i2c_master_start_xmit()
2266 bus->read_block_use = use_read_block; in npcm_i2c_master_start_xmit()
2268 bus->operation = I2C_READ_OPER; in npcm_i2c_master_start_xmit()
2270 bus->operation = I2C_WRITE_OPER; in npcm_i2c_master_start_xmit()
2271 if (bus->fifo_use) { in npcm_i2c_master_start_xmit()
2274 npcm_i2c_select_bank(bus, I2C_BANK_1); in npcm_i2c_master_start_xmit()
2276 i2cfif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2279 iowrite8(i2cfif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2282 bus->state = I2C_IDLE; in npcm_i2c_master_start_xmit()
2283 npcm_i2c_stall_after_start(bus, true); in npcm_i2c_master_start_xmit()
2284 npcm_i2c_master_start(bus); in npcm_i2c_master_start_xmit()
2291 struct npcm_i2c *bus = container_of(adap, struct npcm_i2c, adap); in npcm_i2c_master_xfer() local
2302 if (bus->state == I2C_DISABLE) { in npcm_i2c_master_xfer()
2303 dev_err(bus->dev, "I2C%d module is disabled", bus->num); in npcm_i2c_master_xfer()
2304 return -EINVAL; in npcm_i2c_master_xfer()
2308 if (msg0->flags & I2C_M_RD) { /* read */ in npcm_i2c_master_xfer()
2311 read_data = msg0->buf; in npcm_i2c_master_xfer()
2312 if (msg0->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2315 if (msg0->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2318 nread = msg0->len; in npcm_i2c_master_xfer()
2321 nwrite = msg0->len; in npcm_i2c_master_xfer()
2322 write_data = msg0->buf; in npcm_i2c_master_xfer()
2327 read_data = msg1->buf; in npcm_i2c_master_xfer()
2328 if (msg1->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2331 if (msg1->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2334 nread = msg1->len; in npcm_i2c_master_xfer()
2341 dev_err(bus->dev, "i2c%d buffer too big\n", bus->num); in npcm_i2c_master_xfer()
2342 return -EINVAL; in npcm_i2c_master_xfer()
2345 time_left = jiffies + bus->adap.timeout / bus->adap.retries + 1; in npcm_i2c_master_xfer()
2348 * we must clear slave address immediately when the bus is not in npcm_i2c_master_xfer()
2352 spin_lock_irqsave(&bus->lock, flags); in npcm_i2c_master_xfer()
2353 bus_busy = ioread8(bus->reg + NPCM_I2CCST) & NPCM_I2CCST_BB; in npcm_i2c_master_xfer()
2355 if (!bus_busy && bus->slave) in npcm_i2c_master_xfer()
2356 iowrite8((bus->slave->addr & 0x7F), in npcm_i2c_master_xfer()
2357 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2359 spin_unlock_irqrestore(&bus->lock, flags); in npcm_i2c_master_xfer()
2368 * from the bus->dest_addr for the i2c_recover_bus() call later. in npcm_i2c_master_xfer()
2371 * the i2c bus if some error condition occurs. in npcm_i2c_master_xfer()
2376 bus->dest_addr = i2c_8bit_addr_from_msg(msg0) & ~I2C_M_RD; in npcm_i2c_master_xfer()
2379 * Check the BER (bus error) state, when ber_state is true, it means that the module in npcm_i2c_master_xfer()
2380 * detects the bus error which is caused by some factor like that the electricity in npcm_i2c_master_xfer()
2381 * noise occurs on the bus. Under this condition, the module is reset and the bus in npcm_i2c_master_xfer()
2384 * While ber_state is false, the module reset and bus recovery also get done as the in npcm_i2c_master_xfer()
2385 * bus is busy. in npcm_i2c_master_xfer()
2387 if (bus_busy || bus->ber_state) { in npcm_i2c_master_xfer()
2388 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_master_xfer()
2389 npcm_i2c_reset(bus); in npcm_i2c_master_xfer()
2391 return -EAGAIN; in npcm_i2c_master_xfer()
2394 npcm_i2c_init_params(bus); in npcm_i2c_master_xfer()
2395 bus->msgs = msgs; in npcm_i2c_master_xfer()
2396 bus->msgs_num = num; in npcm_i2c_master_xfer()
2397 bus->cmd_err = 0; in npcm_i2c_master_xfer()
2398 bus->read_block_use = read_block; in npcm_i2c_master_xfer()
2400 reinit_completion(&bus->cmd_complete); in npcm_i2c_master_xfer()
2402 npcm_i2c_int_enable(bus, true); in npcm_i2c_master_xfer()
2404 if (npcm_i2c_master_start_xmit(bus, nwrite, nread, in npcm_i2c_master_xfer()
2412 timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); in npcm_i2c_master_xfer()
2413 timeout = max_t(unsigned long, bus->adap.timeout / bus->adap.retries, in npcm_i2c_master_xfer()
2415 time_left = wait_for_completion_timeout(&bus->cmd_complete, in npcm_i2c_master_xfer()
2419 if (bus->timeout_cnt < ULLONG_MAX) in npcm_i2c_master_xfer()
2420 bus->timeout_cnt++; in npcm_i2c_master_xfer()
2421 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_master_xfer()
2423 bus->cmd_err = -EIO; in npcm_i2c_master_xfer()
2424 bus->state = I2C_IDLE; in npcm_i2c_master_xfer()
2429 /* if there was BER, check if need to recover the bus: */ in npcm_i2c_master_xfer()
2430 if (bus->cmd_err == -EAGAIN) in npcm_i2c_master_xfer()
2431 bus->cmd_err = i2c_recover_bus(adap); in npcm_i2c_master_xfer()
2438 else if (bus->cmd_err && in npcm_i2c_master_xfer()
2439 (bus->data->rxf_ctl_last_pec & ioread8(bus->reg + NPCM_I2CRXF_CTL))) in npcm_i2c_master_xfer()
2440 npcm_i2c_reset(bus); in npcm_i2c_master_xfer()
2443 npcm_i2c_stall_after_start(bus, false); in npcm_i2c_master_xfer()
2444 npcm_i2c_eob_int(bus, false); in npcm_i2c_master_xfer()
2448 if (bus->slave) in npcm_i2c_master_xfer()
2449 iowrite8((bus->slave->addr & 0x7F) | NPCM_I2CADDR_SAEN, in npcm_i2c_master_xfer()
2450 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2452 npcm_i2c_int_enable(bus, false); in npcm_i2c_master_xfer()
2454 return bus->cmd_err; in npcm_i2c_master_xfer()
2482 struct npcm_i2c *bus) in npcm_i2c_init_debugfs() argument
2484 debugfs_create_u64("ber_cnt", 0444, bus->adap.debugfs, &bus->ber_cnt); in npcm_i2c_init_debugfs()
2485 debugfs_create_u64("nack_cnt", 0444, bus->adap.debugfs, &bus->nack_cnt); in npcm_i2c_init_debugfs()
2486 debugfs_create_u64("rec_succ_cnt", 0444, bus->adap.debugfs, &bus->rec_succ_cnt); in npcm_i2c_init_debugfs()
2487 debugfs_create_u64("rec_fail_cnt", 0444, bus->adap.debugfs, &bus->rec_fail_cnt); in npcm_i2c_init_debugfs()
2488 debugfs_create_u64("timeout_cnt", 0444, bus->adap.debugfs, &bus->timeout_cnt); in npcm_i2c_init_debugfs()
2489 debugfs_create_u64("tx_complete_cnt", 0444, bus->adap.debugfs, &bus->tx_complete_cnt); in npcm_i2c_init_debugfs()
2494 struct device_node *np = pdev->dev.of_node; in npcm_i2c_probe_bus()
2496 struct device *dev = &pdev->dev; in npcm_i2c_probe_bus()
2498 struct npcm_i2c *bus; in npcm_i2c_probe_bus() local
2503 bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); in npcm_i2c_probe_bus()
2504 if (!bus) in npcm_i2c_probe_bus()
2505 return -ENOMEM; in npcm_i2c_probe_bus()
2507 bus->dev = &pdev->dev; in npcm_i2c_probe_bus()
2509 bus->data = of_device_get_match_data(dev); in npcm_i2c_probe_bus()
2510 if (!bus->data) { in npcm_i2c_probe_bus()
2511 dev_err(dev, "OF data missing\n"); in npcm_i2c_probe_bus()
2512 return -EINVAL; in npcm_i2c_probe_bus()
2515 bus->num = of_alias_get_id(pdev->dev.of_node, "i2c"); in npcm_i2c_probe_bus()
2517 i2c_clk = devm_clk_get(&pdev->dev, NULL); in npcm_i2c_probe_bus()
2520 bus->apb_clk = clk_get_rate(i2c_clk); in npcm_i2c_probe_bus()
2522 gcr_regmap = syscon_regmap_lookup_by_phandle(np, "nuvoton,sys-mgr"); in npcm_i2c_probe_bus()
2524 gcr_regmap = syscon_regmap_lookup_by_compatible("nuvoton,npcm750-gcr"); in npcm_i2c_probe_bus()
2528 regmap_write(gcr_regmap, NPCM_I2CSEGCTL, bus->data->segctl_init_val); in npcm_i2c_probe_bus()
2530 bus->reg = devm_platform_ioremap_resource(pdev, 0); in npcm_i2c_probe_bus()
2531 if (IS_ERR(bus->reg)) in npcm_i2c_probe_bus()
2532 return PTR_ERR(bus->reg); in npcm_i2c_probe_bus()
2534 spin_lock_init(&bus->lock); in npcm_i2c_probe_bus()
2535 init_completion(&bus->cmd_complete); in npcm_i2c_probe_bus()
2537 adap = &bus->adap; in npcm_i2c_probe_bus()
2538 adap->owner = THIS_MODULE; in npcm_i2c_probe_bus()
2539 adap->retries = 3; in npcm_i2c_probe_bus()
2541 * The users want to connect a lot of masters on the same bus. in npcm_i2c_probe_bus()
2542 * This timeout is used to determine the time it takes to take bus ownership. in npcm_i2c_probe_bus()
2545 adap->timeout = 2 * HZ; in npcm_i2c_probe_bus()
2546 adap->algo = &npcm_i2c_algo; in npcm_i2c_probe_bus()
2547 adap->quirks = &npcm_i2c_quirks; in npcm_i2c_probe_bus()
2548 adap->algo_data = bus; in npcm_i2c_probe_bus()
2549 adap->dev.parent = &pdev->dev; in npcm_i2c_probe_bus()
2550 adap->dev.of_node = pdev->dev.of_node; in npcm_i2c_probe_bus()
2551 adap->nr = pdev->id; in npcm_i2c_probe_bus()
2562 npcm_i2c_int_enable(bus, false); in npcm_i2c_probe_bus()
2564 ret = devm_request_irq(bus->dev, irq, npcm_i2c_bus_irq, 0, in npcm_i2c_probe_bus()
2565 dev_name(bus->dev), bus); in npcm_i2c_probe_bus()
2569 ret = __npcm_i2c_init(bus, pdev); in npcm_i2c_probe_bus()
2575 i2c_set_adapdata(adap, bus); in npcm_i2c_probe_bus()
2577 snprintf(bus->adap.name, sizeof(bus->adap.name), "npcm_i2c_%d", in npcm_i2c_probe_bus()
2578 bus->num); in npcm_i2c_probe_bus()
2579 ret = i2c_add_numbered_adapter(&bus->adap); in npcm_i2c_probe_bus()
2583 platform_set_drvdata(pdev, bus); in npcm_i2c_probe_bus()
2584 npcm_i2c_init_debugfs(pdev, bus); in npcm_i2c_probe_bus()
2591 struct npcm_i2c *bus = platform_get_drvdata(pdev); in npcm_i2c_remove_bus() local
2593 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2594 npcm_i2c_disable(bus); in npcm_i2c_remove_bus()
2595 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2596 i2c_del_adapter(&bus->adap); in npcm_i2c_remove_bus()
2600 { .compatible = "nuvoton,npcm750-i2c", .data = &npxm7xx_i2c_data },
2601 { .compatible = "nuvoton,npcm845-i2c", .data = &npxm8xx_i2c_data },
2610 .name = "nuvoton-i2c",
2620 MODULE_DESCRIPTION("Nuvoton I2C Bus Driver");