Lines Matching +full:i2c +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
3 * This is a combined i2c adapter and algorithm driver for the
5 * the same I2C unit (8240, 8245, 85xx).
7 * Copyright (C) 2003-2004 Humboldt Solutions Ltd, adrian@humboldt.co.uk
25 #include <linux/i2c.h>
59 MPC_I2C_ACTION_START = 1,
109 void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock);
112 static inline void writeccr(struct mpc_i2c *i2c, u32 x) in writeccr() argument
114 writeb(x, i2c->base + MPC_I2C_CR); in writeccr()
122 static void mpc_i2c_fixup(struct mpc_i2c *i2c) in mpc_i2c_fixup() argument
127 for (k = 9; k; k--) { in mpc_i2c_fixup()
128 writeccr(i2c, 0); in mpc_i2c_fixup()
129 writeb(0, i2c->base + MPC_I2C_SR); /* clear any status bits */ in mpc_i2c_fixup()
130 writeccr(i2c, CCR_MEN | CCR_MSTA); /* START */ in mpc_i2c_fixup()
131 readb(i2c->base + MPC_I2C_DR); /* init xfer */ in mpc_i2c_fixup()
134 writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSTA); /* delay SDA */ in mpc_i2c_fixup()
135 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup()
136 if (k != 1) in mpc_i2c_fixup()
140 writeccr(i2c, CCR_MEN); /* Initiate STOP */ in mpc_i2c_fixup()
141 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup()
143 writeccr(i2c, 0); in mpc_i2c_fixup()
146 static int i2c_mpc_wait_sr(struct mpc_i2c *i2c, int mask) in i2c_mpc_wait_sr() argument
148 void __iomem *addr = i2c->base + MPC_I2C_SR; in i2c_mpc_wait_sr()
157 * 1. Set up the frequency divider and sampling rate.
158 * 2. I2CCR - a0h
162 * 5. I2CCR - 00h
163 * 6. I2CCR - 22h
164 * 7. I2CCR - a2h
168 * 11. I2CCR - 82h
172 * 15. I2CCR - 80h
174 static void mpc_i2c_fixup_A004447(struct mpc_i2c *i2c) in mpc_i2c_fixup_A004447() argument
179 writeccr(i2c, CCR_MEN | CCR_MSTA); in mpc_i2c_fixup_A004447()
180 ret = i2c_mpc_wait_sr(i2c, CSR_MBB); in mpc_i2c_fixup_A004447()
182 dev_err(i2c->dev, "timeout waiting for CSR_MBB\n"); in mpc_i2c_fixup_A004447()
186 val = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_fixup_A004447()
189 writeccr(i2c, 0x00); in mpc_i2c_fixup_A004447()
190 writeccr(i2c, CCR_MSTA | CCR_RSVD); in mpc_i2c_fixup_A004447()
191 writeccr(i2c, CCR_MEN | CCR_MSTA | CCR_RSVD); in mpc_i2c_fixup_A004447()
192 ret = i2c_mpc_wait_sr(i2c, CSR_MBB); in mpc_i2c_fixup_A004447()
194 dev_err(i2c->dev, "timeout waiting for CSR_MBB\n"); in mpc_i2c_fixup_A004447()
197 val = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup_A004447()
198 ret = i2c_mpc_wait_sr(i2c, CSR_MIF); in mpc_i2c_fixup_A004447()
200 dev_err(i2c->dev, "timeout waiting for CSR_MIF\n"); in mpc_i2c_fixup_A004447()
203 writeccr(i2c, CCR_MEN | CCR_RSVD); in mpc_i2c_fixup_A004447()
205 val = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup_A004447()
206 ret = i2c_mpc_wait_sr(i2c, CSR_MIF); in mpc_i2c_fixup_A004447()
208 dev_err(i2c->dev, "timeout waiting for CSR_MIF\n"); in mpc_i2c_fixup_A004447()
211 writeccr(i2c, CCR_MEN); in mpc_i2c_fixup_A004447()
247 /* see below - default fdr = 0x3f -> div = 2048 */ in mpc_i2c_get_fdr_52xx()
249 return -EINVAL; in mpc_i2c_get_fdr_52xx()
256 * We want to choose an FDR/DFSR that generates an I2C bus speed that in mpc_i2c_get_fdr_52xx()
262 if (div->fdr & 0xc0 && pvr == 0x80822011) in mpc_i2c_get_fdr_52xx()
264 if (div->divider >= divider) in mpc_i2c_get_fdr_52xx()
268 *real_clk = mpc5xxx_fwnode_get_bus_frequency(fwnode) / div->divider; in mpc_i2c_get_fdr_52xx()
269 return (int)div->fdr; in mpc_i2c_get_fdr_52xx()
273 struct mpc_i2c *i2c, in mpc_i2c_setup_52xx() argument
279 dev_dbg(i2c->dev, "using fdr %d\n", in mpc_i2c_setup_52xx()
280 readb(i2c->base + MPC_I2C_FDR)); in mpc_i2c_setup_52xx()
284 ret = mpc_i2c_get_fdr_52xx(node, clock, &i2c->real_clk); in mpc_i2c_setup_52xx()
287 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); in mpc_i2c_setup_52xx()
290 dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk, in mpc_i2c_setup_52xx()
295 struct mpc_i2c *i2c, in mpc_i2c_setup_52xx() argument
303 struct mpc_i2c *i2c, in mpc_i2c_setup_512x() argument
309 /* Enable I2C interrupts for mpc5121 */ in mpc_i2c_setup_512x()
311 of_find_compatible_node(NULL, NULL, "fsl,mpc5121-i2c-ctrl"); in mpc_i2c_setup_512x()
316 /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */ in mpc_i2c_setup_512x()
319 setbits32(ctrl, 1 << (24 + idx * 2)); in mpc_i2c_setup_512x()
325 mpc_i2c_setup_52xx(node, i2c, clock); in mpc_i2c_setup_512x()
329 struct mpc_i2c *i2c, in mpc_i2c_setup_512x() argument
362 of_find_node_by_name(NULL, "global-utilities"); in mpc_i2c_get_sec_cfg_8xxx()
379 val = in_be32(reg) & 0x00000020; /* sec-cfg */ in mpc_i2c_get_sec_cfg_8xxx()
390 * According to the AN2919 all MPC824x have prescaler 1, while MPC83xx in mpc_i2c_get_prescaler_8xxx()
391 * may have prescaler 1, 2, or 3, depending on the power-on in mpc_i2c_get_prescaler_8xxx()
394 u32 prescaler = 1; in mpc_i2c_get_prescaler_8xxx()
408 /* the above 85xx SoCs have prescaler 1 */ in mpc_i2c_get_prescaler_8xxx()
409 prescaler = 1; in mpc_i2c_get_prescaler_8xxx()
431 /* see below - default fdr = 0x1031 -> div = 16 * 3072 */ in mpc_i2c_get_fdr_8xxx()
433 return -EINVAL; in mpc_i2c_get_fdr_8xxx()
438 pr_debug("I2C: src_clock=%d clock=%d divider=%d\n", in mpc_i2c_get_fdr_8xxx()
442 * We want to choose an FDR/DFSR that generates an I2C bus speed that in mpc_i2c_get_fdr_8xxx()
447 if (div->divider >= divider) in mpc_i2c_get_fdr_8xxx()
451 *real_clk = fsl_get_sys_freq() / prescaler / div->divider; in mpc_i2c_get_fdr_8xxx()
452 return (int)div->fdr; in mpc_i2c_get_fdr_8xxx()
456 struct mpc_i2c *i2c, in mpc_i2c_setup_8xxx() argument
462 dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n", in mpc_i2c_setup_8xxx()
463 readb(i2c->base + MPC_I2C_DFSRR), in mpc_i2c_setup_8xxx()
464 readb(i2c->base + MPC_I2C_FDR)); in mpc_i2c_setup_8xxx()
468 ret = mpc_i2c_get_fdr_8xxx(node, clock, &i2c->real_clk); in mpc_i2c_setup_8xxx()
471 writeb(fdr & 0xff, i2c->base + MPC_I2C_FDR); in mpc_i2c_setup_8xxx()
472 writeb((fdr >> 8) & 0xff, i2c->base + MPC_I2C_DFSRR); in mpc_i2c_setup_8xxx()
475 dev_info(i2c->dev, "clock %d Hz (dfsrr=%d fdr=%d)\n", in mpc_i2c_setup_8xxx()
476 i2c->real_clk, fdr >> 8, fdr & 0xff); in mpc_i2c_setup_8xxx()
481 struct mpc_i2c *i2c, in mpc_i2c_setup_8xxx() argument
487 static void mpc_i2c_finish(struct mpc_i2c *i2c, int rc) in mpc_i2c_finish() argument
489 i2c->rc = rc; in mpc_i2c_finish()
490 i2c->block = 0; in mpc_i2c_finish()
491 i2c->cntl_bits = CCR_MEN; in mpc_i2c_finish()
492 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_finish()
493 wake_up(&i2c->waitq); in mpc_i2c_finish()
496 static void mpc_i2c_do_action(struct mpc_i2c *i2c) in mpc_i2c_do_action() argument
503 dev_dbg(i2c->dev, "action = %s\n", action_str[i2c->action]); in mpc_i2c_do_action()
505 i2c->cntl_bits &= ~(CCR_RSTA | CCR_MTX | CCR_TXAK); in mpc_i2c_do_action()
507 if (i2c->action != MPC_I2C_ACTION_STOP) { in mpc_i2c_do_action()
508 msg = &i2c->msgs[i2c->curr_msg]; in mpc_i2c_do_action()
509 if (msg->flags & I2C_M_RD) in mpc_i2c_do_action()
510 dir = 1; in mpc_i2c_do_action()
511 if (msg->flags & I2C_M_RECV_LEN) in mpc_i2c_do_action()
512 recv_len = 1; in mpc_i2c_do_action()
515 switch (i2c->action) { in mpc_i2c_do_action()
517 i2c->cntl_bits |= CCR_RSTA; in mpc_i2c_do_action()
521 i2c->cntl_bits |= CCR_MSTA | CCR_MTX; in mpc_i2c_do_action()
522 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
523 writeb((msg->addr << 1) | dir, i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
524 i2c->expect_rxack = 1; in mpc_i2c_do_action()
525 i2c->action = dir ? MPC_I2C_ACTION_READ_BEGIN : MPC_I2C_ACTION_WRITE; in mpc_i2c_do_action()
529 if (msg->len) { in mpc_i2c_do_action()
530 if (msg->len == 1 && !(msg->flags & I2C_M_RECV_LEN)) in mpc_i2c_do_action()
531 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
533 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
535 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
537 i2c->action = MPC_I2C_ACTION_READ_BYTE; in mpc_i2c_do_action()
541 if (i2c->byte_posn || !recv_len) { in mpc_i2c_do_action()
543 if (i2c->byte_posn == msg->len - 2) in mpc_i2c_do_action()
544 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
546 if (i2c->byte_posn == msg->len - 1) in mpc_i2c_do_action()
547 i2c->cntl_bits |= CCR_MTX; in mpc_i2c_do_action()
549 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
552 byte = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
554 if (i2c->byte_posn == 0 && recv_len) { in mpc_i2c_do_action()
556 mpc_i2c_finish(i2c, -EPROTO); in mpc_i2c_do_action()
559 msg->len += byte; in mpc_i2c_do_action()
562 * is 1 byte (total length is 2 bytes). in mpc_i2c_do_action()
564 if (msg->len == 2) { in mpc_i2c_do_action()
565 i2c->cntl_bits |= CCR_TXAK; in mpc_i2c_do_action()
566 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_do_action()
570 dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action], byte); in mpc_i2c_do_action()
571 msg->buf[i2c->byte_posn++] = byte; in mpc_i2c_do_action()
575 dev_dbg(i2c->dev, "%s %02x\n", action_str[i2c->action], in mpc_i2c_do_action()
576 msg->buf[i2c->byte_posn]); in mpc_i2c_do_action()
577 writeb(msg->buf[i2c->byte_posn++], i2c->base + MPC_I2C_DR); in mpc_i2c_do_action()
578 i2c->expect_rxack = 1; in mpc_i2c_do_action()
582 mpc_i2c_finish(i2c, 0); in mpc_i2c_do_action()
586 WARN(1, "Unexpected action %d\n", i2c->action); in mpc_i2c_do_action()
590 if (msg && msg->len == i2c->byte_posn) { in mpc_i2c_do_action()
591 i2c->curr_msg++; in mpc_i2c_do_action()
592 i2c->byte_posn = 0; in mpc_i2c_do_action()
594 if (i2c->curr_msg == i2c->num_msgs) { in mpc_i2c_do_action()
595 i2c->action = MPC_I2C_ACTION_STOP; in mpc_i2c_do_action()
601 mpc_i2c_finish(i2c, 0); in mpc_i2c_do_action()
603 i2c->action = MPC_I2C_ACTION_RESTART; in mpc_i2c_do_action()
608 static void mpc_i2c_do_intr(struct mpc_i2c *i2c, u8 status) in mpc_i2c_do_intr() argument
610 spin_lock(&i2c->lock); in mpc_i2c_do_intr()
613 dev_dbg(i2c->dev, "unfinished\n"); in mpc_i2c_do_intr()
614 mpc_i2c_finish(i2c, -EIO); in mpc_i2c_do_intr()
619 dev_dbg(i2c->dev, "arbitration lost\n"); in mpc_i2c_do_intr()
620 mpc_i2c_finish(i2c, -EAGAIN); in mpc_i2c_do_intr()
624 if (i2c->expect_rxack && (status & CSR_RXAK)) { in mpc_i2c_do_intr()
625 dev_dbg(i2c->dev, "no Rx ACK\n"); in mpc_i2c_do_intr()
626 mpc_i2c_finish(i2c, -ENXIO); in mpc_i2c_do_intr()
629 i2c->expect_rxack = 0; in mpc_i2c_do_intr()
631 mpc_i2c_do_action(i2c); in mpc_i2c_do_intr()
634 spin_unlock(&i2c->lock); in mpc_i2c_do_intr()
639 struct mpc_i2c *i2c = dev_id; in mpc_i2c_isr() local
642 status = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_isr()
645 readb_poll_timeout_atomic(i2c->base + MPC_I2C_SR, status, status & CSR_MCF, 0, 100); in mpc_i2c_isr()
646 writeb(0, i2c->base + MPC_I2C_SR); in mpc_i2c_isr()
647 mpc_i2c_do_intr(i2c, status); in mpc_i2c_isr()
653 static int mpc_i2c_wait_for_completion(struct mpc_i2c *i2c) in mpc_i2c_wait_for_completion() argument
657 time_left = wait_event_timeout(i2c->waitq, !i2c->block, i2c->adap.timeout); in mpc_i2c_wait_for_completion()
659 return -ETIMEDOUT; in mpc_i2c_wait_for_completion()
666 static int mpc_i2c_execute_msg(struct mpc_i2c *i2c) in mpc_i2c_execute_msg() argument
672 spin_lock_irqsave(&i2c->lock, flags); in mpc_i2c_execute_msg()
674 i2c->curr_msg = 0; in mpc_i2c_execute_msg()
675 i2c->rc = 0; in mpc_i2c_execute_msg()
676 i2c->byte_posn = 0; in mpc_i2c_execute_msg()
677 i2c->block = 1; in mpc_i2c_execute_msg()
678 i2c->action = MPC_I2C_ACTION_START; in mpc_i2c_execute_msg()
680 i2c->cntl_bits = CCR_MEN | CCR_MIEN; in mpc_i2c_execute_msg()
681 writeb(0, i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
682 writeccr(i2c, i2c->cntl_bits); in mpc_i2c_execute_msg()
684 mpc_i2c_do_action(i2c); in mpc_i2c_execute_msg()
686 spin_unlock_irqrestore(&i2c->lock, flags); in mpc_i2c_execute_msg()
688 ret = mpc_i2c_wait_for_completion(i2c); in mpc_i2c_execute_msg()
690 i2c->rc = ret; in mpc_i2c_execute_msg()
692 if (i2c->rc == -EIO || i2c->rc == -EAGAIN || i2c->rc == -ETIMEDOUT) in mpc_i2c_execute_msg()
693 i2c_recover_bus(&i2c->adap); in mpc_i2c_execute_msg()
696 /* Wait until STOP is seen, allow up to 1 s */ in mpc_i2c_execute_msg()
697 while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) { in mpc_i2c_execute_msg()
699 u8 status = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
701 dev_dbg(i2c->dev, "timeout\n"); in mpc_i2c_execute_msg()
704 i2c->base + MPC_I2C_SR); in mpc_i2c_execute_msg()
705 i2c_recover_bus(&i2c->adap); in mpc_i2c_execute_msg()
707 return -EIO; in mpc_i2c_execute_msg()
712 return i2c->rc; in mpc_i2c_execute_msg()
718 struct mpc_i2c *i2c = i2c_get_adapdata(adap); in mpc_xfer() local
721 dev_dbg(i2c->dev, "num = %d\n", num); in mpc_xfer()
723 dev_dbg(i2c->dev, " addr = %02x, flags = %02x, len = %d, %*ph\n", in mpc_xfer()
728 WARN_ON(i2c->msgs != NULL); in mpc_xfer()
729 i2c->msgs = msgs; in mpc_xfer()
730 i2c->num_msgs = num; in mpc_xfer()
732 rc = mpc_i2c_execute_msg(i2c); in mpc_xfer()
736 i2c->num_msgs = 0; in mpc_xfer()
737 i2c->msgs = NULL; in mpc_xfer()
750 struct mpc_i2c *i2c = i2c_get_adapdata(adap); in fsl_i2c_bus_recovery() local
752 if (i2c->has_errata_A004447) in fsl_i2c_bus_recovery()
753 mpc_i2c_fixup_A004447(i2c); in fsl_i2c_bus_recovery()
755 mpc_i2c_fixup(i2c); in fsl_i2c_bus_recovery()
777 struct mpc_i2c *i2c; in fsl_i2c_probe() local
782 i2c = devm_kzalloc(&op->dev, sizeof(*i2c), GFP_KERNEL); in fsl_i2c_probe()
783 if (!i2c) in fsl_i2c_probe()
784 return -ENOMEM; in fsl_i2c_probe()
786 i2c->dev = &op->dev; /* for debug and error output */ in fsl_i2c_probe()
788 init_waitqueue_head(&i2c->waitq); in fsl_i2c_probe()
789 spin_lock_init(&i2c->lock); in fsl_i2c_probe()
791 i2c->base = devm_platform_ioremap_resource(op, 0); in fsl_i2c_probe()
792 if (IS_ERR(i2c->base)) in fsl_i2c_probe()
793 return PTR_ERR(i2c->base); in fsl_i2c_probe()
795 i2c->irq = platform_get_irq(op, 0); in fsl_i2c_probe()
796 if (i2c->irq < 0) in fsl_i2c_probe()
797 return i2c->irq; in fsl_i2c_probe()
799 result = devm_request_irq(&op->dev, i2c->irq, mpc_i2c_isr, in fsl_i2c_probe()
800 IRQF_SHARED, "i2c-mpc", i2c); in fsl_i2c_probe()
802 dev_err(i2c->dev, "failed to attach interrupt\n"); in fsl_i2c_probe()
807 * enable clock for the I2C peripheral (non fatal), in fsl_i2c_probe()
810 clk = devm_clk_get_optional_enabled(&op->dev, NULL); in fsl_i2c_probe()
812 dev_err(&op->dev, "failed to enable clock\n"); in fsl_i2c_probe()
816 if (of_property_read_bool(op->dev.of_node, "fsl,preserve-clocking")) { in fsl_i2c_probe()
819 result = of_property_read_u32(op->dev.of_node, in fsl_i2c_probe()
820 "clock-frequency", &clock); in fsl_i2c_probe()
825 data = device_get_match_data(&op->dev); in fsl_i2c_probe()
827 data->setup(op->dev.of_node, i2c, clock); in fsl_i2c_probe()
830 if (of_property_read_bool(op->dev.of_node, "dfsrr")) in fsl_i2c_probe()
831 mpc_i2c_setup_8xxx(op->dev.of_node, i2c, clock); in fsl_i2c_probe()
835 result = of_property_read_u32(op->dev.of_node, in fsl_i2c_probe()
836 "i2c-transfer-timeout-us", in fsl_i2c_probe()
838 if (result == -EINVAL) in fsl_i2c_probe()
839 result = of_property_read_u32(op->dev.of_node, in fsl_i2c_probe()
840 "i2c-scl-clk-low-timeout-us", in fsl_i2c_probe()
842 if (result == -EINVAL) in fsl_i2c_probe()
843 result = of_property_read_u32(op->dev.of_node, in fsl_i2c_probe()
854 dev_info(i2c->dev, "timeout %u us\n", mpc_ops.timeout * 1000000 / HZ); in fsl_i2c_probe()
856 if (of_property_read_bool(op->dev.of_node, "fsl,i2c-erratum-a004447")) in fsl_i2c_probe()
857 i2c->has_errata_A004447 = true; in fsl_i2c_probe()
859 i2c->adap = mpc_ops; in fsl_i2c_probe()
860 scnprintf(i2c->adap.name, sizeof(i2c->adap.name), in fsl_i2c_probe()
861 "MPC adapter (%s)", of_node_full_name(op->dev.of_node)); in fsl_i2c_probe()
862 i2c->adap.dev.parent = &op->dev; in fsl_i2c_probe()
863 i2c->adap.nr = op->id; in fsl_i2c_probe()
864 i2c->adap.dev.of_node = of_node_get(op->dev.of_node); in fsl_i2c_probe()
865 i2c->adap.bus_recovery_info = &fsl_i2c_recovery_info; in fsl_i2c_probe()
866 platform_set_drvdata(op, i2c); in fsl_i2c_probe()
867 i2c_set_adapdata(&i2c->adap, i2c); in fsl_i2c_probe()
869 result = i2c_add_numbered_adapter(&i2c->adap); in fsl_i2c_probe()
878 struct mpc_i2c *i2c = platform_get_drvdata(op); in fsl_i2c_remove() local
880 i2c_del_adapter(&i2c->adap); in fsl_i2c_remove()
885 struct mpc_i2c *i2c = dev_get_drvdata(dev); in mpc_i2c_suspend() local
887 i2c->fdr = readb(i2c->base + MPC_I2C_FDR); in mpc_i2c_suspend()
888 i2c->dfsrr = readb(i2c->base + MPC_I2C_DFSRR); in mpc_i2c_suspend()
895 struct mpc_i2c *i2c = dev_get_drvdata(dev); in mpc_i2c_resume() local
897 writeb(i2c->fdr, i2c->base + MPC_I2C_FDR); in mpc_i2c_resume()
898 writeb(i2c->dfsrr, i2c->base + MPC_I2C_DFSRR); in mpc_i2c_resume()
925 {.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
926 {.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, },
927 {.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, },
928 {.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, },
929 {.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, },
930 {.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, },
931 {.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, },
933 {.compatible = "fsl-i2c", },
943 .name = "mpc-i2c",
952 MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "