50  *  Supports the SMBus Message Transport (SMT) in the Intel Atom Processor
75 /* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
84 #define ISMT_MAX_RETRIES	3	/* number of SMBus retries to attempt */
124 #define ISMT_SPGT	0x300	/* SMBus PHY Global Timing */
145 /* SMBus PHY Global Timing Register (SPGT) bit definitions */
146 #define ISMT_SPGT_SPD_MASK	0xc0000000	/* SMBus Speed mask */
321  * @size: SMBus transaction type
394  * ismt_access() - process an SMBus command
396  * @addr: address of the i2c/SMBus target
399  * @command: the i2c/SMBus command to issue
400  * @size: SMBus transaction type
746 	 * Set the SMBus speed (could use this for slow HW debuggers)  in ismt_hw_init()
756 		dev_dbg(dev, "Setting SMBus clock to 80 kHz\n");  in ismt_hw_init()
762 		dev_dbg(dev, "Setting SMBus clock to 100 kHz\n");  in ismt_hw_init()
768 		dev_dbg(dev, "Setting SMBus clock to 400 kHz\n");  in ismt_hw_init()
774 		dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n");  in ismt_hw_init()
780 		dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n");  in ismt_hw_init()
800 	dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed);  in ismt_hw_init()
907 		dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n",  in ismt_probe()
915 	/* Determine the address of the SMBus area */  in ismt_probe()
920 			"SMBus base address uninitialized, upgrade BIOS\n");  in ismt_probe()
925 		 "SMBus iSMT adapter at %lx", start);  in ismt_probe()
939 			"Failed to request SMBus region 0x%lx-0x%lx\n",  in ismt_probe()
946 		dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n");  in ismt_probe()
994 MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver");