Lines Matching full:dev
34 static void i2c_dw_configure_fifo_master(struct dw_i2c_dev *dev) in i2c_dw_configure_fifo_master() argument
37 regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2); in i2c_dw_configure_fifo_master()
38 regmap_write(dev->map, DW_IC_RX_TL, 0); in i2c_dw_configure_fifo_master()
41 regmap_write(dev->map, DW_IC_CON, dev->master_cfg); in i2c_dw_configure_fifo_master()
44 static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev) in i2c_dw_set_timings_master() argument
48 struct i2c_timings *t = &dev->timings; in i2c_dw_set_timings_master()
53 ret = i2c_dw_acquire_lock(dev); in i2c_dw_set_timings_master()
57 ret = regmap_read(dev->map, DW_IC_COMP_PARAM_1, &comp_param1); in i2c_dw_set_timings_master()
58 i2c_dw_release_lock(dev); in i2c_dw_set_timings_master()
67 if (!dev->ss_hcnt || !dev->ss_lcnt) { in i2c_dw_set_timings_master()
68 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
69 dev->ss_hcnt = in i2c_dw_set_timings_master()
70 i2c_dw_scl_hcnt(dev, in i2c_dw_set_timings_master()
76 dev->ss_lcnt = in i2c_dw_set_timings_master()
77 i2c_dw_scl_lcnt(dev, in i2c_dw_set_timings_master()
84 dev_dbg(dev->dev, "Standard Mode HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
85 dev->ss_hcnt, dev->ss_lcnt); in i2c_dw_set_timings_master()
97 if (dev->fp_hcnt && dev->fp_lcnt) { in i2c_dw_set_timings_master()
98 dev->fs_hcnt = dev->fp_hcnt; in i2c_dw_set_timings_master()
99 dev->fs_lcnt = dev->fp_lcnt; in i2c_dw_set_timings_master()
101 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
102 dev->fs_hcnt = in i2c_dw_set_timings_master()
103 i2c_dw_scl_hcnt(dev, in i2c_dw_set_timings_master()
109 dev->fs_lcnt = in i2c_dw_set_timings_master()
110 i2c_dw_scl_lcnt(dev, in i2c_dw_set_timings_master()
123 if (!dev->fs_hcnt || !dev->fs_lcnt) { in i2c_dw_set_timings_master()
124 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
125 dev->fs_hcnt = in i2c_dw_set_timings_master()
126 i2c_dw_scl_hcnt(dev, in i2c_dw_set_timings_master()
132 dev->fs_lcnt = in i2c_dw_set_timings_master()
133 i2c_dw_scl_lcnt(dev, in i2c_dw_set_timings_master()
140 dev_dbg(dev->dev, "Fast Mode%s HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
141 fp_str, dev->fs_hcnt, dev->fs_lcnt); in i2c_dw_set_timings_master()
144 if ((dev->master_cfg & DW_IC_CON_SPEED_MASK) == in i2c_dw_set_timings_master()
148 dev_err(dev->dev, "High Speed not supported!\n"); in i2c_dw_set_timings_master()
150 dev->master_cfg &= ~DW_IC_CON_SPEED_MASK; in i2c_dw_set_timings_master()
151 dev->master_cfg |= DW_IC_CON_SPEED_FAST; in i2c_dw_set_timings_master()
152 dev->hs_hcnt = 0; in i2c_dw_set_timings_master()
153 dev->hs_lcnt = 0; in i2c_dw_set_timings_master()
154 } else if (!dev->hs_hcnt || !dev->hs_lcnt) { in i2c_dw_set_timings_master()
160 * If dev->bus_capacitance_pF is greater than or equals in i2c_dw_set_timings_master()
164 if (dev->bus_capacitance_pF >= 400) { in i2c_dw_set_timings_master()
166 t_high = dev->clk_freq_optimized ? 160 : 120; in i2c_dw_set_timings_master()
171 t_low = dev->clk_freq_optimized ? 120 : 160; in i2c_dw_set_timings_master()
174 ic_clk = i2c_dw_clk_rate(dev); in i2c_dw_set_timings_master()
175 dev->hs_hcnt = in i2c_dw_set_timings_master()
176 i2c_dw_scl_hcnt(dev, in i2c_dw_set_timings_master()
182 dev->hs_lcnt = in i2c_dw_set_timings_master()
183 i2c_dw_scl_lcnt(dev, in i2c_dw_set_timings_master()
190 dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n", in i2c_dw_set_timings_master()
191 dev->hs_hcnt, dev->hs_lcnt); in i2c_dw_set_timings_master()
194 ret = i2c_dw_set_sda_hold(dev); in i2c_dw_set_timings_master()
198 dev_dbg(dev->dev, "Bus speed: %s\n", i2c_freq_mode_string(t->bus_freq_hz)); in i2c_dw_set_timings_master()
204 * @dev: device private data
212 static int i2c_dw_init_master(struct dw_i2c_dev *dev) in i2c_dw_init_master() argument
216 ret = i2c_dw_acquire_lock(dev); in i2c_dw_init_master()
221 __i2c_dw_disable(dev); in i2c_dw_init_master()
224 regmap_write(dev->map, DW_IC_SS_SCL_HCNT, dev->ss_hcnt); in i2c_dw_init_master()
225 regmap_write(dev->map, DW_IC_SS_SCL_LCNT, dev->ss_lcnt); in i2c_dw_init_master()
228 regmap_write(dev->map, DW_IC_FS_SCL_HCNT, dev->fs_hcnt); in i2c_dw_init_master()
229 regmap_write(dev->map, DW_IC_FS_SCL_LCNT, dev->fs_lcnt); in i2c_dw_init_master()
232 if (dev->hs_hcnt && dev->hs_lcnt) { in i2c_dw_init_master()
233 regmap_write(dev->map, DW_IC_HS_SCL_HCNT, dev->hs_hcnt); in i2c_dw_init_master()
234 regmap_write(dev->map, DW_IC_HS_SCL_LCNT, dev->hs_lcnt); in i2c_dw_init_master()
238 if (dev->sda_hold_time) in i2c_dw_init_master()
239 regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time); in i2c_dw_init_master()
241 i2c_dw_configure_fifo_master(dev); in i2c_dw_init_master()
242 i2c_dw_release_lock(dev); in i2c_dw_init_master()
247 static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) in i2c_dw_xfer_init() argument
249 struct i2c_msg *msgs = dev->msgs; in i2c_dw_xfer_init()
254 __i2c_dw_disable(dev); in i2c_dw_xfer_init()
257 if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) { in i2c_dw_xfer_init()
268 regmap_update_bits(dev->map, DW_IC_CON, DW_IC_CON_10BITADDR_MASTER, in i2c_dw_xfer_init()
275 regmap_write(dev->map, DW_IC_TAR, in i2c_dw_xfer_init()
276 msgs[dev->msg_write_idx].addr | ic_tar); in i2c_dw_xfer_init()
279 __i2c_dw_write_intr_mask(dev, 0); in i2c_dw_xfer_init()
282 __i2c_dw_enable(dev); in i2c_dw_xfer_init()
285 regmap_read(dev->map, DW_IC_ENABLE_STATUS, &dummy); in i2c_dw_xfer_init()
288 regmap_read(dev->map, DW_IC_CLR_INTR, &dummy); in i2c_dw_xfer_init()
289 __i2c_dw_write_intr_mask(dev, DW_IC_INTR_MASTER_MASK); in i2c_dw_xfer_init()
307 static bool i2c_dw_is_controller_active(struct dw_i2c_dev *dev) in i2c_dw_is_controller_active() argument
311 regmap_read(dev->map, DW_IC_STATUS, &status); in i2c_dw_is_controller_active()
315 return regmap_read_poll_timeout(dev->map, DW_IC_STATUS, status, in i2c_dw_is_controller_active()
320 static int i2c_dw_check_stopbit(struct dw_i2c_dev *dev) in i2c_dw_check_stopbit() argument
325 ret = regmap_read_poll_timeout(dev->map, DW_IC_INTR_STAT, val, in i2c_dw_check_stopbit()
329 dev_err(dev->dev, "i2c timeout error %d\n", ret); in i2c_dw_check_stopbit()
334 static int i2c_dw_status(struct dw_i2c_dev *dev) in i2c_dw_status() argument
338 status = i2c_dw_wait_bus_not_busy(dev); in i2c_dw_status()
342 return i2c_dw_check_stopbit(dev); in i2c_dw_status()
351 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in amd_i2c_dw_xfer_quirk() local
362 regmap_write(dev->map, AMD_UCSI_INTR_REG, AMD_UCSI_INTR_EN); in amd_i2c_dw_xfer_quirk()
364 dev->msgs = msgs; in amd_i2c_dw_xfer_quirk()
365 dev->msgs_num = num_msgs; in amd_i2c_dw_xfer_quirk()
366 i2c_dw_xfer_init(dev); in amd_i2c_dw_xfer_quirk()
374 regmap_write(dev->map, DW_IC_TX_TL, buf_len - 1); in amd_i2c_dw_xfer_quirk()
386 regmap_write(dev->map, DW_IC_DATA_CMD, 0x100); in amd_i2c_dw_xfer_quirk()
387 regmap_write(dev->map, DW_IC_DATA_CMD, 0x100 | cmd); in amd_i2c_dw_xfer_quirk()
389 regmap_write(dev->map, DW_IC_TX_TL, 2 * (buf_len - 1)); in amd_i2c_dw_xfer_quirk()
390 regmap_write(dev->map, DW_IC_RX_TL, 2 * (buf_len - 1)); in amd_i2c_dw_xfer_quirk()
396 status = i2c_dw_status(dev); in amd_i2c_dw_xfer_quirk()
401 regmap_read(dev->map, DW_IC_DATA_CMD, &val); in amd_i2c_dw_xfer_quirk()
404 status = i2c_dw_check_stopbit(dev); in amd_i2c_dw_xfer_quirk()
409 regmap_write(dev->map, DW_IC_DATA_CMD, *tx_buf++ | cmd); in amd_i2c_dw_xfer_quirk()
413 status = i2c_dw_check_stopbit(dev); in amd_i2c_dw_xfer_quirk()
428 i2c_dw_xfer_msg(struct dw_i2c_dev *dev) in i2c_dw_xfer_msg() argument
430 struct i2c_msg *msgs = dev->msgs; in i2c_dw_xfer_msg()
433 u32 addr = msgs[dev->msg_write_idx].addr; in i2c_dw_xfer_msg()
434 u32 buf_len = dev->tx_buf_len; in i2c_dw_xfer_msg()
435 u8 *buf = dev->tx_buf; in i2c_dw_xfer_msg()
441 for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { in i2c_dw_xfer_msg()
442 u32 flags = msgs[dev->msg_write_idx].flags; in i2c_dw_xfer_msg()
449 if (msgs[dev->msg_write_idx].addr != addr) { in i2c_dw_xfer_msg()
450 dev_err(dev->dev, in i2c_dw_xfer_msg()
452 dev->msg_err = -EINVAL; in i2c_dw_xfer_msg()
456 if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { in i2c_dw_xfer_msg()
458 buf = msgs[dev->msg_write_idx].buf; in i2c_dw_xfer_msg()
459 buf_len = msgs[dev->msg_write_idx].len; in i2c_dw_xfer_msg()
466 if ((dev->master_cfg & DW_IC_CON_RESTART_EN) && in i2c_dw_xfer_msg()
467 (dev->msg_write_idx > 0)) in i2c_dw_xfer_msg()
471 regmap_read(dev->map, DW_IC_TXFLR, &flr); in i2c_dw_xfer_msg()
472 tx_limit = dev->tx_fifo_depth - flr; in i2c_dw_xfer_msg()
474 regmap_read(dev->map, DW_IC_RXFLR, &flr); in i2c_dw_xfer_msg()
475 rx_limit = dev->rx_fifo_depth - flr; in i2c_dw_xfer_msg()
493 if (dev->msg_write_idx == dev->msgs_num - 1 && in i2c_dw_xfer_msg()
502 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { in i2c_dw_xfer_msg()
505 if (dev->rx_outstanding >= dev->rx_fifo_depth) in i2c_dw_xfer_msg()
508 regmap_write(dev->map, DW_IC_DATA_CMD, in i2c_dw_xfer_msg()
511 dev->rx_outstanding++; in i2c_dw_xfer_msg()
513 regmap_write(dev->map, DW_IC_DATA_CMD, in i2c_dw_xfer_msg()
519 dev->tx_buf = buf; in i2c_dw_xfer_msg()
520 dev->tx_buf_len = buf_len; in i2c_dw_xfer_msg()
530 dev->status |= STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
535 dev->status |= STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
538 dev->status &= ~STATUS_WRITE_IN_PROGRESS; in i2c_dw_xfer_msg()
545 if (dev->msg_write_idx == dev->msgs_num) in i2c_dw_xfer_msg()
548 if (dev->msg_err) in i2c_dw_xfer_msg()
551 __i2c_dw_write_intr_mask(dev, intr_mask); in i2c_dw_xfer_msg()
555 i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len) in i2c_dw_recv_len() argument
557 struct i2c_msg *msgs = dev->msgs; in i2c_dw_recv_len()
558 u32 flags = msgs[dev->msg_read_idx].flags; in i2c_dw_recv_len()
566 dev->tx_buf_len = len - min_t(u8, len, dev->rx_outstanding); in i2c_dw_recv_len()
567 msgs[dev->msg_read_idx].len = len; in i2c_dw_recv_len()
568 msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN; in i2c_dw_recv_len()
574 __i2c_dw_read_intr_mask(dev, &intr_mask); in i2c_dw_recv_len()
576 __i2c_dw_write_intr_mask(dev, intr_mask); in i2c_dw_recv_len()
582 i2c_dw_read(struct dw_i2c_dev *dev) in i2c_dw_read() argument
584 struct i2c_msg *msgs = dev->msgs; in i2c_dw_read()
587 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { in i2c_dw_read()
592 if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) in i2c_dw_read()
595 if (!(dev->status & STATUS_READ_IN_PROGRESS)) { in i2c_dw_read()
596 len = msgs[dev->msg_read_idx].len; in i2c_dw_read()
597 buf = msgs[dev->msg_read_idx].buf; in i2c_dw_read()
599 len = dev->rx_buf_len; in i2c_dw_read()
600 buf = dev->rx_buf; in i2c_dw_read()
603 regmap_read(dev->map, DW_IC_RXFLR, &rx_valid); in i2c_dw_read()
606 u32 flags = msgs[dev->msg_read_idx].flags; in i2c_dw_read()
608 regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); in i2c_dw_read()
624 len = i2c_dw_recv_len(dev, tmp); in i2c_dw_read()
627 dev->rx_outstanding--; in i2c_dw_read()
631 dev->status |= STATUS_READ_IN_PROGRESS; in i2c_dw_read()
632 dev->rx_buf_len = len; in i2c_dw_read()
633 dev->rx_buf = buf; in i2c_dw_read()
636 dev->status &= ~STATUS_READ_IN_PROGRESS; in i2c_dw_read()
640 static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) in i2c_dw_read_clear_intrbits() argument
656 if (!(dev->flags & ACCESS_POLLING)) { in i2c_dw_read_clear_intrbits()
657 regmap_read(dev->map, DW_IC_INTR_STAT, &stat); in i2c_dw_read_clear_intrbits()
659 regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &stat); in i2c_dw_read_clear_intrbits()
660 stat &= dev->sw_mask; in i2c_dw_read_clear_intrbits()
671 regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy); in i2c_dw_read_clear_intrbits()
673 regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy); in i2c_dw_read_clear_intrbits()
675 regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy); in i2c_dw_read_clear_intrbits()
677 regmap_read(dev->map, DW_IC_CLR_RD_REQ, &dummy); in i2c_dw_read_clear_intrbits()
683 regmap_read(dev->map, DW_IC_TX_ABRT_SOURCE, &dev->abort_source); in i2c_dw_read_clear_intrbits()
684 regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy); in i2c_dw_read_clear_intrbits()
687 regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy); in i2c_dw_read_clear_intrbits()
689 regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy); in i2c_dw_read_clear_intrbits()
691 ((dev->rx_outstanding == 0) || (stat & DW_IC_INTR_RX_FULL))) in i2c_dw_read_clear_intrbits()
692 regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy); in i2c_dw_read_clear_intrbits()
694 regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy); in i2c_dw_read_clear_intrbits()
696 regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy); in i2c_dw_read_clear_intrbits()
701 static void i2c_dw_process_transfer(struct dw_i2c_dev *dev, unsigned int stat) in i2c_dw_process_transfer() argument
704 dev->cmd_err |= DW_IC_ERR_TX_ABRT; in i2c_dw_process_transfer()
705 dev->status &= ~STATUS_MASK; in i2c_dw_process_transfer()
706 dev->rx_outstanding = 0; in i2c_dw_process_transfer()
712 __i2c_dw_write_intr_mask(dev, 0); in i2c_dw_process_transfer()
717 i2c_dw_read(dev); in i2c_dw_process_transfer()
720 i2c_dw_xfer_msg(dev); in i2c_dw_process_transfer()
729 if (((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) && in i2c_dw_process_transfer()
730 (dev->rx_outstanding == 0)) in i2c_dw_process_transfer()
731 complete(&dev->cmd_complete); in i2c_dw_process_transfer()
732 else if (unlikely(dev->flags & ACCESS_INTR_MASK)) { in i2c_dw_process_transfer()
734 __i2c_dw_read_intr_mask(dev, &stat); in i2c_dw_process_transfer()
735 __i2c_dw_write_intr_mask(dev, 0); in i2c_dw_process_transfer()
736 __i2c_dw_write_intr_mask(dev, stat); in i2c_dw_process_transfer()
746 struct dw_i2c_dev *dev = dev_id; in i2c_dw_isr() local
749 regmap_read(dev->map, DW_IC_ENABLE, &enabled); in i2c_dw_isr()
750 regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &stat); in i2c_dw_isr()
753 if (pm_runtime_suspended(dev->dev) || stat == GENMASK(31, 0)) in i2c_dw_isr()
755 dev_dbg(dev->dev, "enabled=%#x stat=%#x\n", enabled, stat); in i2c_dw_isr()
757 stat = i2c_dw_read_clear_intrbits(dev); in i2c_dw_isr()
759 if (!(dev->status & STATUS_ACTIVE)) { in i2c_dw_isr()
767 __i2c_dw_write_intr_mask(dev, 0); in i2c_dw_isr()
771 i2c_dw_process_transfer(dev, stat); in i2c_dw_isr()
776 static int i2c_dw_wait_transfer(struct dw_i2c_dev *dev) in i2c_dw_wait_transfer() argument
778 unsigned long timeout = dev->adapter.timeout; in i2c_dw_wait_transfer()
782 if (!(dev->flags & ACCESS_POLLING)) { in i2c_dw_wait_transfer()
783 ret = wait_for_completion_timeout(&dev->cmd_complete, timeout); in i2c_dw_wait_transfer()
787 ret = try_wait_for_completion(&dev->cmd_complete); in i2c_dw_wait_transfer()
791 stat = i2c_dw_read_clear_intrbits(dev); in i2c_dw_wait_transfer()
793 i2c_dw_process_transfer(dev, stat); in i2c_dw_wait_transfer()
809 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_xfer() local
812 dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); in i2c_dw_xfer()
814 pm_runtime_get_sync(dev->dev); in i2c_dw_xfer()
816 switch (dev->flags & MODEL_MASK) { in i2c_dw_xfer()
824 reinit_completion(&dev->cmd_complete); in i2c_dw_xfer()
825 dev->msgs = msgs; in i2c_dw_xfer()
826 dev->msgs_num = num; in i2c_dw_xfer()
827 dev->cmd_err = 0; in i2c_dw_xfer()
828 dev->msg_write_idx = 0; in i2c_dw_xfer()
829 dev->msg_read_idx = 0; in i2c_dw_xfer()
830 dev->msg_err = 0; in i2c_dw_xfer()
831 dev->status = 0; in i2c_dw_xfer()
832 dev->abort_source = 0; in i2c_dw_xfer()
833 dev->rx_outstanding = 0; in i2c_dw_xfer()
835 ret = i2c_dw_acquire_lock(dev); in i2c_dw_xfer()
839 ret = i2c_dw_wait_bus_not_busy(dev); in i2c_dw_xfer()
844 i2c_dw_xfer_init(dev); in i2c_dw_xfer()
847 ret = i2c_dw_wait_transfer(dev); in i2c_dw_xfer()
849 dev_err(dev->dev, "controller timed out\n"); in i2c_dw_xfer()
851 i2c_recover_bus(&dev->adapter); in i2c_dw_xfer()
852 i2c_dw_init_master(dev); in i2c_dw_xfer()
863 if (i2c_dw_is_controller_active(dev)) in i2c_dw_xfer()
864 dev_err(dev->dev, "controller active\n"); in i2c_dw_xfer()
874 __i2c_dw_disable_nowait(dev); in i2c_dw_xfer()
876 if (dev->msg_err) { in i2c_dw_xfer()
877 ret = dev->msg_err; in i2c_dw_xfer()
882 if (likely(!dev->cmd_err && !dev->status)) { in i2c_dw_xfer()
888 if (dev->cmd_err == DW_IC_ERR_TX_ABRT) { in i2c_dw_xfer()
889 ret = i2c_dw_handle_tx_abort(dev); in i2c_dw_xfer()
893 if (dev->status) in i2c_dw_xfer()
894 dev_err(dev->dev, in i2c_dw_xfer()
900 i2c_dw_release_lock(dev); in i2c_dw_xfer()
903 pm_runtime_mark_last_busy(dev->dev); in i2c_dw_xfer()
904 pm_runtime_put_autosuspend(dev->dev); in i2c_dw_xfer()
918 void i2c_dw_configure_master(struct dw_i2c_dev *dev) in i2c_dw_configure_master() argument
920 struct i2c_timings *t = &dev->timings; in i2c_dw_configure_master()
922 dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY; in i2c_dw_configure_master()
924 dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | in i2c_dw_configure_master()
927 dev->mode = DW_IC_MASTER; in i2c_dw_configure_master()
931 dev->master_cfg |= DW_IC_CON_SPEED_STD; in i2c_dw_configure_master()
934 dev->master_cfg |= DW_IC_CON_SPEED_HIGH; in i2c_dw_configure_master()
937 dev->master_cfg |= DW_IC_CON_SPEED_FAST; in i2c_dw_configure_master()
944 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_prepare_recovery() local
946 i2c_dw_disable(dev); in i2c_dw_prepare_recovery()
947 reset_control_assert(dev->rst); in i2c_dw_prepare_recovery()
948 i2c_dw_prepare_clk(dev, false); in i2c_dw_prepare_recovery()
953 struct dw_i2c_dev *dev = i2c_get_adapdata(adap); in i2c_dw_unprepare_recovery() local
955 i2c_dw_prepare_clk(dev, true); in i2c_dw_unprepare_recovery()
956 reset_control_deassert(dev->rst); in i2c_dw_unprepare_recovery()
957 i2c_dw_init_master(dev); in i2c_dw_unprepare_recovery()
960 static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev) in i2c_dw_init_recovery_info() argument
962 struct i2c_bus_recovery_info *rinfo = &dev->rinfo; in i2c_dw_init_recovery_info()
963 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_init_recovery_info()
966 gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH); in i2c_dw_init_recovery_info()
972 gpio = devm_gpiod_get_optional(dev->dev, "sda", GPIOD_IN); in i2c_dw_init_recovery_info()
977 rinfo->pinctrl = devm_pinctrl_get(dev->dev); in i2c_dw_init_recovery_info()
983 dev_err(dev->dev, "getting pinctrl info failed: bus recovery might not work\n"); in i2c_dw_init_recovery_info()
985 dev_dbg(dev->dev, "pinctrl is disabled, bus recovery might not work\n"); in i2c_dw_init_recovery_info()
993 dev_info(dev->dev, "running with GPIO recovery mode! scl%s", in i2c_dw_init_recovery_info()
999 int i2c_dw_probe_master(struct dw_i2c_dev *dev) in i2c_dw_probe_master() argument
1001 struct i2c_adapter *adap = &dev->adapter; in i2c_dw_probe_master()
1006 init_completion(&dev->cmd_complete); in i2c_dw_probe_master()
1008 dev->init = i2c_dw_init_master; in i2c_dw_probe_master()
1010 ret = i2c_dw_init_regmap(dev); in i2c_dw_probe_master()
1014 ret = i2c_dw_set_timings_master(dev); in i2c_dw_probe_master()
1018 ret = i2c_dw_set_fifo_size(dev); in i2c_dw_probe_master()
1023 ret = i2c_dw_acquire_lock(dev); in i2c_dw_probe_master()
1033 ret = regmap_read(dev->map, DW_IC_CON, &ic_con); in i2c_dw_probe_master()
1034 i2c_dw_release_lock(dev); in i2c_dw_probe_master()
1039 dev->master_cfg |= DW_IC_CON_BUS_CLEAR_CTRL; in i2c_dw_probe_master()
1041 ret = dev->init(dev); in i2c_dw_probe_master()
1050 adap->dev.parent = dev->dev; in i2c_dw_probe_master()
1051 i2c_set_adapdata(adap, dev); in i2c_dw_probe_master()
1053 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) { in i2c_dw_probe_master()
1059 ret = i2c_dw_acquire_lock(dev); in i2c_dw_probe_master()
1063 __i2c_dw_write_intr_mask(dev, 0); in i2c_dw_probe_master()
1064 i2c_dw_release_lock(dev); in i2c_dw_probe_master()
1066 if (!(dev->flags & ACCESS_POLLING)) { in i2c_dw_probe_master()
1067 ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, in i2c_dw_probe_master()
1068 irq_flags, dev_name(dev->dev), dev); in i2c_dw_probe_master()
1070 dev_err(dev->dev, "failure requesting irq %i: %d\n", in i2c_dw_probe_master()
1071 dev->irq, ret); in i2c_dw_probe_master()
1076 ret = i2c_dw_init_recovery_info(dev); in i2c_dw_probe_master()
1086 pm_runtime_get_noresume(dev->dev); in i2c_dw_probe_master()
1089 dev_err(dev->dev, "failure adding adapter: %d\n", ret); in i2c_dw_probe_master()
1090 pm_runtime_put_noidle(dev->dev); in i2c_dw_probe_master()