77 	struct dw_i2c_dev *dev = context;  in dw_reg_read()  local
79 	*val = readl(dev->base + reg);  in dw_reg_read()
86 	struct dw_i2c_dev *dev = context;  in dw_reg_write()  local
88 	writel(val, dev->base + reg);  in dw_reg_write()
95 	struct dw_i2c_dev *dev = context;  in dw_reg_read_swab()  local
97 	*val = swab32(readl(dev->base + reg));  in dw_reg_read_swab()
104 	struct dw_i2c_dev *dev = context;  in dw_reg_write_swab()  local
106 	writel(swab32(val), dev->base + reg);  in dw_reg_write_swab()
113 	struct dw_i2c_dev *dev = context;  in dw_reg_read_word()  local
115 	*val = readw(dev->base + reg) |  in dw_reg_read_word()
116 		(readw(dev->base + reg + DW_IC_REG_STEP_BYTES) << DW_IC_REG_WORD_SHIFT);  in dw_reg_read_word()
123 	struct dw_i2c_dev *dev = context;  in dw_reg_write_word()  local
125 	writew(val, dev->base + reg);  in dw_reg_write_word()
126 	writew(val >> DW_IC_REG_WORD_SHIFT, dev->base + reg + DW_IC_REG_STEP_BYTES);  in dw_reg_write_word()
141 static int i2c_dw_init_regmap(struct dw_i2c_dev *dev)  in i2c_dw_init_regmap()  argument
159 	if (dev->map)  in i2c_dw_init_regmap()
162 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_init_regmap()
166 	reg = readl(dev->base + DW_IC_COMP_TYPE);  in i2c_dw_init_regmap()
167 	i2c_dw_release_lock(dev);  in i2c_dw_init_regmap()
169 	if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU)  in i2c_dw_init_regmap()
179 		dev_err(dev->dev,  in i2c_dw_init_regmap()
190 	dev->map = devm_regmap_init(dev->dev, NULL, dev, &map_cfg);  in i2c_dw_init_regmap()
191 	if (IS_ERR(dev->map)) {  in i2c_dw_init_regmap()
192 		dev_err(dev->dev, "Failed to init the registers map\n");  in i2c_dw_init_regmap()
193 		return PTR_ERR(dev->map);  in i2c_dw_init_regmap()
206 static int i2c_dw_validate_speed(struct dw_i2c_dev *dev)  in i2c_dw_validate_speed()  argument
208 	struct i2c_timings *t = &dev->timings;  in i2c_dw_validate_speed()
220 	dev_err(dev->dev,  in i2c_dw_validate_speed()
235 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)  in mscc_twi_set_sda_hold_time()  argument
237 	writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,  in mscc_twi_set_sda_hold_time()
238 	       dev->ext + MSCC_ICPU_CFG_TWI_DELAY);  in mscc_twi_set_sda_hold_time()
246 	struct dw_i2c_dev *dev = dev_get_drvdata(device);  in i2c_dw_of_configure()  local
248 	if (device_is_compatible(dev->dev, "mscc,ocelot-i2c")) {  in i2c_dw_of_configure()
249 		dev->ext = devm_platform_ioremap_resource(pdev, 1);  in i2c_dw_of_configure()
250 		if (!IS_ERR(dev->ext))  in i2c_dw_of_configure()
251 			dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;  in i2c_dw_of_configure()
308 	struct dw_i2c_dev *dev = dev_get_drvdata(device);  in i2c_dw_acpi_configure()  local
309 	struct i2c_timings *t = &dev->timings;  in i2c_dw_acpi_configure()
316 	i2c_dw_acpi_params(device, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);  in i2c_dw_acpi_configure()
317 	i2c_dw_acpi_params(device, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);  in i2c_dw_acpi_configure()
318 	i2c_dw_acpi_params(device, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);  in i2c_dw_acpi_configure()
319 	i2c_dw_acpi_params(device, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);  in i2c_dw_acpi_configure()
323 		dev->sda_hold_time = ss_ht;  in i2c_dw_acpi_configure()
326 		dev->sda_hold_time = fp_ht;  in i2c_dw_acpi_configure()
329 		dev->sda_hold_time = hs_ht;  in i2c_dw_acpi_configure()
333 		dev->sda_hold_time = fs_ht;  in i2c_dw_acpi_configure()
364 static void i2c_dw_configure_mode(struct dw_i2c_dev *dev, int mode)  in i2c_dw_configure_mode()  argument
368 		regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2);  in i2c_dw_configure_mode()
369 		regmap_write(dev->map, DW_IC_RX_TL, 0);  in i2c_dw_configure_mode()
370 		regmap_write(dev->map, DW_IC_CON, dev->master_cfg);  in i2c_dw_configure_mode()
373 		dev->status = 0;  in i2c_dw_configure_mode()
374 		regmap_write(dev->map, DW_IC_TX_TL, 0);  in i2c_dw_configure_mode()
375 		regmap_write(dev->map, DW_IC_RX_TL, 0);  in i2c_dw_configure_mode()
376 		regmap_write(dev->map, DW_IC_CON, dev->slave_cfg);  in i2c_dw_configure_mode()
377 		regmap_write(dev->map, DW_IC_SAR, dev->slave->addr);  in i2c_dw_configure_mode()
378 		regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK);  in i2c_dw_configure_mode()
379 		__i2c_dw_enable(dev);  in i2c_dw_configure_mode()
387 static void i2c_dw_write_timings(struct dw_i2c_dev *dev)  in i2c_dw_write_timings()  argument
390 	regmap_write(dev->map, DW_IC_SS_SCL_HCNT, dev->ss_hcnt);  in i2c_dw_write_timings()
391 	regmap_write(dev->map, DW_IC_SS_SCL_LCNT, dev->ss_lcnt);  in i2c_dw_write_timings()
394 	regmap_write(dev->map, DW_IC_FS_SCL_HCNT, dev->fs_hcnt);  in i2c_dw_write_timings()
395 	regmap_write(dev->map, DW_IC_FS_SCL_LCNT, dev->fs_lcnt);  in i2c_dw_write_timings()
398 	regmap_write(dev->map, DW_IC_HS_SCL_HCNT, dev->hs_hcnt);  in i2c_dw_write_timings()
399 	regmap_write(dev->map, DW_IC_HS_SCL_LCNT, dev->hs_lcnt);  in i2c_dw_write_timings()
416 void i2c_dw_set_mode(struct dw_i2c_dev *dev, int mode)  in i2c_dw_set_mode()  argument
418 	if (mode == DW_IC_SLAVE && !dev->slave)  in i2c_dw_set_mode()
420 	if (dev->mode == mode)  in i2c_dw_set_mode()
423 	i2c_dw_configure_mode(dev, mode);  in i2c_dw_set_mode()
424 	dev->mode = mode;  in i2c_dw_set_mode()
435 int i2c_dw_init(struct dw_i2c_dev *dev)  in i2c_dw_init()  argument
439 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_init()
444 	__i2c_dw_disable(dev);  in i2c_dw_init()
451 	regmap_write(dev->map, DW_IC_SMBUS_INTR_MASK, 0);  in i2c_dw_init()
453 	i2c_dw_write_timings(dev);  in i2c_dw_init()
456 	if (dev->sda_hold_time)  in i2c_dw_init()
457 		regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time);  in i2c_dw_init()
459 	i2c_dw_configure_mode(dev, dev->mode);  in i2c_dw_init()
461 	i2c_dw_release_lock(dev);  in i2c_dw_init()
467 static void i2c_dw_adjust_bus_speed(struct dw_i2c_dev *dev)  in i2c_dw_adjust_bus_speed()  argument
469 	u32 acpi_speed = i2c_dw_acpi_round_bus_speed(dev->dev);  in i2c_dw_adjust_bus_speed()
470 	struct i2c_timings *t = &dev->timings;  in i2c_dw_adjust_bus_speed()
484 int i2c_dw_fw_parse_and_configure(struct dw_i2c_dev *dev)  in i2c_dw_fw_parse_and_configure()  argument
486 	struct i2c_timings *t = &dev->timings;  in i2c_dw_fw_parse_and_configure()
487 	struct device *device = dev->dev;  in i2c_dw_fw_parse_and_configure()
492 	if (device_property_read_u32(device, "snps,bus-capacitance-pf", &dev->bus_capacitance_pF))  in i2c_dw_fw_parse_and_configure()
493 		dev->bus_capacitance_pF = DW_IC_DEFAULT_BUS_CAPACITANCE_pF;  in i2c_dw_fw_parse_and_configure()
495 	dev->clk_freq_optimized = device_property_read_bool(device, "snps,clk-freq-optimized");  in i2c_dw_fw_parse_and_configure()
499 		dev->emptyfifo_hold_master = false;  in i2c_dw_fw_parse_and_configure()
501 		dev->emptyfifo_hold_master = true;  in i2c_dw_fw_parse_and_configure()
503 	i2c_dw_adjust_bus_speed(dev);  in i2c_dw_fw_parse_and_configure()
510 	return i2c_dw_validate_speed(dev);  in i2c_dw_fw_parse_and_configure()
514 static u32 i2c_dw_read_scl_reg(struct dw_i2c_dev *dev, u32 reg)  in i2c_dw_read_scl_reg()  argument
519 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_read_scl_reg()
523 	ret = regmap_read(dev->map, reg, &val);  in i2c_dw_read_scl_reg()
524 	i2c_dw_release_lock(dev);  in i2c_dw_read_scl_reg()
529 u32 i2c_dw_scl_hcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk,  in i2c_dw_scl_hcnt()  argument
533 		return i2c_dw_read_scl_reg(dev, reg);  in i2c_dw_scl_hcnt()
552 u32 i2c_dw_scl_lcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk,  in i2c_dw_scl_lcnt()  argument
556 		return i2c_dw_read_scl_reg(dev, reg);  in i2c_dw_scl_lcnt()
572 static int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev)  in i2c_dw_set_sda_hold()  argument
577 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_set_sda_hold()
582 	ret = regmap_read(dev->map, DW_IC_COMP_VERSION, &reg);  in i2c_dw_set_sda_hold()
587 		if (!dev->sda_hold_time) {  in i2c_dw_set_sda_hold()
589 			ret = regmap_read(dev->map, DW_IC_SDA_HOLD,  in i2c_dw_set_sda_hold()
590 					  &dev->sda_hold_time);  in i2c_dw_set_sda_hold()
602 		if (!(dev->sda_hold_time & DW_IC_SDA_HOLD_RX_MASK))  in i2c_dw_set_sda_hold()
603 			dev->sda_hold_time |= 1 << DW_IC_SDA_HOLD_RX_SHIFT;  in i2c_dw_set_sda_hold()
605 		dev_dbg(dev->dev, "SDA Hold Time TX:RX = %d:%d\n",  in i2c_dw_set_sda_hold()
606 			dev->sda_hold_time & ~(u32)DW_IC_SDA_HOLD_RX_MASK,  in i2c_dw_set_sda_hold()
607 			dev->sda_hold_time >> DW_IC_SDA_HOLD_RX_SHIFT);  in i2c_dw_set_sda_hold()
608 	} else if (dev->set_sda_hold_time) {  in i2c_dw_set_sda_hold()
609 		dev->set_sda_hold_time(dev);  in i2c_dw_set_sda_hold()
610 	} else if (dev->sda_hold_time) {  in i2c_dw_set_sda_hold()
611 		dev_warn(dev->dev,  in i2c_dw_set_sda_hold()
613 		dev->sda_hold_time = 0;  in i2c_dw_set_sda_hold()
617 	i2c_dw_release_lock(dev);  in i2c_dw_set_sda_hold()
622 void __i2c_dw_disable(struct dw_i2c_dev *dev)  in __i2c_dw_disable()  argument
624 	struct i2c_timings *t = &dev->timings;  in __i2c_dw_disable()
632 	regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_intr_stats);  in __i2c_dw_disable()
633 	regmap_read(dev->map, DW_IC_STATUS, &ic_stats);  in __i2c_dw_disable()
634 	regmap_read(dev->map, DW_IC_ENABLE, &enable);  in __i2c_dw_disable()
643 	if (dev->mode == DW_IC_SLAVE && (ic_stats & DW_IC_STATUS_SLAVE_ACTIVITY))  in __i2c_dw_disable()
648 			regmap_write(dev->map, DW_IC_ENABLE, DW_IC_ENABLE_ENABLE);  in __i2c_dw_disable()
660 		regmap_write(dev->map, DW_IC_ENABLE, enable | DW_IC_ENABLE_ABORT);  in __i2c_dw_disable()
661 		ret = regmap_read_poll_timeout(dev->map, DW_IC_ENABLE, enable,  in __i2c_dw_disable()
666 			dev_err(dev->dev, "timeout while trying to abort current transfer\n");  in __i2c_dw_disable()
670 		__i2c_dw_disable_nowait(dev);  in __i2c_dw_disable()
675 		regmap_read(dev->map, DW_IC_ENABLE_STATUS, &status);  in __i2c_dw_disable()
687 	dev_warn(dev->dev, "timeout in disabling adapter\n");  in __i2c_dw_disable()
690 u32 i2c_dw_clk_rate(struct dw_i2c_dev *dev)  in i2c_dw_clk_rate()  argument
696 	if (!dev->get_clk_rate_khz) {  in i2c_dw_clk_rate()
697 		dev_dbg_once(dev->dev, "Callback get_clk_rate_khz() is not defined\n");  in i2c_dw_clk_rate()
700 	return dev->get_clk_rate_khz(dev);  in i2c_dw_clk_rate()
703 int i2c_dw_prepare_clk(struct dw_i2c_dev *dev, bool prepare)  in i2c_dw_prepare_clk()  argument
709 		ret = clk_prepare_enable(dev->pclk);  in i2c_dw_prepare_clk()
713 		ret = clk_prepare_enable(dev->clk);  in i2c_dw_prepare_clk()
715 			clk_disable_unprepare(dev->pclk);  in i2c_dw_prepare_clk()
720 	clk_disable_unprepare(dev->clk);  in i2c_dw_prepare_clk()
721 	clk_disable_unprepare(dev->pclk);  in i2c_dw_prepare_clk()
727 int i2c_dw_acquire_lock(struct dw_i2c_dev *dev)  in i2c_dw_acquire_lock()  argument
731 	if (!dev->acquire_lock)  in i2c_dw_acquire_lock()
734 	ret = dev->acquire_lock();  in i2c_dw_acquire_lock()
738 	dev_err(dev->dev, "couldn't acquire bus ownership\n");  in i2c_dw_acquire_lock()
743 void i2c_dw_release_lock(struct dw_i2c_dev *dev)  in i2c_dw_release_lock()  argument
745 	if (dev->release_lock)  in i2c_dw_release_lock()
746 		dev->release_lock();  in i2c_dw_release_lock()
752 int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev)  in i2c_dw_wait_bus_not_busy()  argument
757 	ret = regmap_read_poll_timeout(dev->map, DW_IC_STATUS, status,  in i2c_dw_wait_bus_not_busy()
762 		dev_warn(dev->dev, "timeout waiting for bus ready\n");  in i2c_dw_wait_bus_not_busy()
764 		i2c_recover_bus(&dev->adapter);  in i2c_dw_wait_bus_not_busy()
766 		regmap_read(dev->map, DW_IC_STATUS, &status);  in i2c_dw_wait_bus_not_busy()
774 int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev)  in i2c_dw_handle_tx_abort()  argument
776 	unsigned long abort_source = dev->abort_source;  in i2c_dw_handle_tx_abort()
781 			dev_dbg(dev->dev,  in i2c_dw_handle_tx_abort()
787 		dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]);  in i2c_dw_handle_tx_abort()
797 static int i2c_dw_set_fifo_size(struct dw_i2c_dev *dev)  in i2c_dw_set_fifo_size()  argument
804 	if ((dev->flags & MODEL_MASK) == MODEL_WANGXUN_SP) {  in i2c_dw_set_fifo_size()
805 		dev->tx_fifo_depth = TXGBE_TX_FIFO_DEPTH;  in i2c_dw_set_fifo_size()
806 		dev->rx_fifo_depth = TXGBE_RX_FIFO_DEPTH;  in i2c_dw_set_fifo_size()
815 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_set_fifo_size()
819 	ret = regmap_read(dev->map, DW_IC_COMP_PARAM_1, &param);  in i2c_dw_set_fifo_size()
820 	i2c_dw_release_lock(dev);  in i2c_dw_set_fifo_size()
826 	if (!dev->tx_fifo_depth) {  in i2c_dw_set_fifo_size()
827 		dev->tx_fifo_depth = tx_fifo_depth;  in i2c_dw_set_fifo_size()
828 		dev->rx_fifo_depth = rx_fifo_depth;  in i2c_dw_set_fifo_size()
830 		dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,  in i2c_dw_set_fifo_size()
832 		dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,  in i2c_dw_set_fifo_size()
841 	struct dw_i2c_dev *dev = i2c_get_adapdata(adap);  in i2c_dw_func()  local
843 	return dev->functionality;  in i2c_dw_func()
846 void i2c_dw_disable(struct dw_i2c_dev *dev)  in i2c_dw_disable()  argument
851 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_disable()
856 	__i2c_dw_disable(dev);  in i2c_dw_disable()
859 	__i2c_dw_write_intr_mask(dev, 0);  in i2c_dw_disable()
860 	regmap_read(dev->map, DW_IC_CLR_INTR, &dummy);  in i2c_dw_disable()
862 	i2c_dw_release_lock(dev);  in i2c_dw_disable()
868 	struct dw_i2c_dev *dev = dev_id;  in i2c_dw_isr()  local
870 	if (dev->mode == DW_IC_SLAVE)  in i2c_dw_isr()
871 		return i2c_dw_isr_slave(dev);  in i2c_dw_isr()
873 	return i2c_dw_isr_master(dev);  in i2c_dw_isr()
889 int i2c_dw_probe(struct dw_i2c_dev *dev)  in i2c_dw_probe()  argument
891 	struct i2c_adapter *adap = &dev->adapter;  in i2c_dw_probe()
895 	device_set_node(&dev->adapter.dev, dev_fwnode(dev->dev));  in i2c_dw_probe()
897 	ret = i2c_dw_init_regmap(dev);  in i2c_dw_probe()
901 	ret = i2c_dw_set_sda_hold(dev);  in i2c_dw_probe()
905 	ret = i2c_dw_set_fifo_size(dev);  in i2c_dw_probe()
909 	ret = i2c_dw_probe_master(dev);  in i2c_dw_probe()
913 	ret = i2c_dw_init(dev);  in i2c_dw_probe()
923 	adap->dev.parent = dev->dev;  in i2c_dw_probe()
924 	i2c_set_adapdata(adap, dev);  in i2c_dw_probe()
930 	if (dev->mode == DW_IC_SLAVE)  in i2c_dw_probe()
932 	else if (dev->flags & ACCESS_NO_IRQ_SUSPEND)  in i2c_dw_probe()
948 	if (!dev->emptyfifo_hold_master)  in i2c_dw_probe()
951 	ret = i2c_dw_acquire_lock(dev);  in i2c_dw_probe()
955 	__i2c_dw_write_intr_mask(dev, 0);  in i2c_dw_probe()
956 	i2c_dw_release_lock(dev);  in i2c_dw_probe()
958 	if (!(dev->flags & ACCESS_POLLING)) {  in i2c_dw_probe()
959 		ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr,  in i2c_dw_probe()
960 				       irq_flags, dev_name(dev->dev), dev);  in i2c_dw_probe()
971 	PM_RUNTIME_ACQUIRE(dev->dev, pm);  in i2c_dw_probe()
993 	struct dw_i2c_dev *dev = dev_get_drvdata(device);  in i2c_dw_runtime_suspend()  local
995 	if (dev->shared_with_punit)  in i2c_dw_runtime_suspend()
998 	i2c_dw_disable(dev);  in i2c_dw_runtime_suspend()
999 	i2c_dw_prepare_clk(dev, false);  in i2c_dw_runtime_suspend()
1006 	struct dw_i2c_dev *dev = dev_get_drvdata(device);  in i2c_dw_suspend()  local
1008 	i2c_mark_adapter_suspended(&dev->adapter);  in i2c_dw_suspend()
1015 	struct dw_i2c_dev *dev = dev_get_drvdata(device);  in i2c_dw_runtime_resume()  local
1017 	if (!dev->shared_with_punit)  in i2c_dw_runtime_resume()
1018 		i2c_dw_prepare_clk(dev, true);  in i2c_dw_runtime_resume()
1020 	i2c_dw_init(dev);  in i2c_dw_runtime_resume()
1027 	struct dw_i2c_dev *dev = dev_get_drvdata(device);  in i2c_dw_resume()  local
1030 	i2c_mark_adapter_resumed(&dev->adapter);  in i2c_dw_resume()
1041 void i2c_dw_shutdown(struct dw_i2c_dev *dev)  in i2c_dw_shutdown()  argument
1050 	if (dev->mode != DW_IC_SLAVE)  in i2c_dw_shutdown()
1057 	regmap_read(dev->map, DW_IC_CON, &con);  in i2c_dw_shutdown()
1059 	regmap_write(dev->map, DW_IC_CON, con);  in i2c_dw_shutdown()
1061 	i2c_dw_disable(dev);  in i2c_dw_shutdown()