31 #define EDPCSR				0x0A0
32 #define EDCIDSR				0x0A4
33 #define EDVIDSR				0x0A8
34 #define EDPCSR_HI			0x0AC
35 #define EDOSLAR				0x300
36 #define EDPRCR				0x310
37 #define EDPRSR				0x314
38 #define EDDEVID1			0xFC4
39 #define EDDEVID				0xFC8
41 #define EDPCSR_PROHIBITED		0xFFFFFFFF
44 #define EDPCSR_THUMB			BIT(0)
50 #define EDPRCR_CORENPDRQ		BIT(0)
54 #define EDPRSR_PU			BIT(0)
61 #define EDVIDSR_VMID			GENMASK(7, 0)
69  * 0b0000 - Sample offset applies based on the instruction state, we
71  * 0b0001 - No offset applies.
72  * 0b0010 - No offset applies, but do not use in AArch32 mode
75 #define EDDEVID1_PCSR_OFFSET_MASK	GENMASK(3, 0)
76 #define EDDEVID1_PCSR_OFFSET_INS_SET	(0x0)
77 #define EDDEVID1_PCSR_NO_OFFSET_DIS_AARCH32	(0x2)
80 #define EDDEVID_PCSAMPLE_MODE		GENMASK(3, 0)
81 #define EDDEVID_IMPL_EDPCSR		(0x1)
82 #define EDDEVID_IMPL_EDPCSR_EDCIDSR	(0x2)
83 #define EDDEVID_IMPL_FULL		(0x3)
118 	writel_relaxed(0x0, drvdata->base + EDOSLAR);  in debug_os_unlock()
220 	 * profiling is prohibited, EDPCSR reads as 0xFFFFFFFF;  in debug_read_regs()
257 	unsigned long arm_inst_offset = 0, thumb_inst_offset = 0;  in debug_adjust_pc()
322 				 "EL2" : "EL1/0"),  in debug_dump_regs()
361 		 * back EDDEVID1.PCSROffset == 0x2, then this means the debug  in debug_init_arch_data()
366 			((IS_ENABLED(CONFIG_64BIT) && pcsr_offset != 0) ||  in debug_init_arch_data()
418 	int cpu, ret = 0;  in debug_enable_func()
433 		if (ret < 0)  in debug_enable_func()
439 	return 0;  in debug_enable_func()
457 	int cpu, ret, err = 0;  in debug_disable_func()
470 		if (ret < 0)  in debug_disable_func()
549 	return 0;  in debug_func_init()
570 	if (drvdata->cpu < 0)  in __debug_probe()
617 	return 0;  in __debug_probe()
662 		.devarch	= 0x47706a15,
663 		.devarch_mask	= 0xfff0ffff,
664 		.devtype	= 0x00000015,
669 	CS_AMBA_ID(0x000bbd03),				/* Cortex-A53 */
670 	CS_AMBA_ID(0x000bbd07),				/* Cortex-A57 */
671 	CS_AMBA_ID(0x000bbd08),				/* Cortex-A72 */
672 	CS_AMBA_ID(0x000bbd09),				/* Cortex-A73 */
673 	CS_AMBA_UCI_ID(0x000f0205, uci_id_debug),	/* Qualcomm Kryo */
674 	CS_AMBA_UCI_ID(0x000f0211, uci_id_debug),	/* Qualcomm Kryo */
692 	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);  in debug_platform_probe()
694 	int ret = 0;  in debug_platform_probe()
734 	{"ARMHC503", 0, 0, 0}, /* ARM CoreSight Debug */
747 	return 0;  in debug_runtime_suspend()
756 	return 0;  in debug_runtime_resume()