Lines Matching +full:coresight +full:- +full:tpiu
1 # SPDX-License-Identifier: GPL-2.0-only
3 # Coresight configuration
5 menuconfig CORESIGHT config
6 tristate "CoreSight Tracing Support"
13 This framework provides a kernel interface for the CoreSight debug
15 a topological view of the CoreSight components based on a DT
20 module will be called coresight.
22 if CORESIGHT
24 tristate "CoreSight Link and Sink drivers"
26 This enables support for CoreSight link and sink drivers that are
32 modules will be called coresight-funnel and coresight-replicator.
35 tristate "Coresight generic TMC driver"
41 trace router - ETR) or sink (embedded trace FIFO). The driver
46 module will be called coresight-tmc.
49 tristate "Coresight Address Translation Unit (CATU) driver"
52 Enable support for the Coresight Address Translation Unit (CATU).
54 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
56 by looking up the provided table. CATU can also be used in pass-through
60 module will be called coresight-catu.
63 tristate "Coresight generic TPIU driver"
67 responsible for bridging the gap between the on-chip coresight
68 components and a trace for bridging the gap between the on-chip
69 coresight components and a trace port collection engine, typically
71 the on-board coresight memory can handle.
74 module will be called coresight-tpiu.
77 tristate "Coresight ETBv1.0 driver"
85 module will be called coresight-etb10.
88 tristate "CoreSight Embedded Trace Macrocell 3.x driver"
98 module will be called coresight-etm3x.
101 tristate "CoreSight ETMv4.x / ETE driver"
106 This driver provides support for the CoreSight Embedded Trace Macrocell
112 module will be called coresight-etm4x.
118 This control provides implementation define control for CoreSight
123 tristate "CoreSight System Trace Macrocell driver"
134 module will be called coresight-stm.
137 tristate "CoreSight CPU Debug driver"
141 This driver provides support for coresight debugging module. This
142 is primarily used to dump sample-based profiling registers when
147 properly, please refer Documentation/trace/coresight/coresight-cpu-debug.rst
151 module will be called coresight-cpu-debug.
154 bool "Enable CoreSight CPU Debug by default"
157 Say Y here to enable the CoreSight Debug panic-debug by default. This
167 tristate "CoreSight Cross Trigger Interface (CTI) driver"
170 This driver provides support for CoreSight CTI and CTM components.
171 These provide hardware triggering events between CoreSight trace
179 module will be called coresight-cti.
182 bool "Access CTI CoreSight Integration Registers"
185 This option adds support for the CoreSight integration registers on
200 requires it to be plugged in as a coresight sink device.
203 called coresight-trbe.
211 SMB is responsible for receiving the trace data from Coresight ETM devices
215 called ultrasoc-smb.
218 tristate "CoreSight Trace, Profiling & Diagnostics Monitor driver"
227 called coresight-tpdm.
230 tristate "CoreSight Trace, Profiling & Diagnostics Aggregator driver"
238 called coresight-tpda.
244 CoreSight sources/sinks that are owned and configured by some
249 called coresight-dummy.