Lines Matching +full:per +full:- +full:bank
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * nct7904.c - driver for Nuvoton NCT7904D.
28 #define VENDOR_ID_REG 0x7A /* Any bank */
30 #define CHIP_ID_REG 0x7B /* Any bank */
32 #define DEVICE_ID_REG 0x7C /* Any bank */
50 #define VT_ADC_CTRL0_REG 0x20 /* Bank 0 */
51 #define VT_ADC_CTRL1_REG 0x21 /* Bank 0 */
52 #define VT_ADC_CTRL2_REG 0x22 /* Bank 0 */
59 #define VSEN1_HV_LL_REG 0x02 /* Bank 1; 2 regs (HV/LV) per sensor */
60 #define VSEN1_LV_LL_REG 0x03 /* Bank 1; 2 regs (HV/LV) per sensor */
61 #define VSEN1_HV_HL_REG 0x00 /* Bank 1; 2 regs (HV/LV) per sensor */
62 #define VSEN1_LV_HL_REG 0x01 /* Bank 1; 2 regs (HV/LV) per sensor */
63 #define SMI_STS1_REG 0xC1 /* Bank 0; SMI Status Register */
64 #define SMI_STS3_REG 0xC3 /* Bank 0; SMI Status Register */
65 #define SMI_STS5_REG 0xC5 /* Bank 0; SMI Status Register */
66 #define SMI_STS7_REG 0xC7 /* Bank 0; SMI Status Register */
67 #define SMI_STS8_REG 0xC8 /* Bank 0; SMI Status Register */
69 #define VSEN1_HV_REG 0x40 /* Bank 0; 2 regs (HV/LV) per sensor */
70 #define TEMP_CH1_HV_REG 0x42 /* Bank 0; same as VSEN2_HV */
71 #define LTD_HV_REG 0x62 /* Bank 0; 2 regs in VSEN range */
72 #define LTD_HV_HL_REG 0x44 /* Bank 1; 1 reg for LTD */
73 #define LTD_LV_HL_REG 0x45 /* Bank 1; 1 reg for LTD */
74 #define LTD_HV_LL_REG 0x46 /* Bank 1; 1 reg for LTD */
75 #define LTD_LV_LL_REG 0x47 /* Bank 1; 1 reg for LTD */
76 #define TEMP_CH1_CH_REG 0x05 /* Bank 1; 1 reg for LTD */
77 #define TEMP_CH1_W_REG 0x06 /* Bank 1; 1 reg for LTD */
78 #define TEMP_CH1_WH_REG 0x07 /* Bank 1; 1 reg for LTD */
79 #define TEMP_CH1_C_REG 0x04 /* Bank 1; 1 reg per sensor */
80 #define DTS_T_CPU1_C_REG 0x90 /* Bank 1; 1 reg per sensor */
81 #define DTS_T_CPU1_CH_REG 0x91 /* Bank 1; 1 reg per sensor */
82 #define DTS_T_CPU1_W_REG 0x92 /* Bank 1; 1 reg per sensor */
83 #define DTS_T_CPU1_WH_REG 0x93 /* Bank 1; 1 reg per sensor */
84 #define FANIN1_HV_REG 0x80 /* Bank 0; 2 regs (HV/LV) per sensor */
85 #define FANIN1_HV_HL_REG 0x60 /* Bank 1; 2 regs (HV/LV) per sensor */
86 #define FANIN1_LV_HL_REG 0x61 /* Bank 1; 2 regs (HV/LV) per sensor */
87 #define T_CPU1_HV_REG 0xA0 /* Bank 0; 2 regs (HV/LV) per sensor */
89 #define PRTS_REG 0x03 /* Bank 2 */
90 #define PFE_REG 0x00 /* Bank 2; PECI Function Enable */
91 #define TSI_CTRL_REG 0x50 /* Bank 2; TSI Control Register */
92 #define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
93 #define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
110 /*The timeout range is 1-255 minutes*/
145 static int nct7904_bank_lock(struct nct7904_data *data, unsigned int bank) in nct7904_bank_lock() argument
149 mutex_lock(&data->bank_lock); in nct7904_bank_lock()
150 if (data->bank_sel == bank) in nct7904_bank_lock()
152 ret = i2c_smbus_write_byte_data(data->client, BANK_SEL_REG, bank); in nct7904_bank_lock()
154 data->bank_sel = bank; in nct7904_bank_lock()
156 data->bank_sel = -1; in nct7904_bank_lock()
162 mutex_unlock(&data->bank_lock); in nct7904_bank_release()
165 /* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */
167 unsigned int bank, unsigned int reg) in nct7904_read_reg() argument
169 struct i2c_client *client = data->client; in nct7904_read_reg()
172 ret = nct7904_bank_lock(data, bank); in nct7904_read_reg()
181 * Read 2-byte register. Returns register in big-endian format or
182 * -ERRNO on error.
185 unsigned int bank, unsigned int reg) in nct7904_read_reg16() argument
187 struct i2c_client *client = data->client; in nct7904_read_reg16()
190 ret = nct7904_bank_lock(data, bank); in nct7904_read_reg16()
205 /* Write 1-byte register. Returns 0 or -ERRNO on error. */
207 unsigned int bank, unsigned int reg, u8 val) in nct7904_write_reg() argument
209 struct i2c_client *client = data->client; in nct7904_write_reg()
212 ret = nct7904_bank_lock(data, bank); in nct7904_write_reg()
257 if (!data->fan_alarm[channel >> 3]) in nct7904_read_fan()
258 data->fan_alarm[channel >> 3] = ret & 0xff; in nct7904_read_fan()
261 data->fan_alarm[channel >> 3] |= (ret & 0xff); in nct7904_read_fan()
262 *val = (data->fan_alarm[channel >> 3] >> (channel & 0x07)) & 1; in nct7904_read_fan()
265 data->fan_alarm[channel >> 3] ^= 1 << (channel & 0x07); in nct7904_read_fan()
268 return -EOPNOTSUPP; in nct7904_read_fan()
279 if (data->fanin_mask & (1 << channel)) in nct7904_fan_is_visible()
283 if (data->fanin_mask & (1 << channel)) in nct7904_fan_is_visible()
349 if (!data->vsen_alarm[index >> 3]) in nct7904_read_in()
350 data->vsen_alarm[index >> 3] = ret & 0xff; in nct7904_read_in()
353 data->vsen_alarm[index >> 3] |= (ret & 0xff); in nct7904_read_in()
354 *val = (data->vsen_alarm[index >> 3] >> (index & 0x07)) & 1; in nct7904_read_in()
357 data->vsen_alarm[index >> 3] ^= 1 << (index & 0x07); in nct7904_read_in()
360 return -EOPNOTSUPP; in nct7904_read_in()
372 if (channel > 0 && (data->vsen_mask & BIT(index))) in nct7904_in_is_visible()
377 if (channel > 0 && (data->vsen_mask & BIT(index))) in nct7904_in_is_visible()
404 T_CPU1_HV_REG + (channel - 5) in nct7904_read_temp()
425 if ((channel - 5) < 4) { in nct7904_read_temp()
428 ((channel - 5) >> 3)); in nct7904_read_temp()
431 *val = (ret >> ((channel - 5) & 0x07)) & 1; in nct7904_read_temp()
435 ((channel - 5) >> 3)); in nct7904_read_temp()
438 *val = (ret >> (((channel - 5) & 0x07) - 4)) in nct7904_read_temp()
445 if ((data->tcpu_mask >> channel) & 0x01) { in nct7904_read_temp()
446 if ((data->temp_mode >> channel) & 0x01) in nct7904_read_temp()
454 if ((data->has_dts >> (channel - 5)) & 0x01) { in nct7904_read_temp()
455 if (data->enable_dts & ENABLE_TSI) in nct7904_read_temp()
485 return -EOPNOTSUPP; in nct7904_read_temp()
495 reg3 + (channel - 5) * 4); in nct7904_read_temp()
513 if (data->tcpu_mask & BIT(channel)) in nct7904_temp_is_visible()
516 if (data->has_dts & BIT(channel - 5)) in nct7904_temp_is_visible()
525 if (data->tcpu_mask & BIT(channel)) in nct7904_temp_is_visible()
528 if (data->has_dts & BIT(channel - 5)) in nct7904_temp_is_visible()
560 return -EOPNOTSUPP; in nct7904_read_pwm()
571 val = clamp_val(val / 1000, -128, 127); in nct7904_write_temp()
595 return -EOPNOTSUPP; in nct7904_write_temp()
604 reg3 + (channel - 5) * 4, val); in nct7904_write_temp()
619 return -EINVAL; in nct7904_write_fan()
632 return -EOPNOTSUPP; in nct7904_write_fan()
691 return -EOPNOTSUPP; in nct7904_write_in()
704 return -EINVAL; in nct7904_write_pwm()
710 (val == 2 && !data->fan_mode[channel])) in nct7904_write_pwm()
711 return -EINVAL; in nct7904_write_pwm()
713 val == 2 ? data->fan_mode[channel] : 0); in nct7904_write_pwm()
716 return -EOPNOTSUPP; in nct7904_write_pwm()
744 return -EOPNOTSUPP; in nct7904_read()
761 return -EOPNOTSUPP; in nct7904_write()
783 /* Return 0 if detection is successful, -ENODEV otherwise */
787 struct i2c_adapter *adapter = client->adapter; in nct7904_detect()
792 return -ENODEV; in nct7904_detect()
799 return -ENODEV; in nct7904_detect()
801 strscpy(info->type, "nct7904", I2C_NAME_SIZE); in nct7904_detect()
947 * Its minimum unit is minutes. And wdt->timeout needs in nct7904_wdt_set_timeout()
949 * to be: wdt->timeout = timeout / 60 * 60. in nct7904_wdt_set_timeout()
952 * So, wdt->timeout must then be set to 60 seconds. in nct7904_wdt_set_timeout()
954 wdt->timeout = timeout / 60 * 60; in nct7904_wdt_set_timeout()
957 wdt->timeout / 60); in nct7904_wdt_set_timeout()
977 ret = nct7904_write_reg(data, BANK_0, WDT_TIMER_REG, wdt->timeout / 60); in nct7904_wdt_ping()
1016 struct device *dev = &client->dev; in nct7904_probe()
1023 return -ENOMEM; in nct7904_probe()
1025 data->client = client; in nct7904_probe()
1026 mutex_init(&data->bank_lock); in nct7904_probe()
1027 data->bank_sel = -1; in nct7904_probe()
1034 data->fanin_mask = (ret >> 8) | ((ret & 0xff) << 8); in nct7904_probe()
1050 data->vsen_mask = mask; in nct7904_probe()
1058 data->tcpu_mask |= 1; /* TR1 */ in nct7904_probe()
1060 data->tcpu_mask |= 2; /* TR2 */ in nct7904_probe()
1062 data->tcpu_mask |= 4; /* TR3 */ in nct7904_probe()
1064 data->tcpu_mask |= 8; /* TR4 */ in nct7904_probe()
1071 data->tcpu_mask |= 0x10; in nct7904_probe()
1073 /* Multi-Function detecting for Volt and TR/TD */ in nct7904_probe()
1078 data->temp_mode = 0; in nct7904_probe()
1083 data->tcpu_mask &= ~bit; in nct7904_probe()
1085 data->temp_mode |= bit; in nct7904_probe()
1086 data->vsen_mask &= ~(0x06 << (i * 2)); in nct7904_probe()
1088 data->vsen_mask &= ~(0x02 << (i * 2)); in nct7904_probe()
1091 data->tcpu_mask &= ~bit; in nct7904_probe()
1092 data->vsen_mask &= ~(0x06 << (i * 2)); in nct7904_probe()
1101 data->enable_dts = 1; /* Enable DTS & PECI */ in nct7904_probe()
1107 data->enable_dts = 0x3; /* Enable DTS & TSI */ in nct7904_probe()
1111 if (data->enable_dts) { in nct7904_probe()
1115 data->has_dts = ret & 0xF; in nct7904_probe()
1116 if (data->enable_dts & ENABLE_TSI) { in nct7904_probe()
1120 data->has_dts |= (ret & 0xF) << 4; in nct7904_probe()
1128 data->fan_mode[i] = ret; in nct7904_probe()
1139 devm_hwmon_device_register_with_info(dev, client->name, data, in nct7904_probe()
1146 data->wdt.ops = &nct7904_wdt_ops; in nct7904_probe()
1147 data->wdt.info = &nct7904_wdt_info; in nct7904_probe()
1149 data->wdt.timeout = WATCHDOG_TIMEOUT * 60; /* Set default timeout */ in nct7904_probe()
1150 data->wdt.min_timeout = MIN_TIMEOUT; in nct7904_probe()
1151 data->wdt.max_timeout = MAX_TIMEOUT; in nct7904_probe()
1152 data->wdt.parent = &client->dev; in nct7904_probe()
1154 watchdog_init_timeout(&data->wdt, timeout * 60, &client->dev); in nct7904_probe()
1155 watchdog_set_nowayout(&data->wdt, nowayout); in nct7904_probe()
1156 watchdog_set_drvdata(&data->wdt, data); in nct7904_probe()
1158 watchdog_stop_on_unregister(&data->wdt); in nct7904_probe()
1160 return devm_watchdog_register_device(dev, &data->wdt); in nct7904_probe()