Lines Matching defs:channel
28 /* The MAX6639 registers, valid channel numbers: 0, 1 */
89 static int max6639_temp_read_input(struct device *dev, int channel, long *temp)
91 u32 regs[2] = { MAX6639_REG_TEMP_EXT(channel), MAX6639_REG_TEMP(channel) };
105 static int max6639_temp_read_fault(struct device *dev, int channel, long *fault)
111 res = regmap_read(data->regmap, MAX6639_REG_TEMP_EXT(channel), &val);
120 static int max6639_temp_read_max(struct device *dev, int channel, long *max)
126 res = regmap_read(data->regmap, MAX6639_REG_THERM_LIMIT(channel), &val);
135 static int max6639_temp_read_crit(struct device *dev, int channel, long *crit)
141 res = regmap_read(data->regmap, MAX6639_REG_ALERT_LIMIT(channel), &val);
150 static int max6639_temp_read_emergency(struct device *dev, int channel, long *emerg)
156 res = regmap_read(data->regmap, MAX6639_REG_OT_LIMIT(channel), &val);
180 static int max6639_temp_set_max(struct max6639_data *data, int channel, long val)
184 res = regmap_write(data->regmap, MAX6639_REG_THERM_LIMIT(channel),
189 static int max6639_temp_set_crit(struct max6639_data *data, int channel, long val)
193 res = regmap_write(data->regmap, MAX6639_REG_ALERT_LIMIT(channel), TEMP_LIMIT_TO_REG(val));
198 static int max6639_temp_set_emergency(struct max6639_data *data, int channel, long val)
202 res = regmap_write(data->regmap, MAX6639_REG_OT_LIMIT(channel), TEMP_LIMIT_TO_REG(val));
207 static int max6639_read_fan(struct device *dev, u32 attr, int channel,
216 res = regmap_read(data->regmap, MAX6639_REG_FAN_CNT(channel), &val);
219 *fan_val = FAN_FROM_REG(val, data->rpm_range[channel]);
225 *fan_val = !!(val & BIT(1 - channel));
228 *fan_val = data->ppr[channel];
235 static int max6639_set_ppr(struct max6639_data *data, int channel, u8 ppr)
238 return regmap_write(data->regmap, MAX6639_REG_FAN_PPR(channel), ppr-- << 6);
241 static int max6639_write_fan(struct device *dev, u32 attr, int channel,
254 err = max6639_set_ppr(data, channel, val);
259 data->ppr[channel] = val;
268 static umode_t max6639_fan_is_visible(const void *_data, u32 attr, int channel)
281 static int max6639_read_pwm(struct device *dev, u32 attr, int channel,
284 u32 regs[2] = { MAX6639_REG_FAN_CONFIG3(channel), MAX6639_REG_GCONFIG };
293 res = regmap_read(data->regmap, MAX6639_REG_TARGTDUTY(channel), &val);
312 static int max6639_write_pwm(struct device *dev, u32 attr, int channel,
323 err = regmap_write(data->regmap, MAX6639_REG_TARGTDUTY(channel),
332 err = regmap_update_bits(data->regmap, MAX6639_REG_FAN_CONFIG3(channel),
353 static umode_t max6639_pwm_is_visible(const void *_data, u32 attr, int channel)
364 static int max6639_read_temp(struct device *dev, u32 attr, int channel,
372 res = max6639_temp_read_input(dev, channel, val);
375 res = max6639_temp_read_fault(dev, channel, val);
378 res = max6639_temp_read_max(dev, channel, val);
381 res = max6639_temp_read_crit(dev, channel, val);
384 res = max6639_temp_read_emergency(dev, channel, val);
390 *val = !!(status & BIT(3 - channel));
396 *val = !!(status & BIT(7 - channel));
402 *val = !!(status & BIT(5 - channel));
409 static int max6639_write_temp(struct device *dev, u32 attr, int channel,
416 return max6639_temp_set_max(data, channel, val);
418 return max6639_temp_set_crit(data, channel, val);
420 return max6639_temp_set_emergency(data, channel, val);
426 static umode_t max6639_temp_is_visible(const void *_data, u32 attr, int channel)
445 u32 attr, int channel, long *val)
449 return max6639_read_fan(dev, attr, channel, val);
451 return max6639_read_pwm(dev, attr, channel, val);
453 return max6639_read_temp(dev, attr, channel, val);
460 u32 attr, int channel, long val)
464 return max6639_write_fan(dev, attr, channel, val);
466 return max6639_write_pwm(dev, attr, channel, val);
468 return max6639_write_temp(dev, attr, channel, val);
476 u32 attr, int channel)
480 return max6639_fan_is_visible(data, attr, channel);
482 return max6639_pwm_is_visible(data, attr, channel);
484 return max6639_temp_is_visible(data, attr, channel);