Lines Matching +full:x +full:- +full:mask +full:-
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * LTC2992 - Dual Wide Range Power Monitor
62 #define LTC2992_POWER(x) (LTC2992_POWER1 + ((x) * 0x32))
63 #define LTC2992_POWER_MAX(x) (LTC2992_POWER1_MAX + ((x) * 0x32))
64 #define LTC2992_POWER_MIN(x) (LTC2992_POWER1_MIN + ((x) * 0x32))
65 #define LTC2992_POWER_MAX_THRESH(x) (LTC2992_POWER1_MAX_THRESH + ((x) * 0x32))
66 #define LTC2992_POWER_MIN_THRESH(x) (LTC2992_POWER1_MIN_THRESH + ((x) * 0x32))
67 #define LTC2992_DSENSE(x) (LTC2992_DSENSE1 + ((x) * 0x32))
68 #define LTC2992_DSENSE_MAX(x) (LTC2992_DSENSE1_MAX + ((x) * 0x32))
69 #define LTC2992_DSENSE_MIN(x) (LTC2992_DSENSE1_MIN + ((x) * 0x32))
70 #define LTC2992_DSENSE_MAX_THRESH(x) (LTC2992_DSENSE1_MAX_THRESH + ((x) * 0x32))
71 #define LTC2992_DSENSE_MIN_THRESH(x) (LTC2992_DSENSE1_MIN_THRESH + ((x) * 0x32))
72 #define LTC2992_SENSE(x) (LTC2992_SENSE1 + ((x) * 0x32))
73 #define LTC2992_SENSE_MAX(x) (LTC2992_SENSE1_MAX + ((x) * 0x32))
74 #define LTC2992_SENSE_MIN(x) (LTC2992_SENSE1_MIN + ((x) * 0x32))
75 #define LTC2992_SENSE_MAX_THRESH(x) (LTC2992_SENSE1_MAX_THRESH + ((x) * 0x32))
76 #define LTC2992_SENSE_MIN_THRESH(x) (LTC2992_SENSE1_MIN_THRESH + ((x) * 0x32))
77 #define LTC2992_POWER_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
78 #define LTC2992_SENSE_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
79 #define LTC2992_DSENSE_FAULT(x) (LTC2992_FAULT1 + ((x) * 0x32))
85 #define LTC2992_POWER_FAULT_MSK(x) (BIT(6) << (x))
86 #define LTC2992_DSENSE_FAULT_MSK(x) (BIT(4) << (x))
87 #define LTC2992_SENSE_FAULT_MSK(x) (BIT(2) << (x))
90 #define LTC2992_GPIO1_FAULT_MSK(x) (BIT(0) << (x))
93 #define LTC2992_GPIO2_FAULT_MSK(x) (BIT(0) << (x))
96 #define LTC2992_GPIO3_FAULT_MSK(x) (BIT(6) << (x))
97 #define LTC2992_GPIO4_FAULT_MSK(x) (BIT(4) << (x))
108 #define LTC2992_GPIO_BIT(x) (LTC2992_GPIO_NR - (x) - 1)
194 ret = regmap_bulk_read(st->regmap, addr, regvals, reg_len);
200 val |= regvals[reg_len - i - 1] << (i * 8);
211 regvals[reg_len - i - 1] = (val >> (i * 8)) & 0xFF;
213 return regmap_bulk_write(st->regmap, addr, regvals, reg_len);
222 mutex_lock(&st->gpio_mutex);
224 mutex_unlock(&st->gpio_mutex);
234 static int ltc2992_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
242 mutex_lock(&st->gpio_mutex);
244 mutex_unlock(&st->gpio_mutex);
251 for_each_set_bit(gpio_nr, mask, LTC2992_GPIO_NR) {
266 mutex_lock(&st->gpio_mutex);
269 mutex_unlock(&st->gpio_mutex);
278 mutex_unlock(&st->gpio_mutex);
283 static int ltc2992_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask,
292 for_each_set_bit(gpio_nr, mask, LTC2992_GPIO_NR) {
300 mutex_lock(&st->gpio_mutex);
307 mutex_unlock(&st->gpio_mutex);
313 const char *name = dev_name(&st->client->dev);
322 mutex_init(&st->gpio_mutex);
324 for (i = 0; i < ARRAY_SIZE(st->gpio_names); i++) {
325 gpio_name = devm_kasprintf(&st->client->dev, GFP_KERNEL, "ltc2992-%x-%s",
326 st->client->addr, ltc2992_gpio_names[i]);
328 return -ENOMEM;
330 st->gpio_names[i] = gpio_name;
333 st->gc.label = name;
334 st->gc.parent = &st->client->dev;
335 st->gc.owner = THIS_MODULE;
336 st->gc.can_sleep = true;
337 st->gc.base = -1;
338 st->gc.names = st->gpio_names;
339 st->gc.ngpio = ARRAY_SIZE(st->gpio_names);
340 st->gc.get = ltc2992_gpio_get;
341 st->gc.get_multiple = ltc2992_gpio_get_multiple;
342 st->gc.set_rv = ltc2992_gpio_set;
343 st->gc.set_multiple_rv = ltc2992_gpio_set_multiple;
345 ret = devm_gpiochip_add_data(&st->client->dev, &st->gc, st);
347 dev_err(&st->client->dev, "GPIO registering failed (%d)\n", ret);
384 if (st->r_sense_uohm[channel])
389 if (st->r_sense_uohm[channel])
401 if (st->r_sense_uohm[channel])
406 if (st->r_sense_uohm[channel])
443 u32 mask;
446 mask = ltc2992_gpio_addr_map[nr_gpio].max_alarm_msk;
448 mask = ltc2992_gpio_addr_map[nr_gpio].min_alarm_msk;
454 *val = !!(reg_val & mask);
455 reg_val &= ~mask;
485 return -EOPNOTSUPP;
494 u32 mask;
497 mask = LTC2992_SENSE_FAULT_MSK(1);
499 mask = LTC2992_SENSE_FAULT_MSK(0);
505 *val = !!(reg_val & mask);
506 reg_val &= ~mask;
517 return ltc2992_read_gpios_in(dev, attr, channel - 2, val);
539 return -EOPNOTSUPP;
554 *val = DIV_ROUND_CLOSEST(reg_val * LTC2992_IADC_NANOV_LSB, st->r_sense_uohm[channel]);
563 reg_val = DIV_ROUND_CLOSEST(val * st->r_sense_uohm[channel], LTC2992_IADC_NANOV_LSB);
572 u32 mask;
575 mask = LTC2992_DSENSE_FAULT_MSK(1);
577 mask = LTC2992_DSENSE_FAULT_MSK(0);
583 *val = !!(reg_val & mask);
585 reg_val &= ~mask;
614 return -EOPNOTSUPP;
629 st->r_sense_uohm[channel] * 1000);
638 reg_val = mul_u64_u32_div(val, st->r_sense_uohm[channel] * 1000,
647 u32 mask;
650 mask = LTC2992_POWER_FAULT_MSK(1);
652 mask = LTC2992_POWER_FAULT_MSK(0);
658 *val = !!(reg_val & mask);
659 reg_val &= ~mask;
689 return -EOPNOTSUPP;
706 return -EOPNOTSUPP;
723 return -EOPNOTSUPP;
742 return -EOPNOTSUPP;
754 return ltc2992_write_gpios_in(dev, attr, channel - 2, val);
764 return -EOPNOTSUPP;
783 return -EOPNOTSUPP;
795 return regmap_update_bits(st->regmap, LTC2992_CTRLB, LTC2992_RESET_HISTORY,
798 return -EOPNOTSUPP;
815 return -EOPNOTSUPP;
871 device_for_each_child_node_scoped(&st->client->dev, child) {
877 return -EINVAL;
879 ret = fwnode_property_read_u32(child, "shunt-resistor-micro-ohms", &val);
882 return dev_err_probe(&st->client->dev, -EINVAL,
885 st->r_sense_uohm[addr] = val;
898 st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
900 return -ENOMEM;
902 st->client = client;
903 st->regmap = devm_regmap_init_i2c(client, <c2992_regmap_config);
904 if (IS_ERR(st->regmap))
905 return PTR_ERR(st->regmap);
915 hwmon_dev = devm_hwmon_device_register_with_info(&client->dev, client->name, st,