Lines Matching full:prg

89 	struct ipu_prg *prg;  in ipu_prg_lookup_by_phandle()  local
92 list_for_each_entry(prg, &ipu_prg_list, list) { in ipu_prg_lookup_by_phandle()
93 if (prg_node == prg->dev->of_node) { in ipu_prg_lookup_by_phandle()
95 device_link_add(dev, prg->dev, in ipu_prg_lookup_by_phandle()
97 prg->id = ipu_id; in ipu_prg_lookup_by_phandle()
99 return prg; in ipu_prg_lookup_by_phandle()
145 struct ipu_prg *prg = ipu->prg_priv; in ipu_prg_enable() local
147 if (!prg) in ipu_prg_enable()
150 return pm_runtime_get_sync(prg->dev); in ipu_prg_enable()
156 struct ipu_prg *prg = ipu->prg_priv; in ipu_prg_disable() local
158 if (!prg) in ipu_prg_disable()
161 pm_runtime_put(prg->dev); in ipu_prg_disable()
173 * This isn't clearly documented in the RM, but IPU to PRG channel in ipu_prg_ipu_to_prg_chan()
189 static int ipu_prg_get_pre(struct ipu_prg *prg, int prg_chan) in ipu_prg_get_pre() argument
195 ret = ipu_pre_get(prg->pres[0]); in ipu_prg_get_pre()
198 prg->chan[prg_chan].used_pre = 0; in ipu_prg_get_pre()
203 ret = ipu_pre_get(prg->pres[i]); in ipu_prg_get_pre()
208 prg->chan[prg_chan].used_pre = i; in ipu_prg_get_pre()
210 /* configure the PRE to PRG channel mux */ in ipu_prg_get_pre()
212 mux = (prg->id << 1) | (prg_chan - 1); in ipu_prg_get_pre()
213 regmap_update_bits(prg->iomuxc_gpr, IOMUXC_GPR5, in ipu_prg_get_pre()
218 regmap_read(prg->iomuxc_gpr, IOMUXC_GPR5, &val); in ipu_prg_get_pre()
220 regmap_update_bits(prg->iomuxc_gpr, IOMUXC_GPR5, in ipu_prg_get_pre()
230 dev_err(prg->dev, "could not get PRE for PRG chan %d", prg_chan); in ipu_prg_get_pre()
234 static void ipu_prg_put_pre(struct ipu_prg *prg, int prg_chan) in ipu_prg_put_pre() argument
236 struct ipu_prg_channel *chan = &prg->chan[prg_chan]; in ipu_prg_put_pre()
238 ipu_pre_put(prg->pres[chan->used_pre]); in ipu_prg_put_pre()
245 struct ipu_prg *prg = ipu_chan->ipu->prg_priv; in ipu_prg_channel_disable() local
252 chan = &prg->chan[prg_chan]; in ipu_prg_channel_disable()
256 pm_runtime_get_sync(prg->dev); in ipu_prg_channel_disable()
258 val = readl(prg->regs + IPU_PRG_CTL); in ipu_prg_channel_disable()
260 writel(val, prg->regs + IPU_PRG_CTL); in ipu_prg_channel_disable()
263 writel(val, prg->regs + IPU_PRG_REG_UPDATE); in ipu_prg_channel_disable()
265 pm_runtime_put(prg->dev); in ipu_prg_channel_disable()
267 ipu_prg_put_pre(prg, prg_chan); in ipu_prg_channel_disable()
279 struct ipu_prg *prg = ipu_chan->ipu->prg_priv; in ipu_prg_channel_configure() local
287 chan = &prg->chan[prg_chan]; in ipu_prg_channel_configure()
290 ipu_pre_update(prg->pres[chan->used_pre], modifier, *eba); in ipu_prg_channel_configure()
294 ret = ipu_prg_get_pre(prg, prg_chan); in ipu_prg_channel_configure()
298 ipu_pre_configure(prg->pres[chan->used_pre], in ipu_prg_channel_configure()
302 pm_runtime_get_sync(prg->dev); in ipu_prg_channel_configure()
305 writel(val, prg->regs + IPU_PRG_STRIDE(prg_chan)); in ipu_prg_channel_configure()
311 writel(val, prg->regs + IPU_PRG_HEIGHT(prg_chan)); in ipu_prg_channel_configure()
313 val = ipu_pre_get_baddr(prg->pres[chan->used_pre]); in ipu_prg_channel_configure()
315 writel(val, prg->regs + IPU_PRG_BADDR(prg_chan)); in ipu_prg_channel_configure()
317 val = readl(prg->regs + IPU_PRG_CTL); in ipu_prg_channel_configure()
324 writel(val, prg->regs + IPU_PRG_CTL); in ipu_prg_channel_configure()
327 writel(val, prg->regs + IPU_PRG_REG_UPDATE); in ipu_prg_channel_configure()
330 readl_poll_timeout(prg->regs + IPU_PRG_STATUS, val, in ipu_prg_channel_configure()
335 pm_runtime_put(prg->dev); in ipu_prg_channel_configure()
345 struct ipu_prg *prg = ipu_chan->ipu->prg_priv; in ipu_prg_channel_configure_pending() local
351 chan = &prg->chan[prg_chan]; in ipu_prg_channel_configure_pending()
354 return ipu_pre_update_pending(prg->pres[chan->used_pre]); in ipu_prg_channel_configure_pending()
361 struct ipu_prg *prg; in ipu_prg_probe() local
365 prg = devm_kzalloc(dev, sizeof(*prg), GFP_KERNEL); in ipu_prg_probe()
366 if (!prg) in ipu_prg_probe()
369 prg->regs = devm_platform_ioremap_resource(pdev, 0); in ipu_prg_probe()
370 if (IS_ERR(prg->regs)) in ipu_prg_probe()
371 return PTR_ERR(prg->regs); in ipu_prg_probe()
373 prg->clk_ipg = devm_clk_get(dev, "ipg"); in ipu_prg_probe()
374 if (IS_ERR(prg->clk_ipg)) in ipu_prg_probe()
375 return PTR_ERR(prg->clk_ipg); in ipu_prg_probe()
377 prg->clk_axi = devm_clk_get(dev, "axi"); in ipu_prg_probe()
378 if (IS_ERR(prg->clk_axi)) in ipu_prg_probe()
379 return PTR_ERR(prg->clk_axi); in ipu_prg_probe()
381 prg->iomuxc_gpr = in ipu_prg_probe()
383 if (IS_ERR(prg->iomuxc_gpr)) in ipu_prg_probe()
384 return PTR_ERR(prg->iomuxc_gpr); in ipu_prg_probe()
387 prg->pres[i] = ipu_pre_lookup_by_phandle(dev, "fsl,pres", i); in ipu_prg_probe()
388 if (!prg->pres[i]) in ipu_prg_probe()
392 ret = clk_prepare_enable(prg->clk_ipg); in ipu_prg_probe()
396 ret = clk_prepare_enable(prg->clk_axi); in ipu_prg_probe()
398 clk_disable_unprepare(prg->clk_ipg); in ipu_prg_probe()
403 val = readl(prg->regs + IPU_PRG_CTL); in ipu_prg_probe()
405 writel(val, prg->regs + IPU_PRG_CTL); in ipu_prg_probe()
408 writel(0xffffffff, prg->regs + IPU_PRG_THD); in ipu_prg_probe()
413 prg->dev = dev; in ipu_prg_probe()
414 platform_set_drvdata(pdev, prg); in ipu_prg_probe()
416 list_add(&prg->list, &ipu_prg_list); in ipu_prg_probe()
424 struct ipu_prg *prg = platform_get_drvdata(pdev); in ipu_prg_remove() local
427 list_del(&prg->list); in ipu_prg_remove()
434 struct ipu_prg *prg = dev_get_drvdata(dev); in prg_suspend() local
436 clk_disable_unprepare(prg->clk_axi); in prg_suspend()
437 clk_disable_unprepare(prg->clk_ipg); in prg_suspend()
444 struct ipu_prg *prg = dev_get_drvdata(dev); in prg_resume() local
447 ret = clk_prepare_enable(prg->clk_ipg); in prg_resume()
451 ret = clk_prepare_enable(prg->clk_axi); in prg_resume()
453 clk_disable_unprepare(prg->clk_ipg); in prg_resume()
466 { .compatible = "fsl,imx6qp-prg", },
474 .name = "imx-ipu-prg",