1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright (c) 2010-2013, NVIDIA Corporation.
10 #include <linux/dma-mapping.h>
27 #include <asm/dma-iommu.h>
47 	writel(v, host1x->common_regs + r);  in host1x_common_writel()
52 	writel(v, host1x->hv_regs + r);  in host1x_hypervisor_writel()
57 	return readl(host1x->hv_regs + r);  in host1x_hypervisor_readl()
62 	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;  in host1x_sync_writel()
69 	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;  in host1x_sync_readl()
76 	writel(v, ch->regs + r);  in host1x_ch_writel()
81 	return readl(ch->regs + r);  in host1x_ch_readl()
288 	{ .compatible = "nvidia,tegra234-host1x", .data = &host1x08_info, },
289 	{ .compatible = "nvidia,tegra194-host1x", .data = &host1x07_info, },
290 	{ .compatible = "nvidia,tegra186-host1x", .data = &host1x06_info, },
291 	{ .compatible = "nvidia,tegra210-host1x", .data = &host1x05_info, },
292 	{ .compatible = "nvidia,tegra124-host1x", .data = &host1x04_info, },
293 	{ .compatible = "nvidia,tegra114-host1x", .data = &host1x02_info, },
294 	{ .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
295 	{ .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
302 	const struct host1x_info *info = host->info;  in host1x_setup_virtualization_tables()
305 	if (!info->has_hypervisor)  in host1x_setup_virtualization_tables()
308 	for (i = 0; i < info->num_sid_entries; i++) {  in host1x_setup_virtualization_tables()
309 		const struct host1x_sid_entry *entry = &info->sid_table[i];  in host1x_setup_virtualization_tables()
311 		host1x_hypervisor_writel(host, entry->offset, entry->base);  in host1x_setup_virtualization_tables()
312 		host1x_hypervisor_writel(host, entry->limit, entry->base + 4);  in host1x_setup_virtualization_tables()
315 	for (i = 0; i < info->streamid_vm_table.count; i++) {  in host1x_setup_virtualization_tables()
317 		host1x_hypervisor_writel(host, 0xff, info->streamid_vm_table.base + 4 * i);  in host1x_setup_virtualization_tables()
320 	for (i = 0; i < info->classid_vm_table.count; i++) {  in host1x_setup_virtualization_tables()
322 		host1x_hypervisor_writel(host, 0xff, info->classid_vm_table.base + 4 * i);  in host1x_setup_virtualization_tables()
325 	for (i = 0; i < info->mmio_vm_table.count; i++) {  in host1x_setup_virtualization_tables()
327 		host1x_hypervisor_writel(host, 0x1, info->mmio_vm_table.base + 4 * i);  in host1x_setup_virtualization_tables()
346 	 * SoCs before Tegra186 (i.e. Tegra124 and Tegra210), the host1x can  in host1x_wants_iommu()
354 	 * buffers will be mapped into a 32-bit IOVA space that host1x can  in host1x_wants_iommu()
362 	if (host1x->info->dma_mask <= DMA_BIT_MASK(32)) {  in host1x_wants_iommu()
372 	struct iommu_domain *domain = iommu_get_domain_for_dev(host->dev);  in host1x_iommu_attach()
376 	if (host->dev->archdata.mapping) {  in host1x_iommu_attach()
378 				to_dma_iommu_mapping(host->dev);  in host1x_iommu_attach()
379 		arm_iommu_detach_device(host->dev);  in host1x_iommu_attach()
382 		domain = iommu_get_domain_for_dev(host->dev);  in host1x_iommu_attach()
397 	host->group = iommu_group_get(host->dev);  in host1x_iommu_attach()
398 	if (host->group) {  in host1x_iommu_attach()
407 		host->domain = iommu_paging_domain_alloc(host->dev);  in host1x_iommu_attach()
408 		if (IS_ERR(host->domain)) {  in host1x_iommu_attach()
409 			err = PTR_ERR(host->domain);  in host1x_iommu_attach()
410 			host->domain = NULL;  in host1x_iommu_attach()
414 		err = iommu_attach_group(host->domain, host->group);  in host1x_iommu_attach()
416 			if (err == -ENODEV)  in host1x_iommu_attach()
422 		geometry = &host->domain->geometry;  in host1x_iommu_attach()
423 		start = geometry->aperture_start & host->info->dma_mask;  in host1x_iommu_attach()
424 		end = geometry->aperture_end & host->info->dma_mask;  in host1x_iommu_attach()
426 		order = __ffs(host->domain->pgsize_bitmap);  in host1x_iommu_attach()
427 		init_iova_domain(&host->iova, 1UL << order, start >> order);  in host1x_iommu_attach()
428 		host->iova_end = end;  in host1x_iommu_attach()
430 		domain = host->domain;  in host1x_iommu_attach()
436 	iommu_domain_free(host->domain);  in host1x_iommu_attach()
437 	host->domain = NULL;  in host1x_iommu_attach()
441 	iommu_group_put(host->group);  in host1x_iommu_attach()
442 	host->group = NULL;  in host1x_iommu_attach()
449 	u64 mask = host->info->dma_mask;  in host1x_iommu_init()
456 		dev_err(host->dev, "failed to attach to IOMMU: %d\n", err);  in host1x_iommu_init()
465 	 * Newer generations of Tegra (Tegra186 and later) support a wide  in host1x_iommu_init()
468 	if (!domain && !host->info->has_wide_gather)  in host1x_iommu_init()
471 	err = dma_coerce_mask_and_coherent(host->dev, mask);  in host1x_iommu_init()
473 		dev_err(host->dev, "failed to set DMA mask: %d\n", err);  in host1x_iommu_init()
482 	if (host->domain) {  in host1x_iommu_exit()
483 		put_iova_domain(&host->iova);  in host1x_iommu_exit()
484 		iommu_detach_group(host->domain, host->group);  in host1x_iommu_exit()
486 		iommu_domain_free(host->domain);  in host1x_iommu_exit()
487 		host->domain = NULL;  in host1x_iommu_exit()
491 		iommu_group_put(host->group);  in host1x_iommu_exit()
492 		host->group = NULL;  in host1x_iommu_exit()
500 	host->resets[0].id = "mc";  in host1x_get_resets()
501 	host->resets[1].id = "host1x";  in host1x_get_resets()
502 	host->nresets = ARRAY_SIZE(host->resets);  in host1x_get_resets()
505 				host->dev, host->nresets, host->resets);  in host1x_get_resets()
507 		dev_err(host->dev, "failed to get reset: %d\n", err);  in host1x_get_resets()
519 	host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);  in host1x_probe()
521 		return -ENOMEM;  in host1x_probe()
523 	host->info = of_device_get_match_data(&pdev->dev);  in host1x_probe()
525 	if (host->info->has_hypervisor) {  in host1x_probe()
526 		host->regs = devm_platform_ioremap_resource_byname(pdev, "vm");  in host1x_probe()
527 		if (IS_ERR(host->regs))  in host1x_probe()
528 			return PTR_ERR(host->regs);  in host1x_probe()
530 		host->hv_regs = devm_platform_ioremap_resource_byname(pdev, "hypervisor");  in host1x_probe()
531 		if (IS_ERR(host->hv_regs))  in host1x_probe()
532 			return PTR_ERR(host->hv_regs);  in host1x_probe()
534 		if (host->info->has_common) {  in host1x_probe()
535 			host->common_regs = devm_platform_ioremap_resource_byname(pdev, "common");  in host1x_probe()
536 			if (IS_ERR(host->common_regs))  in host1x_probe()
537 				return PTR_ERR(host->common_regs);  in host1x_probe()
540 		host->regs = devm_platform_ioremap_resource(pdev, 0);  in host1x_probe()
541 		if (IS_ERR(host->regs))  in host1x_probe()
542 			return PTR_ERR(host->regs);  in host1x_probe()
545 	for (i = 0; i < ARRAY_SIZE(host->syncpt_irqs); i++) {  in host1x_probe()
551 		if (err == -ENXIO)  in host1x_probe()
556 		host->syncpt_irqs[i] = err;  in host1x_probe()
559 	host->num_syncpt_irqs = i;  in host1x_probe()
563 		host->syncpt_irqs[0] = platform_get_irq(pdev, 0);  in host1x_probe()
564 		if (host->syncpt_irqs[0] < 0)  in host1x_probe()
565 			return host->syncpt_irqs[0];  in host1x_probe()
567 		host->num_syncpt_irqs = 1;  in host1x_probe()
570 	mutex_init(&host->devices_lock);  in host1x_probe()
571 	INIT_LIST_HEAD(&host->devices);  in host1x_probe()
572 	INIT_LIST_HEAD(&host->list);  in host1x_probe()
573 	host->dev = &pdev->dev;  in host1x_probe()
578 	host->dev->dma_parms = &host->dma_parms;  in host1x_probe()
579 	dma_set_max_seg_size(host->dev, UINT_MAX);  in host1x_probe()
581 	if (host->info->init) {  in host1x_probe()
582 		err = host->info->init(host);  in host1x_probe()
587 	host->clk = devm_clk_get(&pdev->dev, NULL);  in host1x_probe()
588 	if (IS_ERR(host->clk)) {  in host1x_probe()
589 		err = PTR_ERR(host->clk);  in host1x_probe()
591 		if (err != -EPROBE_DEFER)  in host1x_probe()
592 			dev_err(&pdev->dev, "failed to get clock: %d\n", err);  in host1x_probe()
601 	host1x_bo_cache_init(&host->cache);  in host1x_probe()
605 		dev_err(&pdev->dev, "failed to setup IOMMU: %d\n", err);  in host1x_probe()
609 	err = host1x_channel_list_init(&host->channel_list,  in host1x_probe()
610 				       host->info->nb_channels);  in host1x_probe()
612 		dev_err(&pdev->dev, "failed to initialize channel list\n");  in host1x_probe()
618 		dev_err(&pdev->dev, "failed to initialize context list\n");  in host1x_probe()
624 		dev_err(&pdev->dev, "failed to initialize syncpts\n");  in host1x_probe()
628 	pm_runtime_enable(&pdev->dev);  in host1x_probe()
630 	err = devm_tegra_core_dev_init_opp_table_common(&pdev->dev);  in host1x_probe()
635 	err = pm_runtime_resume_and_get(&pdev->dev);  in host1x_probe()
641 		dev_err(&pdev->dev, "failed to initialize interrupts\n");  in host1x_probe()
651 	err = devm_of_platform_populate(&pdev->dev);  in host1x_probe()
663 	pm_runtime_put_sync_suspend(&pdev->dev);  in host1x_probe()
665 	pm_runtime_disable(&pdev->dev);  in host1x_probe()
668 	host1x_memory_context_list_free(&host->context_list);  in host1x_probe()
670 	host1x_channel_list_free(&host->channel_list);  in host1x_probe()
674 	host1x_bo_cache_destroy(&host->cache);  in host1x_probe()
686 	pm_runtime_force_suspend(&pdev->dev);  in host1x_remove()
690 	host1x_memory_context_list_free(&host->context_list);  in host1x_remove()
691 	host1x_channel_list_free(&host->channel_list);  in host1x_remove()
693 	host1x_bo_cache_destroy(&host->cache);  in host1x_remove()
705 	if (!host->info->skip_reset_assert) {  in host1x_runtime_suspend()
706 		err = reset_control_bulk_assert(host->nresets, host->resets);  in host1x_runtime_suspend()
715 	clk_disable_unprepare(host->clk);  in host1x_runtime_suspend()
716 	reset_control_bulk_release(host->nresets, host->resets);  in host1x_runtime_suspend()
733 	err = reset_control_bulk_acquire(host->nresets, host->resets);  in host1x_runtime_resume()
739 	err = clk_prepare_enable(host->clk);  in host1x_runtime_resume()
745 	err = reset_control_bulk_deassert(host->nresets, host->resets);  in host1x_runtime_resume()
758 	clk_disable_unprepare(host->clk);  in host1x_runtime_resume()
760 	reset_control_bulk_release(host->nresets, host->resets);  in host1x_runtime_resume()
773 		.name = "tegra-host1x",
810  * host1x_get_dma_mask() - query the supported DMA mask for host1x
818 	return host1x->info->dma_mask;  in host1x_get_dma_mask()
822 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");