143 static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 attr, int channel,  in xe_hwmon_pcode_read_power_limit()  argument
151 						  (channel == CHANNEL_CARD) ?  in xe_hwmon_pcode_read_power_limit()
160 			channel, val0, val1, ret);  in xe_hwmon_pcode_read_power_limit()
178 static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr, u8 channel,  in xe_hwmon_pcode_rmw_power_limit()  argument
186 						  (channel == CHANNEL_CARD) ?  in xe_hwmon_pcode_rmw_power_limit()
195 			channel, val0, val1, ret);  in xe_hwmon_pcode_rmw_power_limit()
205 							     (channel == CHANNEL_CARD) ?  in xe_hwmon_pcode_rmw_power_limit()
211 			channel, val0, val1, ret);  in xe_hwmon_pcode_rmw_power_limit()
216 				      int channel)  in xe_hwmon_get_reg()  argument
223 			if (channel == CHANNEL_PKG)  in xe_hwmon_get_reg()
225 			else if (channel == CHANNEL_VRAM)  in xe_hwmon_get_reg()
228 			if (channel == CHANNEL_PKG)  in xe_hwmon_get_reg()
230 			else if (channel == CHANNEL_VRAM)  in xe_hwmon_get_reg()
235 		if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG)  in xe_hwmon_get_reg()
237 		else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG))  in xe_hwmon_get_reg()
241 		if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG)  in xe_hwmon_get_reg()
243 		else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG))  in xe_hwmon_get_reg()
253 		if (xe->info.platform == XE_DG2 && channel == CHANNEL_PKG)  in xe_hwmon_get_reg()
257 		if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG) {  in xe_hwmon_get_reg()
259 		} else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG)) {  in xe_hwmon_get_reg()
264 		if (channel == FAN_1)  in xe_hwmon_get_reg()
266 		else if (channel == FAN_2)  in xe_hwmon_get_reg()
268 		else if (channel == FAN_3)  in xe_hwmon_get_reg()
287 static void xe_hwmon_power_max_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *value)  in xe_hwmon_power_max_read()  argument
297 		xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, &reg_val);  in xe_hwmon_power_max_read()
299 		rapl_limit = xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel);  in xe_hwmon_power_max_read()
300 		pkg_power_sku = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel);  in xe_hwmon_power_max_read()
307 		drm_info(&hwmon->xe->drm, "%s disabled for channel %d, val 0x%08x\n",  in xe_hwmon_power_max_read()
308 			 PWR_ATTR_TO_STR(attr), channel, reg_val);  in xe_hwmon_power_max_read()
331 static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, u32 attr, int channel, long value)  in xe_hwmon_power_max_write()  argument
341 	rapl_limit = xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel);  in xe_hwmon_power_max_write()
346 			drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",  in xe_hwmon_power_max_write()
347 				PWR_ATTR_TO_STR(attr), channel);  in xe_hwmon_power_max_write()
348 			xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN, 0);  in xe_hwmon_power_max_write()
349 			xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, &reg_val);  in xe_hwmon_power_max_write()
372 			 "Power limit clamped as selected %s exceeds channel %d limit\n",  in xe_hwmon_power_max_write()
373 			 PWR_ATTR_TO_STR(attr), channel);  in xe_hwmon_power_max_write()
385 		       hwmon->pl1_on_boot[channel] : hwmon->pl2_on_boot[channel];  in xe_hwmon_power_max_write()
398 		ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM, reg_val);  in xe_hwmon_power_max_write()
406 static void xe_hwmon_power_rated_max_read(struct xe_hwmon *hwmon, u32 attr, int channel,  in xe_hwmon_power_rated_max_read()  argument
414 		xe_hwmon_pcode_read_power_limit(hwmon, PL1_HWMON_ATTR, channel, &reg_val);  in xe_hwmon_power_rated_max_read()
421 		struct xe_reg reg = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel);  in xe_hwmon_power_rated_max_read()
451 xe_hwmon_energy_get(struct xe_hwmon *hwmon, int channel, long *energy)  in xe_hwmon_energy_get()  argument
454 	struct xe_hwmon_energy_info *ei = &hwmon->ei[channel];  in xe_hwmon_energy_get()
459 	if (channel > CHANNEL_PKG) {  in xe_hwmon_energy_get()
476 		if (channel == CHANNEL_PKG)  in xe_hwmon_energy_get()
482 								channel));  in xe_hwmon_energy_get()
500 	int channel = (to_sensor_dev_attr(attr)->index % 2) ? CHANNEL_PKG : CHANNEL_CARD;  in xe_hwmon_power_max_interval_show()  local
510 		ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, &reg_val);  in xe_hwmon_power_max_interval_show()
514 				channel, power_attr, reg_val, ret);  in xe_hwmon_power_max_interval_show()
519 								channel));  in xe_hwmon_power_max_interval_show()
556 	int channel = (to_sensor_dev_attr(attr)->index % 2) ? CHANNEL_PKG : CHANNEL_CARD;  in xe_hwmon_power_max_interval_store()  local
612 		xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy);  in xe_hwmon_power_max_interval_store()
614 		r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel),  in xe_hwmon_power_max_interval_store()
655 	int channel = (index % 2) ? CHANNEL_PKG : CHANNEL_CARD;  in xe_hwmon_attributes_visible()  local
664 		xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, &uval);  in xe_hwmon_attributes_visible()
666 		rapl_limit = xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel);  in xe_hwmon_attributes_visible()
736 static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,  in xe_hwmon_power_curr_crit_read()  argument
755 static int xe_hwmon_power_curr_crit_write(struct xe_hwmon *hwmon, int channel,  in xe_hwmon_power_curr_crit_write()  argument
774 			 "Power limit clamped as selected exceeds channel %d limit\n",  in xe_hwmon_power_curr_crit_write()
775 			 channel);  in xe_hwmon_power_curr_crit_write()
784 static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *value)  in xe_hwmon_get_voltage()  argument
789 	reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_GT_PERF_STATUS, channel));  in xe_hwmon_get_voltage()
795 xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)  in xe_hwmon_temp_is_visible()  argument
800 		return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;  in xe_hwmon_temp_is_visible()
807 xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)  in xe_hwmon_temp_read()  argument
814 		reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));  in xe_hwmon_temp_read()
825 xe_hwmon_power_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)  in xe_hwmon_power_is_visible()  argument
835 			xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, &uval);  in xe_hwmon_power_is_visible()
837 			reg = xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel);  in xe_hwmon_power_is_visible()
842 			drm_info(&hwmon->xe->drm, "%s is supported on channel %d\n",  in xe_hwmon_power_is_visible()
843 				 PWR_ATTR_TO_STR(attr), channel);  in xe_hwmon_power_is_visible()
846 		drm_dbg(&hwmon->xe->drm, "%s is unsupported on channel %d\n",  in xe_hwmon_power_is_visible()
847 			PWR_ATTR_TO_STR(attr), channel);  in xe_hwmon_power_is_visible()
853 			reg = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel);  in xe_hwmon_power_is_visible()
859 		if (channel == CHANNEL_CARD) {  in xe_hwmon_power_is_visible()
866 			xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, &uval);  in xe_hwmon_power_is_visible()
868 			reg = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel);  in xe_hwmon_power_is_visible()
873 				reg = xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel);  in xe_hwmon_power_is_visible()
878 		if ((!(uval & PWR_LIM_EN)) && channel == CHANNEL_CARD) {  in xe_hwmon_power_is_visible()
890 xe_hwmon_power_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)  in xe_hwmon_power_read()  argument
895 		xe_hwmon_power_max_read(hwmon, attr, channel, val);  in xe_hwmon_power_read()
898 		xe_hwmon_power_rated_max_read(hwmon, attr, channel, val);  in xe_hwmon_power_read()
901 		return xe_hwmon_power_curr_crit_read(hwmon, channel, val, SF_POWER);  in xe_hwmon_power_read()
908 xe_hwmon_power_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)  in xe_hwmon_power_write()  argument
913 		return xe_hwmon_power_max_write(hwmon, attr, channel, val);  in xe_hwmon_power_write()
915 		return xe_hwmon_power_curr_crit_write(hwmon, channel, val, SF_POWER);  in xe_hwmon_power_write()
922 xe_hwmon_curr_is_visible(const struct xe_hwmon *hwmon, u32 attr, int channel)  in xe_hwmon_curr_is_visible()  argument
927 	if (channel != CHANNEL_PKG)  in xe_hwmon_curr_is_visible()
945 xe_hwmon_curr_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)  in xe_hwmon_curr_read()  argument
949 		return xe_hwmon_power_curr_crit_read(hwmon, channel, val, SF_CURR);  in xe_hwmon_curr_read()
956 xe_hwmon_curr_write(struct xe_hwmon *hwmon, u32 attr, int channel, long val)  in xe_hwmon_curr_write()  argument
960 		return xe_hwmon_power_curr_crit_write(hwmon, channel, val, SF_CURR);  in xe_hwmon_curr_write()
967 xe_hwmon_in_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)  in xe_hwmon_in_is_visible()  argument
973 				       channel)) ? 0444 : 0;  in xe_hwmon_in_is_visible()
980 xe_hwmon_in_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)  in xe_hwmon_in_read()  argument
984 		xe_hwmon_get_voltage(hwmon, channel, val);  in xe_hwmon_in_read()
992 xe_hwmon_energy_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)  in xe_hwmon_energy_is_visible()  argument
1000 			xe_hwmon_energy_get(hwmon, channel, &energy);  in xe_hwmon_energy_is_visible()
1004 					       channel)) ? 0444 : 0;  in xe_hwmon_energy_is_visible()
1012 xe_hwmon_energy_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)  in xe_hwmon_energy_read()  argument
1016 		xe_hwmon_energy_get(hwmon, channel, val);  in xe_hwmon_energy_read()
1024 xe_hwmon_fan_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)  in xe_hwmon_fan_is_visible()  argument
1036 		return channel < uval ? 0444 : 0;  in xe_hwmon_fan_is_visible()
1043 xe_hwmon_fan_input_read(struct xe_hwmon *hwmon, int channel, long *val)  in xe_hwmon_fan_input_read()  argument
1046 	struct xe_hwmon_fan_info *fi = &hwmon->fi[channel];  in xe_hwmon_fan_input_read()
1053 	reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_FAN_SPEED, channel));  in xe_hwmon_fan_input_read()
1082 xe_hwmon_fan_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)  in xe_hwmon_fan_read()  argument
1086 		return xe_hwmon_fan_input_read(hwmon, channel, val);  in xe_hwmon_fan_read()
1094 		    u32 attr, int channel)  in xe_hwmon_is_visible()  argument
1103 		ret = xe_hwmon_temp_is_visible(hwmon, attr, channel);  in xe_hwmon_is_visible()
1106 		ret = xe_hwmon_power_is_visible(hwmon, attr, channel);  in xe_hwmon_is_visible()
1109 		ret = xe_hwmon_curr_is_visible(hwmon, attr, channel);  in xe_hwmon_is_visible()
1112 		ret = xe_hwmon_in_is_visible(hwmon, attr, channel);  in xe_hwmon_is_visible()
1115 		ret = xe_hwmon_energy_is_visible(hwmon, attr, channel);  in xe_hwmon_is_visible()
1118 		ret = xe_hwmon_fan_is_visible(hwmon, attr, channel);  in xe_hwmon_is_visible()
1132 	      int channel, long *val)  in xe_hwmon_read()  argument
1141 		ret = xe_hwmon_temp_read(hwmon, attr, channel, val);  in xe_hwmon_read()
1144 		ret = xe_hwmon_power_read(hwmon, attr, channel, val);  in xe_hwmon_read()
1147 		ret = xe_hwmon_curr_read(hwmon, attr, channel, val);  in xe_hwmon_read()
1150 		ret = xe_hwmon_in_read(hwmon, attr, channel, val);  in xe_hwmon_read()
1153 		ret = xe_hwmon_energy_read(hwmon, attr, channel, val);  in xe_hwmon_read()
1156 		ret = xe_hwmon_fan_read(hwmon, attr, channel, val);  in xe_hwmon_read()
1170 	       int channel, long val)  in xe_hwmon_write()  argument
1179 		ret = xe_hwmon_power_write(hwmon, attr, channel, val);  in xe_hwmon_write()
1182 		ret = xe_hwmon_curr_write(hwmon, attr, channel, val);  in xe_hwmon_write()
1196 			       u32 attr, int channel, const char **str)  in xe_hwmon_read_label()  argument
1200 		if (channel == CHANNEL_PKG)  in xe_hwmon_read_label()
1202 		else if (channel == CHANNEL_VRAM)  in xe_hwmon_read_label()
1209 		if (channel == CHANNEL_CARD)  in xe_hwmon_read_label()
1211 		else if (channel == CHANNEL_PKG)  in xe_hwmon_read_label()
1237 	int channel;  in xe_hwmon_get_preregistration_info()  local
1290 	for (channel = 0; channel < CHANNEL_MAX; channel++)  in xe_hwmon_get_preregistration_info()
1291 		if (xe_hwmon_is_visible(hwmon, hwmon_energy, hwmon_energy_input, channel))  in xe_hwmon_get_preregistration_info()
1292 			xe_hwmon_energy_get(hwmon, channel, &energy);  in xe_hwmon_get_preregistration_info()
1295 	for (channel = 0; channel < FAN_MAX; channel++)  in xe_hwmon_get_preregistration_info()
1296 		if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))  in xe_hwmon_get_preregistration_info()
1297 			xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);  in xe_hwmon_get_preregistration_info()