Lines Matching defs:vgdev
38 struct virtio_gpu_device *vgdev =
44 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
47 if (vgdev->num_scanouts) {
48 if (vgdev->has_edid)
49 virtio_gpu_cmd_get_edids(vgdev);
50 virtio_gpu_cmd_get_display_info(vgdev);
51 virtio_gpu_notify(vgdev);
52 drm_helper_hpd_irq_event(vgdev->ddev);
56 virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config,
68 static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
73 struct drm_device *drm = vgdev->ddev;
75 vgdev->capsets = drmm_kcalloc(drm, num_capsets,
78 if (!vgdev->capsets) {
83 virtio_gpu_cmd_get_capset_info(vgdev, i);
84 virtio_gpu_notify(vgdev);
85 ret = wait_event_timeout(vgdev->resp_wq,
86 vgdev->capsets[i].id > 0, 5 * HZ);
91 if (!vgdev->capsets[i].id ||
92 vgdev->capsets[i].id > MAX_CAPSET_ID)
98 DRM_ERROR("invalid capset id %u", vgdev->capsets[i].id);
101 spin_lock(&vgdev->display_info_lock);
102 drmm_kfree(drm, vgdev->capsets);
103 vgdev->capsets = NULL;
104 spin_unlock(&vgdev->display_info_lock);
108 vgdev->capset_id_mask |= 1 << vgdev->capsets[i].id;
110 i, vgdev->capsets[i].id,
111 vgdev->capsets[i].max_version,
112 vgdev->capsets[i].max_size);
115 vgdev->num_capsets = num_capsets;
124 struct virtio_gpu_device *vgdev;
133 vgdev = drmm_kzalloc(dev, sizeof(struct virtio_gpu_device), GFP_KERNEL);
134 if (!vgdev)
137 vgdev->ddev = dev;
138 dev->dev_private = vgdev;
139 vgdev->vdev = vdev;
141 spin_lock_init(&vgdev->display_info_lock);
142 spin_lock_init(&vgdev->resource_export_lock);
143 spin_lock_init(&vgdev->host_visible_lock);
144 ida_init(&vgdev->ctx_id_ida);
145 ida_init(&vgdev->resource_ida);
146 init_waitqueue_head(&vgdev->resp_wq);
147 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
148 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
150 vgdev->fence_drv.context = dma_fence_context_alloc(1);
151 spin_lock_init(&vgdev->fence_drv.lock);
152 INIT_LIST_HEAD(&vgdev->fence_drv.fences);
153 INIT_LIST_HEAD(&vgdev->cap_cache);
154 INIT_WORK(&vgdev->config_changed_work,
157 INIT_WORK(&vgdev->obj_free_work,
159 INIT_LIST_HEAD(&vgdev->obj_free_list);
160 spin_lock_init(&vgdev->obj_free_lock);
163 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
164 vgdev->has_virgl_3d = true;
166 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID))
167 vgdev->has_edid = true;
169 if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC))
170 vgdev->has_indirect = true;
172 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID))
173 vgdev->has_resource_assign_uuid = true;
175 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_BLOB))
176 vgdev->has_resource_blob = true;
178 if (virtio_get_shm_region(vgdev->vdev, &vgdev->host_visible_region,
180 if (!devm_request_mem_region(&vgdev->vdev->dev,
181 vgdev->host_visible_region.addr,
182 vgdev->host_visible_region.len,
183 dev_name(&vgdev->vdev->dev))) {
190 (unsigned long)vgdev->host_visible_region.addr,
191 (unsigned long)vgdev->host_visible_region.len);
192 vgdev->has_host_visible = true;
193 drm_mm_init(&vgdev->host_visible_mm,
194 (unsigned long)vgdev->host_visible_region.addr,
195 (unsigned long)vgdev->host_visible_region.len);
198 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_CONTEXT_INIT))
199 vgdev->has_context_init = true;
201 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_BLOB_ALIGNMENT)) {
202 vgdev->has_blob_alignment = true;
203 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
205 vgdev->blob_alignment = blob_alignment;
209 vgdev->has_virgl_3d ? '+' : '-',
210 vgdev->has_edid ? '+' : '-',
211 vgdev->has_resource_blob ? '+' : '-',
212 vgdev->has_host_visible ? '+' : '-');
215 vgdev->has_context_init ? '+' : '-',
216 vgdev->has_blob_alignment ? '+' : '-');
218 ret = virtio_find_vqs(vgdev->vdev, 2, vqs, vqs_info, NULL);
223 vgdev->ctrlq.vq = vqs[0];
224 vgdev->cursorq.vq = vqs[1];
225 ret = virtio_gpu_alloc_vbufs(vgdev);
232 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
234 vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
237 if (!IS_ENABLED(CONFIG_DRM_VIRTIO_GPU_KMS) || !vgdev->num_scanouts) {
239 vgdev->num_scanouts = 0;
240 vgdev->has_edid = false;
246 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
250 ret = virtio_gpu_modeset_init(vgdev);
256 virtio_device_ready(vgdev->vdev);
259 virtio_gpu_get_capsets(vgdev, num_capsets);
260 if (vgdev->num_scanouts) {
261 if (vgdev->has_edid)
262 virtio_gpu_cmd_get_edids(vgdev);
263 virtio_gpu_cmd_get_display_info(vgdev);
264 virtio_gpu_notify(vgdev);
265 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
271 virtio_gpu_free_vbufs(vgdev);
273 vgdev->vdev->config->del_vqs(vgdev->vdev);
279 static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
283 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
291 struct virtio_gpu_device *vgdev = dev->dev_private;
293 flush_work(&vgdev->obj_free_work);
294 flush_work(&vgdev->ctrlq.dequeue_work);
295 flush_work(&vgdev->cursorq.dequeue_work);
296 flush_work(&vgdev->config_changed_work);
297 virtio_reset_device(vgdev->vdev);
298 vgdev->vdev->config->del_vqs(vgdev->vdev);
303 struct virtio_gpu_device *vgdev = dev->dev_private;
305 if (!vgdev)
308 virtio_gpu_modeset_fini(vgdev);
309 virtio_gpu_free_vbufs(vgdev);
310 virtio_gpu_cleanup_cap_cache(vgdev);
312 if (vgdev->has_host_visible)
313 drm_mm_takedown(&vgdev->host_visible_mm);
318 struct virtio_gpu_device *vgdev = dev->dev_private;
323 if (!vgdev->has_virgl_3d)
333 handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
346 struct virtio_gpu_device *vgdev = dev->dev_private;
349 if (!vgdev->has_virgl_3d)
353 virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
354 virtio_gpu_notify(vgdev);
357 ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);