Lines Matching +full:bcm2835 +full:- +full:hvs

1 // SPDX-License-Identifier: GPL-2.0
31 /* Base address of the output. Raster formats must be 4-byte aligned,
32 * T and LT must be 16-byte aligned or maybe utile-aligned (docs are
37 /* Pitch in bytes for raster images, 16-byte aligned. For tiled, it's
41 /* For T-tiled imgaes, DST_PITCH should be the number of tiles wide,
45 /* For LT-tiled images, DST_PITCH should be the number of utiles wide,
50 /* Pre-rotation width/height of the image. Must match HVS config.
52 * If TFORMAT and 32-bit, limit is 1920 for 32-bit and 3840 to 16-bit
53 * and width/height must be tile or utile-aligned as appropriate. If
69 /* Bits 22-23 are set to 0x01 */
113 /* 888s are non-rotated, raster-only */
133 /* Request odd field from HVS. */
142 /* Starts a frame. Self-clearing. */
154 readl(txp->regs + (offset)); \
160 writel(val, txp->regs + (offset)); \
191 struct drm_device *dev = connector->dev; in vc4_txp_connector_get_modes()
193 return drm_add_modes_noedid(connector, dev->mode_config.max_width, in vc4_txp_connector_get_modes()
194 dev->mode_config.max_height); in vc4_txp_connector_get_modes()
201 struct drm_device *dev = connector->dev; in vc4_txp_connector_mode_valid()
202 struct drm_mode_config *mode_config = &dev->mode_config; in vc4_txp_connector_mode_valid()
203 int w = mode->hdisplay, h = mode->vdisplay; in vc4_txp_connector_mode_valid()
205 if (w < mode_config->min_width || w > mode_config->max_width) in vc4_txp_connector_mode_valid()
208 if (h < mode_config->min_height || h > mode_config->max_height) in vc4_txp_connector_mode_valid()
244 vc4_state->txp_armed = true; in vc4_txp_armed()
256 if (!conn_state->writeback_job) in vc4_txp_connector_atomic_check()
259 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); in vc4_txp_connector_atomic_check()
261 fb = conn_state->writeback_job->fb; in vc4_txp_connector_atomic_check()
262 if (fb->width != crtc_state->mode.hdisplay || in vc4_txp_connector_atomic_check()
263 fb->height != crtc_state->mode.vdisplay) { in vc4_txp_connector_atomic_check()
265 fb->width, fb->height); in vc4_txp_connector_atomic_check()
266 return -EINVAL; in vc4_txp_connector_atomic_check()
270 if (fb->format->format == drm_fmts[i]) in vc4_txp_connector_atomic_check()
275 return -EINVAL; in vc4_txp_connector_atomic_check()
278 if (fb->pitches[0] & GENMASK(3, 0)) in vc4_txp_connector_atomic_check()
279 return -EINVAL; in vc4_txp_connector_atomic_check()
289 struct drm_device *drm = conn->dev; in vc4_txp_connector_atomic_commit()
293 const struct vc4_txp_data *txp_data = txp->data; in vc4_txp_connector_atomic_commit()
304 if (WARN_ON(!conn_state->writeback_job)) in vc4_txp_connector_atomic_commit()
307 mode = &conn_state->crtc->state->adjusted_mode; in vc4_txp_connector_atomic_commit()
308 fb = conn_state->writeback_job->fb; in vc4_txp_connector_atomic_commit()
311 if (fb->format->format == drm_fmts[i]) in vc4_txp_connector_atomic_commit()
321 if (txp_data->has_byte_enable) in vc4_txp_connector_atomic_commit()
324 if (fb->format->has_alpha) in vc4_txp_connector_atomic_commit()
337 addr = gem->dma_addr + fb->offsets[0]; in vc4_txp_connector_atomic_commit()
341 if (txp_data->supports_40bit_addresses) in vc4_txp_connector_atomic_commit()
342 TXP_WRITE(txp_data->high_addr_ptr_reg, upper_32_bits(addr) & 0xff); in vc4_txp_connector_atomic_commit()
344 TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]); in vc4_txp_connector_atomic_commit()
346 hdisplay = mode->hdisplay ?: 1; in vc4_txp_connector_atomic_commit()
347 vdisplay = mode->vdisplay ?: 1; in vc4_txp_connector_atomic_commit()
348 if (txp_data->size_minus_one) { in vc4_txp_connector_atomic_commit()
349 hdisplay -= 1; in vc4_txp_connector_atomic_commit()
350 vdisplay -= 1; in vc4_txp_connector_atomic_commit()
359 drm_writeback_queue_job(&txp->connector, conn_state); in vc4_txp_connector_atomic_commit()
388 struct drm_device *drm = encoder->dev; in vc4_txp_encoder_disable()
408 if (vc4->gen < VC4_GEN_6_C) in vc4_txp_encoder_disable()
447 crtc_state->no_vblank = true; in vc4_txp_atomic_check()
462 struct drm_device *dev = crtc->dev; in vc4_txp_atomic_disable()
473 if (crtc->state->event) { in vc4_txp_atomic_disable()
476 spin_lock_irqsave(&dev->event_lock, flags); in vc4_txp_atomic_disable()
477 drm_crtc_send_vblank_event(crtc, crtc->state->event); in vc4_txp_atomic_disable()
478 crtc->state->event = NULL; in vc4_txp_atomic_disable()
479 spin_unlock_irqrestore(&dev->event_lock, flags); in vc4_txp_atomic_disable()
494 struct vc4_crtc *vc4_crtc = &txp->base; in vc4_txp_interrupt()
508 drm_writeback_signal_completion(&txp->connector, 0); in vc4_txp_interrupt()
568 return -ENOMEM; in vc4_txp_bind()
572 return -ENODEV; in vc4_txp_bind()
574 txp->data = txp_data; in vc4_txp_bind()
575 txp->pdev = pdev; in vc4_txp_bind()
576 txp->regs = vc4_ioremap_regs(pdev, 0); in vc4_txp_bind()
577 if (IS_ERR(txp->regs)) in vc4_txp_bind()
578 return PTR_ERR(txp->regs); in vc4_txp_bind()
580 vc4_crtc = &txp->base; in vc4_txp_bind()
581 vc4_crtc->regset.base = txp->regs; in vc4_txp_bind()
582 vc4_crtc->regset.regs = txp_regs; in vc4_txp_bind()
583 vc4_crtc->regset.nregs = ARRAY_SIZE(txp_regs); in vc4_txp_bind()
585 ret = vc4_crtc_init(drm, pdev, vc4_crtc, &txp_data->base, in vc4_txp_bind()
590 vc4_encoder = &txp->encoder; in vc4_txp_bind()
591 txp->encoder.type = txp_data->encoder_type; in vc4_txp_bind()
593 encoder = &vc4_encoder->base; in vc4_txp_bind()
594 encoder->possible_crtcs = drm_crtc_mask(&vc4_crtc->base); in vc4_txp_bind()
602 drm_connector_helper_add(&txp->connector.base, in vc4_txp_bind()
604 ret = drm_writeback_connector_init_with_encoder(drm, &txp->connector, in vc4_txp_bind()
626 drm_connector_cleanup(&txp->connector.base); in vc4_txp_unbind()
636 return component_add(&pdev->dev, &vc4_txp_ops); in vc4_txp_probe()
641 component_del(&pdev->dev, &vc4_txp_ops); in vc4_txp_remove()
645 { .compatible = "brcm,bcm2712-mop", .data = &bcm2712_mop_data },
646 { .compatible = "brcm,bcm2712-moplet", .data = &bcm2712_moplet_data },
647 { .compatible = "brcm,bcm2835-txp", .data = &bcm2835_txp_data },