Lines Matching +full:r +full:- +full:tile

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  Copyright © 2014-2015 Broadcom
24 		WARN_ON(!FIELD_FIT(hvs->vc4->gen == VC4_GEN_6_C ?	\
27 		FIELD_PREP(hvs->vc4->gen == VC4_GEN_6_C ?		\
32 #define VC6_GET_FIELD(word, field) FIELD_GET(hvs->vc4->gen == VC4_GEN_6_C ?	\
258 /* Enables Display 0 end-of-line-N contribution to
346 						 (x) * (SCALER_DISPLIST1 - \
353 						 (x) * (SCALER_DISPLACT1 - \
420  * channel.  Must be 4-pixel aligned (and thus 4 pixels less than the
426  * channel.  Must be 4-pixel aligned.
434 						 (x) * (SCALER_DISPBKGND1 - \
447 						 (x) * (SCALER_DISPSTAT1 - \
452 						 (x) * (SCALER_DISPBASE1 - \
456 						 (x) * (SCALER_DISPCTRL1 - \
476 /* Clamps R to [16,235] and G/B to [16,240]. */
487 /* Offsets are 8-bit 2s-complement. */
565 #define SCALER6_DISPX_CTRL0(x)		((hvs->vc4->gen == VC4_GEN_6_C) ? \
566 	(SCALER6_DISP0_CTRL0 + ((x) * (SCALER6_DISP1_CTRL0 - SCALER6_DISP0_CTRL0))) : \
567 	(SCALER6D_DISP0_CTRL0 + ((x) * (SCALER6D_DISP1_CTRL0 - SCALER6D_DISP0_CTRL0))))
576 #define SCALER6_DISPX_CTRL1(x)		((hvs->vc4->gen == VC4_GEN_6_C) ? \
577 	(SCALER6_DISP0_CTRL1 + ((x) * (SCALER6_DISP1_CTRL1 - SCALER6_DISP0_CTRL1))) : \
578 	(SCALER6D_DISP0_CTRL1 + ((x) * (SCALER6D_DISP1_CTRL1 - SCALER6D_DISP0_CTRL1))))
583 #define SCALER6_DISPX_BGND(x)		((hvs->vc4->gen == VC4_GEN_6_C) ? \
584 	(SCALER6_DISP0_BGND + ((x) * (SCALER6_DISP1_BGND - SCALER6_DISP0_BGND))) : \
585 	(SCALER6D_DISP0_BGND + ((x) * (SCALER6D_DISP1_BGND - SCALER6D_DISP0_BGND))))
588 #define SCALER6_DISPX_LPTRS(x)		((hvs->vc4->gen == VC4_GEN_6_C) ? \
589 	(SCALER6_DISP0_LPTRS + ((x) * (SCALER6_DISP1_LPTRS - SCALER6_DISP0_LPTRS))) : \
590 	(SCALER6D_DISP0_LPTRS + ((x) * (SCALER6D_DISP1_LPTRS - SCALER6D_DISP0_LPTRS))))
594 #define SCALER6_DISPX_COB(x)		((hvs->vc4->gen == VC4_GEN_6_C) ? \
595 	(SCALER6_DISP0_COB + ((x) * (SCALER6_DISP1_COB - SCALER6_DISP0_COB))) : \
596 	(SCALER6D_DISP0_COB + ((x) * (SCALER6D_DISP1_COB - SCALER6D_DISP0_COB))))
601 #define SCALER6_DISPX_STATUS(x)		((hvs->vc4->gen == VC4_GEN_6_C) ? \
602 	(SCALER6_DISP0_STATUS + ((x) * (SCALER6_DISP1_STATUS - SCALER6_DISP0_STATUS))) : \
603 	(SCALER6D_DISP0_STATUS + ((x) * (SCALER6D_DISP1_STATUS - SCALER6D_DISP0_STATUS))))
616 #define SCALER6_DISPX_DL(x)		((hvs->vc4->gen == VC4_GEN_6_C) ? \
617 	(SCALER6_DISP0_DL + ((x) * (SCALER6_DISP1_DL - SCALER6_DISP0_DL))) : \
618 	(SCALER6D_DISP0_DL + ((x) * (SCALER6D_DISP1_DL - SCALER6D_DISP0_DL))))
741 #define SCALER6(x) ((hvs->vc4->gen == VC4_GEN_6_C) ? SCALER6_ ## x : SCALER6D_ ## x)
817 /* Horizontal back porch (htotal - hsync_end). */
820 /* Horizontal sync pulse (hsync_end - hsync_start). */
823 /* Horizontal front porch (hsync_start - hdisplay). */
845 /* Vertical sync pulse (vsync_end - vsync_start). */
848 /* Vertical front porch (vsync_start - vdisplay). */
858 /* Vertical pack porch (vtotal - vsync_end). */
978 /* Single-shot reset bit.  Read value is undefined. */
1099 /* For YCbCr modes (8-12, and 17) */
1244  * 0x2: 2, 0x3: -1}
1252 /* Signed offset to apply to CB before CSC (Cb' = Cb - 128 + CB_OFS). */
1255 /* Signed offset to apply to CB before CSC (Cr' = Cr - 128 + CR_OFS). */
1339 /* PITCH0 fields for T-tiled. */
1344 /* Y offset within a tile. */