Lines Matching +full:all +full:- +full:outputs
1 // SPDX-License-Identifier: GPL-2.0-only
10 * signals. On BCM2835, these can be routed out to GPIO0-27 with the
25 #include <linux/media-bus-format.h>
44 /* The format field takes the ORDER-shuffled pixel valve data and
49 /* This define is named in the hardware, but actually just outputs 0. */
51 /* Outputs 00000000rrrrrggggggbbbbb */
53 /* Outputs 000rrrrr00gggggg000bbbbb */
55 /* Outputs 00rrrrr000gggggg00bbbbb0 */
57 /* Outputs 000000rrrrrrggggggbbbbbb */
59 /* Outputs 00rrrrrr00gggggg00bbbbbb */
61 /* Outputs rrrrrrrrggggggggbbbbbbbb */
70 /* Outputs the signal the falling clock edge instead of rising. */
80 /* Power gate to the device, full reset at 0 -> 1 transition */
83 /* All other registers besides DPI_C return the ID */
107 readl(dpi->regs + (offset)); \
113 writel(val, dpi->regs + (offset)); \
123 struct drm_device *dev = encoder->dev;
130 clk_disable_unprepare(dpi->pixel_clock);
137 struct drm_device *dev = encoder->dev;
138 struct drm_display_mode *mode = &encoder->crtc->mode;
153 if (connector_scan->encoder == encoder) {
164 if (connector->display_info.num_bus_formats) {
165 u32 bus_format = connector->display_info.bus_formats[0];
209 if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
212 if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
216 if (mode->flags & DRM_MODE_FLAG_CSYNC) {
217 if (mode->flags & DRM_MODE_FLAG_NCSYNC)
222 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
224 else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
227 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
229 else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
238 ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
242 ret = clk_prepare_enable(dpi->pixel_clock);
252 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
266 struct drm_device *drm = encoder->dev;
269 vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
279 { .compatible = "brcm,bcm2835-dpi", .data = NULL },
288 struct drm_device *drm = dpi->encoder.base.dev;
289 struct device *dev = &dpi->pdev->dev;
292 bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
297 if (PTR_ERR(bridge) == -ENODEV)
303 return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
310 clk_disable_unprepare(dpi->core_clock);
322 return -ENOMEM;
324 dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
325 dpi->pdev = pdev;
326 dpi->regs = vc4_ioremap_regs(pdev, 0);
327 if (IS_ERR(dpi->regs))
328 return PTR_ERR(dpi->regs);
329 dpi->regset.base = dpi->regs;
330 dpi->regset.regs = dpi_regs;
331 dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
336 return -ENODEV;
339 dpi->core_clock = devm_clk_get(dev, "core");
340 if (IS_ERR(dpi->core_clock)) {
341 ret = PTR_ERR(dpi->core_clock);
342 if (ret != -EPROBE_DEFER)
347 dpi->pixel_clock = devm_clk_get(dev, "pixel");
348 if (IS_ERR(dpi->pixel_clock)) {
349 ret = PTR_ERR(dpi->pixel_clock);
350 if (ret != -EPROBE_DEFER)
355 ret = clk_prepare_enable(dpi->core_clock);
365 ret = drmm_encoder_init(drm, &dpi->encoder.base,
372 drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);
389 return component_add(&pdev->dev, &vc4_dpi_ops);
394 component_del(&pdev->dev, &vc4_dpi_ops);