33 #define VBE_DISPI_IOPORT_INDEX           0x01CE
34 #define VBE_DISPI_IOPORT_DATA            0x01CF
36 #define VBE_DISPI_INDEX_ID               0x0
37 #define VBE_DISPI_INDEX_XRES             0x1
38 #define VBE_DISPI_INDEX_YRES             0x2
39 #define VBE_DISPI_INDEX_BPP              0x3
40 #define VBE_DISPI_INDEX_ENABLE           0x4
41 #define VBE_DISPI_INDEX_BANK             0x5
42 #define VBE_DISPI_INDEX_VIRT_WIDTH       0x6
43 #define VBE_DISPI_INDEX_VIRT_HEIGHT      0x7
44 #define VBE_DISPI_INDEX_X_OFFSET         0x8
45 #define VBE_DISPI_INDEX_Y_OFFSET         0x9
46 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
48 #define VBE_DISPI_ID0                    0xB0C0
49 #define VBE_DISPI_ID1                    0xB0C1
50 #define VBE_DISPI_ID2                    0xB0C2
51 #define VBE_DISPI_ID3                    0xB0C3
52 #define VBE_DISPI_ID4                    0xB0C4
53 #define VBE_DISPI_ID5                    0xB0C5
55 #define VBE_DISPI_DISABLED               0x00
56 #define VBE_DISPI_ENABLED                0x01
57 #define VBE_DISPI_GETCAPS                0x02
58 #define VBE_DISPI_8BIT_DAC               0x20
59 #define VBE_DISPI_LFB_ENABLED            0x40
60 #define VBE_DISPI_NOCLEARMEM             0x80
121 	if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))  in bochs_vga_writeb()
125 		int offset = ioport - 0x3c0 + 0x400;  in bochs_vga_writeb()
135 	if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))  in bochs_vga_readb()
136 		return 0xff;  in bochs_vga_readb()
139 		int offset = ioport - 0x3c0 + 0x400;  in bochs_vga_readb()
149 	u16 ret = 0;  in bochs_dispi_read()
152 		int offset = 0x500 + (reg << 1);  in bochs_dispi_read()
165 		int offset = 0x500 + (reg << 1);  in bochs_dispi_write()
179 	writel(0xbebebebe, bochs->mmio + 0x604);  in bochs_hw_set_big_endian()
187 	writel(0x1e1e1e1e, bochs->mmio + 0x604);  in bochs_hw_set_little_endian()
204 	if (start + len > 0x400 /* vga register offset */)  in bochs_get_edid_block()
207 	for (i = 0; i < len; i++)  in bochs_get_edid_block()
210 	return 0;  in bochs_get_edid_block()
220 	bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header));  in bochs_hw_read_edid()
265 	if ((id & 0xfff0) != VBE_DISPI_ID0) {  in bochs_hw_init()
270 	if ((pdev->resource[0].flags & IORESOURCE_MEM) == 0)  in bochs_hw_init()
272 	addr = pci_resource_start(pdev, 0);  in bochs_hw_init()
273 	size = pci_resource_len(pdev, 0);  in bochs_hw_init()
274 	if (addr == 0)  in bochs_hw_init()
293 	DRM_INFO("Found bochs VGA, ID 0x%x.\n", id);  in bochs_hw_init()
294 	DRM_INFO("Framebuffer size %ld kB @ 0x%lx, %s @ 0x%lx.\n",  in bochs_hw_init()
300 		bochs->qext_size = readl(bochs->mmio + 0x600);  in bochs_hw_init()
302 			bochs->qext_size = 0;  in bochs_hw_init()
311 	return 0;  in bochs_hw_init()
321 	/* blank or unblank; we need only update index and set 0x20 */  in bochs_hw_blank()
322 	bochs_vga_writeb(bochs, VGA_ATT_W, blank ? 0 : 0x20);  in bochs_hw_blank()
342 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,      0);  in bochs_hw_setmode()
346 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_BANK,        0);  in bochs_hw_setmode()
350 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET,    0);  in bochs_hw_setmode()
351 	bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET,    0);  in bochs_hw_setmode()
367 			 (format->format >>  0) & 0xff,  in bochs_hw_setformat()
368 			 (format->format >>  8) & 0xff,  in bochs_hw_setformat()
369 			 (format->format >> 16) & 0xff,  in bochs_hw_setformat()
370 			 (format->format >> 24) & 0xff);  in bochs_hw_setformat()
381 		DRM_ERROR("%s: Huh? Got framebuffer format 0x%x",  in bochs_hw_setformat()
439 		return 0;  in bochs_primary_plane_helper_atomic_check()
441 	return 0;  in bochs_primary_plane_helper_atomic_check()
463 		iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, &damage));  in bochs_primary_plane_helper_atomic_update()
467 	/* Always scanout image at VRAM offset 0 */  in bochs_primary_plane_helper_atomic_update()
471 			 fb->pitches[0],  in bochs_primary_plane_helper_atomic_update()
472 			 0);  in bochs_primary_plane_helper_atomic_update()
486 		sb->pitch[0] = plane->state->fb->pitches[0];  in bochs_primary_plane_helper_get_scanout_buffer()
487 		sb->map[0] = map;  in bochs_primary_plane_helper_get_scanout_buffer()
488 		return 0;  in bochs_primary_plane_helper_get_scanout_buffer()
521 		return 0;  in bochs_crtc_helper_atomic_check()
608 	pitch = drm_format_info_min_pitch(format, 0, mode->hdisplay);  in bochs_mode_config_mode_valid()
646 	ret = drm_universal_plane_init(dev, primary_plane, 0,  in bochs_kms_init()
686 	return 0;  in bochs_kms_init()
704 	return 0;  in bochs_load()
715 	.minor			= 0,
772 	ret = drm_dev_register(dev, 0);  in bochs_pci_probe()
796 		.vendor      = 0x1234,
797 		.device      = 0x1111,
803 		.vendor      = 0x1234,
804 		.device      = 0x1111,
810 		.vendor      = 0x4321,
811 		.device      = 0x1111,