Lines Matching +full:tegra186 +full:- +full:misc
1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
65 * be filtered out later on by ->format_mod_supported() on SoCs where
82 offset = 0x000 + (offset - 0x500); in tegra_plane_offset()
83 return plane->offset + offset; in tegra_plane_offset()
87 offset = 0x180 + (offset - 0x700); in tegra_plane_offset()
88 return plane->offset + offset; in tegra_plane_offset()
92 offset = 0x1c0 + (offset - 0x800); in tegra_plane_offset()
93 return plane->offset + offset; in tegra_plane_offset()
96 dev_WARN(plane->dc->dev, "invalid offset: %x\n", offset); in tegra_plane_offset()
98 return plane->offset + offset; in tegra_plane_offset()
104 return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset)); in tegra_plane_readl()
110 tegra_dc_writel(plane->dc, value, tegra_plane_offset(plane, offset)); in tegra_plane_writel()
117 mutex_lock(&wgrp->lock); in tegra_windowgroup_enable()
119 if (wgrp->usecount == 0) { in tegra_windowgroup_enable()
120 err = host1x_client_resume(wgrp->parent); in tegra_windowgroup_enable()
122 dev_err(wgrp->parent->dev, "failed to resume: %d\n", err); in tegra_windowgroup_enable()
126 reset_control_deassert(wgrp->rst); in tegra_windowgroup_enable()
129 wgrp->usecount++; in tegra_windowgroup_enable()
132 mutex_unlock(&wgrp->lock); in tegra_windowgroup_enable()
140 mutex_lock(&wgrp->lock); in tegra_windowgroup_disable()
142 if (wgrp->usecount == 1) { in tegra_windowgroup_disable()
143 err = reset_control_assert(wgrp->rst); in tegra_windowgroup_disable()
146 wgrp->index); in tegra_windowgroup_disable()
149 host1x_client_suspend(wgrp->parent); in tegra_windowgroup_disable()
152 wgrp->usecount--; in tegra_windowgroup_disable()
153 mutex_unlock(&wgrp->lock); in tegra_windowgroup_disable()
166 for (i = 0; i < hub->soc->num_wgrps; i++) { in tegra_display_hub_prepare()
167 struct tegra_windowgroup *wgrp = &hub->wgrps[i]; in tegra_display_hub_prepare()
170 if (wgrp->parent) in tegra_display_hub_prepare()
182 * XXX Remove this once window groups can be more fine-grainedly in tegra_display_hub_cleanup()
185 for (i = 0; i < hub->soc->num_wgrps; i++) { in tegra_display_hub_cleanup()
186 struct tegra_windowgroup *wgrp = &hub->wgrps[i]; in tegra_display_hub_cleanup()
189 if (wgrp->parent) in tegra_display_hub_cleanup()
196 struct tegra_dc *dc = plane->dc; in tegra_shared_plane_update()
200 mask = COMMON_UPDATE | WIN_A_UPDATE << plane->base.index; in tegra_shared_plane_update()
216 struct tegra_dc *dc = plane->dc; in tegra_shared_plane_activate()
220 mask = COMMON_ACTREQ | WIN_A_ACT_REQ << plane->base.index; in tegra_shared_plane_activate()
246 struct device *dev = dc->dev; in tegra_dc_owns_shared_plane()
248 if (tegra_shared_plane_get_owner(plane, dc) == dc->pipe) { in tegra_dc_owns_shared_plane()
249 if (plane->dc == dc) in tegra_dc_owns_shared_plane()
253 dc->pipe, plane->index); in tegra_dc_owns_shared_plane()
264 struct tegra_dc *old = plane->dc, *dc = new ? new : old; in tegra_shared_plane_set_owner()
265 struct device *dev = new ? new->dev : old->dev; in tegra_shared_plane_set_owner()
266 unsigned int owner, index = plane->index; in tegra_shared_plane_set_owner()
272 if (new && (owner != OWNER_MASK && owner != new->pipe)) { in tegra_shared_plane_set_owner()
274 return -EBUSY; in tegra_shared_plane_set_owner()
284 old->pipe, owner); in tegra_shared_plane_set_owner()
289 value |= OWNER(new->pipe); in tegra_shared_plane_set_owner()
295 plane->dc = new; in tegra_shared_plane_set_owner()
409 value |= THREAD_NUM(plane->base.index); in tegra_dc_assign_shared_plane()
432 struct tegra_bo_tiling *tiling = &plane_state->tiling; in tegra_shared_plane_atomic_check()
433 struct tegra_dc *dc = to_tegra_dc(new_plane_state->crtc); in tegra_shared_plane_atomic_check()
437 if (!new_plane_state->crtc || !new_plane_state->fb) in tegra_shared_plane_atomic_check()
440 err = tegra_plane_format(new_plane_state->fb->format->format, in tegra_shared_plane_atomic_check()
441 &plane_state->format, in tegra_shared_plane_atomic_check()
442 &plane_state->swap); in tegra_shared_plane_atomic_check()
446 err = tegra_fb_get_tiling(new_plane_state->fb, tiling); in tegra_shared_plane_atomic_check()
450 if (tiling->mode == TEGRA_BO_TILING_MODE_BLOCK && in tegra_shared_plane_atomic_check()
451 !dc->soc->supports_block_linear) { in tegra_shared_plane_atomic_check()
453 return -EINVAL; in tegra_shared_plane_atomic_check()
456 if (tiling->sector_layout == TEGRA_BO_SECTOR_LAYOUT_GPU && in tegra_shared_plane_atomic_check()
457 !dc->soc->supports_sector_layout) { in tegra_shared_plane_atomic_check()
459 return -EINVAL; in tegra_shared_plane_atomic_check()
467 if (new_plane_state->fb->format->num_planes > 2) { in tegra_shared_plane_atomic_check()
468 if (new_plane_state->fb->pitches[2] != new_plane_state->fb->pitches[1]) { in tegra_shared_plane_atomic_check()
469 DRM_ERROR("unsupported UV-plane configuration\n"); in tegra_shared_plane_atomic_check()
470 return -EINVAL; in tegra_shared_plane_atomic_check()
476 err = tegra_plane_state_add(&tegra->base, new_plane_state); in tegra_shared_plane_atomic_check()
494 if (!old_state || !old_state->crtc) in tegra_shared_plane_atomic_disable()
497 dc = to_tegra_dc(old_state->crtc); in tegra_shared_plane_atomic_disable()
499 err = host1x_client_resume(&dc->client); in tegra_shared_plane_atomic_disable()
501 dev_err(dc->dev, "failed to resume: %d\n", err); in tegra_shared_plane_atomic_disable()
506 * XXX Legacy helpers seem to sometimes call ->atomic_disable() even in tegra_shared_plane_atomic_disable()
510 if (WARN_ON(p->dc == NULL)) in tegra_shared_plane_atomic_disable()
511 p->dc = dc; in tegra_shared_plane_atomic_disable()
519 host1x_client_suspend(&dc->client); in tegra_shared_plane_atomic_disable()
539 struct tegra_dc *dc = to_tegra_dc(new_state->crtc); in tegra_shared_plane_atomic_update()
540 unsigned int zpos = new_state->normalized_zpos; in tegra_shared_plane_atomic_update()
541 struct drm_framebuffer *fb = new_state->fb; in tegra_shared_plane_atomic_update()
550 if (!new_state->crtc || !new_state->fb) in tegra_shared_plane_atomic_update()
553 if (!new_state->visible) { in tegra_shared_plane_atomic_update()
558 err = host1x_client_resume(&dc->client); in tegra_shared_plane_atomic_update()
560 dev_err(dc->dev, "failed to resume: %d\n", err); in tegra_shared_plane_atomic_update()
564 yuv = tegra_plane_format_is_yuv(tegra_plane_state->format, &planes, &bpc); in tegra_shared_plane_atomic_update()
581 value = K2(255) | K1(255) | WINDOW_LAYER_DEPTH(255 - zpos); in tegra_shared_plane_atomic_update()
585 min_width = min(new_state->src_w >> 16, new_state->crtc_w); in tegra_shared_plane_atomic_update()
597 dev_err(dc->dev, "invalid minimum width: %u\n", min_width); in tegra_shared_plane_atomic_update()
603 if (new_state->src_w != new_state->crtc_w << 16) { in tegra_shared_plane_atomic_update()
604 fixed20_12 width = dfixed_init(new_state->src_w >> 16); in tegra_shared_plane_atomic_update()
605 u32 incr = compute_phase_incr(width, new_state->crtc_w) & ~0x1; in tegra_shared_plane_atomic_update()
606 u32 init = (1 << (NFB - 1)) + (incr >> 1); in tegra_shared_plane_atomic_update()
614 if (new_state->src_h != new_state->crtc_h << 16) { in tegra_shared_plane_atomic_update()
615 fixed20_12 height = dfixed_init(new_state->src_h >> 16); in tegra_shared_plane_atomic_update()
616 u32 incr = compute_phase_incr(height, new_state->crtc_h) & ~0x1; in tegra_shared_plane_atomic_update()
617 u32 init = (1 << (NFB - 1)) + (incr >> 1); in tegra_shared_plane_atomic_update()
636 if (tegra_plane_state->tiling.sector_layout == TEGRA_BO_SECTOR_LAYOUT_GPU) in tegra_shared_plane_atomic_update()
640 base = tegra_plane_state->iova[0] + fb->offsets[0]; in tegra_shared_plane_atomic_update()
643 tegra_plane_writel(p, tegra_plane_state->format, DC_WIN_COLOR_DEPTH); in tegra_shared_plane_atomic_update()
646 value = V_POSITION(new_state->crtc_y) | in tegra_shared_plane_atomic_update()
647 H_POSITION(new_state->crtc_x); in tegra_shared_plane_atomic_update()
650 value = V_SIZE(new_state->crtc_h) | H_SIZE(new_state->crtc_w); in tegra_shared_plane_atomic_update()
656 value = V_SIZE(new_state->src_h >> 16) | H_SIZE(new_state->src_w >> 16); in tegra_shared_plane_atomic_update()
662 value = PITCH(fb->pitches[0]); in tegra_shared_plane_atomic_update()
666 base = tegra_plane_state->iova[1] + fb->offsets[1]; in tegra_shared_plane_atomic_update()
673 base = tegra_plane_state->iova[2] + fb->offsets[2]; in tegra_shared_plane_atomic_update()
680 value = PITCH_U(fb->pitches[1]); in tegra_shared_plane_atomic_update()
683 value |= PITCH_V(fb->pitches[2]); in tegra_shared_plane_atomic_update()
705 if (!tegra_plane_format_is_indexed(tegra_plane_state->format)) in tegra_shared_plane_atomic_update()
711 value = OFFSET_X(new_state->src_y >> 16) | in tegra_shared_plane_atomic_update()
712 OFFSET_Y(new_state->src_x >> 16); in tegra_shared_plane_atomic_update()
715 if (dc->soc->supports_block_linear) { in tegra_shared_plane_atomic_update()
716 unsigned long height = tegra_plane_state->tiling.value; in tegra_shared_plane_atomic_update()
719 switch (tegra_plane_state->tiling.mode) { in tegra_shared_plane_atomic_update()
725 /* XXX not supported on Tegra186 and later */ in tegra_shared_plane_atomic_update()
744 host1x_client_suspend(&dc->client); in tegra_shared_plane_atomic_update()
761 struct tegra_drm *tegra = drm->dev_private; in tegra_shared_plane_create()
762 struct tegra_display_hub *hub = tegra->hub; in tegra_shared_plane_create()
773 return ERR_PTR(-ENOMEM); in tegra_shared_plane_create()
775 plane->base.offset = 0x0a00 + 0x0300 * index; in tegra_shared_plane_create()
776 plane->base.index = index; in tegra_shared_plane_create()
778 plane->wgrp = &hub->wgrps[wgrp]; in tegra_shared_plane_create()
779 plane->wgrp->parent = &dc->client; in tegra_shared_plane_create()
781 p = &plane->base.base; in tegra_shared_plane_create()
784 possible_crtcs = BIT(tegra->num_crtcs) - 1; in tegra_shared_plane_create()
809 state = kmemdup(obj->state, sizeof(*state), GFP_KERNEL); in tegra_display_hub_duplicate_state()
813 __drm_atomic_helper_private_obj_duplicate_state(obj, &state->base); in tegra_display_hub_duplicate_state()
815 return &state->base; in tegra_display_hub_duplicate_state()
838 priv = drm_atomic_get_private_obj_state(state, &hub->base); in tegra_display_hub_get_state()
848 struct tegra_drm *tegra = drm->dev_private; in tegra_display_hub_atomic_check()
854 if (!tegra->hub) in tegra_display_hub_atomic_check()
857 hub_state = tegra_display_hub_get_state(tegra->hub, state); in tegra_display_hub_atomic_check()
866 * Note that this isn't used before Tegra186, but it doesn't hurt and in tegra_display_hub_atomic_check()
872 if (new->active) { in tegra_display_hub_atomic_check()
873 if (!hub_state->clk || dc->pclk > hub_state->rate) { in tegra_display_hub_atomic_check()
874 hub_state->dc = to_tegra_dc(dc->base.crtc); in tegra_display_hub_atomic_check()
875 hub_state->clk = hub_state->dc->clk; in tegra_display_hub_atomic_check()
876 hub_state->rate = dc->pclk; in tegra_display_hub_atomic_check()
889 err = host1x_client_resume(&dc->client); in tegra_display_hub_update()
891 dev_err(dc->dev, "failed to resume: %d\n", err); in tegra_display_hub_update()
908 host1x_client_suspend(&dc->client); in tegra_display_hub_update()
914 struct tegra_drm *tegra = drm->dev_private; in tegra_display_hub_atomic_commit()
915 struct tegra_display_hub *hub = tegra->hub; in tegra_display_hub_atomic_commit()
917 struct device *dev = hub->client.dev; in tegra_display_hub_atomic_commit()
920 hub_state = to_tegra_display_hub_state(hub->base.state); in tegra_display_hub_atomic_commit()
922 if (hub_state->clk) { in tegra_display_hub_atomic_commit()
923 err = clk_set_rate(hub_state->clk, hub_state->rate); in tegra_display_hub_atomic_commit()
926 hub_state->clk, hub_state->rate); in tegra_display_hub_atomic_commit()
928 err = clk_set_parent(hub->clk_disp, hub_state->clk); in tegra_display_hub_atomic_commit()
931 hub->clk_disp, hub_state->clk, err); in tegra_display_hub_atomic_commit()
934 if (hub_state->dc) in tegra_display_hub_atomic_commit()
935 tegra_display_hub_update(hub_state->dc); in tegra_display_hub_atomic_commit()
941 struct drm_device *drm = dev_get_drvdata(client->host); in tegra_display_hub_init()
942 struct tegra_drm *tegra = drm->dev_private; in tegra_display_hub_init()
947 return -ENOMEM; in tegra_display_hub_init()
949 drm_atomic_private_obj_init(drm, &hub->base, &state->base, in tegra_display_hub_init()
952 tegra->hub = hub; in tegra_display_hub_init()
959 struct drm_device *drm = dev_get_drvdata(client->host); in tegra_display_hub_exit()
960 struct tegra_drm *tegra = drm->dev_private; in tegra_display_hub_exit()
962 drm_atomic_private_obj_fini(&tegra->hub->base); in tegra_display_hub_exit()
963 tegra->hub = NULL; in tegra_display_hub_exit()
971 struct device *dev = client->dev; in tegra_display_hub_runtime_suspend()
972 unsigned int i = hub->num_heads; in tegra_display_hub_runtime_suspend()
975 err = reset_control_assert(hub->rst); in tegra_display_hub_runtime_suspend()
979 while (i--) in tegra_display_hub_runtime_suspend()
980 clk_disable_unprepare(hub->clk_heads[i]); in tegra_display_hub_runtime_suspend()
982 clk_disable_unprepare(hub->clk_hub); in tegra_display_hub_runtime_suspend()
983 clk_disable_unprepare(hub->clk_dsc); in tegra_display_hub_runtime_suspend()
984 clk_disable_unprepare(hub->clk_disp); in tegra_display_hub_runtime_suspend()
994 struct device *dev = client->dev; in tegra_display_hub_runtime_resume()
1004 err = clk_prepare_enable(hub->clk_disp); in tegra_display_hub_runtime_resume()
1008 err = clk_prepare_enable(hub->clk_dsc); in tegra_display_hub_runtime_resume()
1012 err = clk_prepare_enable(hub->clk_hub); in tegra_display_hub_runtime_resume()
1016 for (i = 0; i < hub->num_heads; i++) { in tegra_display_hub_runtime_resume()
1017 err = clk_prepare_enable(hub->clk_heads[i]); in tegra_display_hub_runtime_resume()
1022 err = reset_control_deassert(hub->rst); in tegra_display_hub_runtime_resume()
1029 while (i--) in tegra_display_hub_runtime_resume()
1030 clk_disable_unprepare(hub->clk_heads[i]); in tegra_display_hub_runtime_resume()
1032 clk_disable_unprepare(hub->clk_hub); in tegra_display_hub_runtime_resume()
1034 clk_disable_unprepare(hub->clk_dsc); in tegra_display_hub_runtime_resume()
1036 clk_disable_unprepare(hub->clk_disp); in tegra_display_hub_runtime_resume()
1051 u64 dma_mask = dma_get_mask(pdev->dev.parent); in tegra_display_hub_probe()
1058 err = dma_coerce_mask_and_coherent(&pdev->dev, dma_mask); in tegra_display_hub_probe()
1060 dev_err(&pdev->dev, "failed to set DMA mask: %d\n", err); in tegra_display_hub_probe()
1064 hub = devm_kzalloc(&pdev->dev, sizeof(*hub), GFP_KERNEL); in tegra_display_hub_probe()
1066 return -ENOMEM; in tegra_display_hub_probe()
1068 hub->soc = of_device_get_match_data(&pdev->dev); in tegra_display_hub_probe()
1070 hub->clk_disp = devm_clk_get(&pdev->dev, "disp"); in tegra_display_hub_probe()
1071 if (IS_ERR(hub->clk_disp)) { in tegra_display_hub_probe()
1072 err = PTR_ERR(hub->clk_disp); in tegra_display_hub_probe()
1076 if (hub->soc->supports_dsc) { in tegra_display_hub_probe()
1077 hub->clk_dsc = devm_clk_get(&pdev->dev, "dsc"); in tegra_display_hub_probe()
1078 if (IS_ERR(hub->clk_dsc)) { in tegra_display_hub_probe()
1079 err = PTR_ERR(hub->clk_dsc); in tegra_display_hub_probe()
1084 hub->clk_hub = devm_clk_get(&pdev->dev, "hub"); in tegra_display_hub_probe()
1085 if (IS_ERR(hub->clk_hub)) { in tegra_display_hub_probe()
1086 err = PTR_ERR(hub->clk_hub); in tegra_display_hub_probe()
1090 hub->rst = devm_reset_control_get(&pdev->dev, "misc"); in tegra_display_hub_probe()
1091 if (IS_ERR(hub->rst)) { in tegra_display_hub_probe()
1092 err = PTR_ERR(hub->rst); in tegra_display_hub_probe()
1096 hub->wgrps = devm_kcalloc(&pdev->dev, hub->soc->num_wgrps, in tegra_display_hub_probe()
1097 sizeof(*hub->wgrps), GFP_KERNEL); in tegra_display_hub_probe()
1098 if (!hub->wgrps) in tegra_display_hub_probe()
1099 return -ENOMEM; in tegra_display_hub_probe()
1101 for (i = 0; i < hub->soc->num_wgrps; i++) { in tegra_display_hub_probe()
1102 struct tegra_windowgroup *wgrp = &hub->wgrps[i]; in tegra_display_hub_probe()
1106 mutex_init(&wgrp->lock); in tegra_display_hub_probe()
1107 wgrp->usecount = 0; in tegra_display_hub_probe()
1108 wgrp->index = i; in tegra_display_hub_probe()
1110 wgrp->rst = devm_reset_control_get(&pdev->dev, id); in tegra_display_hub_probe()
1111 if (IS_ERR(wgrp->rst)) in tegra_display_hub_probe()
1112 return PTR_ERR(wgrp->rst); in tegra_display_hub_probe()
1114 err = reset_control_assert(wgrp->rst); in tegra_display_hub_probe()
1119 hub->num_heads = of_get_child_count(pdev->dev.of_node); in tegra_display_hub_probe()
1121 hub->clk_heads = devm_kcalloc(&pdev->dev, hub->num_heads, sizeof(clk), in tegra_display_hub_probe()
1123 if (!hub->clk_heads) in tegra_display_hub_probe()
1124 return -ENOMEM; in tegra_display_hub_probe()
1126 for (i = 0; i < hub->num_heads; i++) { in tegra_display_hub_probe()
1127 child = of_get_next_child(pdev->dev.of_node, child); in tegra_display_hub_probe()
1129 dev_err(&pdev->dev, "failed to find node for head %u\n", in tegra_display_hub_probe()
1131 return -ENODEV; in tegra_display_hub_probe()
1134 clk = devm_get_clk_from_child(&pdev->dev, child, "dc"); in tegra_display_hub_probe()
1136 dev_err(&pdev->dev, "failed to get clock for head %u\n", in tegra_display_hub_probe()
1142 hub->clk_heads[i] = clk; in tegra_display_hub_probe()
1148 err = reset_control_assert(hub->rst); in tegra_display_hub_probe()
1153 pm_runtime_enable(&pdev->dev); in tegra_display_hub_probe()
1155 INIT_LIST_HEAD(&hub->client.list); in tegra_display_hub_probe()
1156 hub->client.ops = &tegra_display_hub_ops; in tegra_display_hub_probe()
1157 hub->client.dev = &pdev->dev; in tegra_display_hub_probe()
1159 err = host1x_client_register(&hub->client); in tegra_display_hub_probe()
1161 dev_err(&pdev->dev, "failed to register host1x client: %d\n", in tegra_display_hub_probe()
1164 err = devm_of_platform_populate(&pdev->dev); in tegra_display_hub_probe()
1171 host1x_client_unregister(&hub->client); in tegra_display_hub_probe()
1172 pm_runtime_disable(&pdev->dev); in tegra_display_hub_probe()
1181 host1x_client_unregister(&hub->client); in tegra_display_hub_remove()
1183 for (i = 0; i < hub->soc->num_wgrps; i++) { in tegra_display_hub_remove()
1184 struct tegra_windowgroup *wgrp = &hub->wgrps[i]; in tegra_display_hub_remove()
1186 mutex_destroy(&wgrp->lock); in tegra_display_hub_remove()
1189 pm_runtime_disable(&pdev->dev); in tegra_display_hub_remove()
1204 .compatible = "nvidia,tegra194-display",
1207 .compatible = "nvidia,tegra186-display",
1217 .name = "tegra-display-hub",