30 #include "dsi.h"
103 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi)  in tegra_dsi_get_state()  argument
105 	return to_dsi_state(dsi->output.connector.state);  in tegra_dsi_get_state()
108 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset)  in tegra_dsi_readl()  argument
110 	u32 value = readl(dsi->regs + (offset << 2));  in tegra_dsi_readl()
112 	trace_dsi_readl(dsi->dev, offset, value);  in tegra_dsi_readl()
117 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value,  in tegra_dsi_writel()  argument
120 	trace_dsi_writel(dsi->dev, offset, value);  in tegra_dsi_writel()
121 	writel(value, dsi->regs + (offset << 2));  in tegra_dsi_writel()
203 	struct tegra_dsi *dsi = node->info_ent->data;  in tegra_dsi_show_regs()  local
204 	struct drm_crtc *crtc = dsi->output.encoder.crtc;  in tegra_dsi_show_regs()
220 			   offset, tegra_dsi_readl(dsi, offset));  in tegra_dsi_show_regs()
238 	struct tegra_dsi *dsi = to_dsi(output);  in tegra_dsi_late_register()  local
240 	dsi->debugfs_files = kmemdup(debugfs_files, sizeof(debugfs_files),  in tegra_dsi_late_register()
242 	if (!dsi->debugfs_files)  in tegra_dsi_late_register()
246 		dsi->debugfs_files[i].data = dsi;  in tegra_dsi_late_register()
248 	drm_debugfs_create_files(dsi->debugfs_files, count, root, minor);  in tegra_dsi_late_register()
257 	struct tegra_dsi *dsi = to_dsi(output);  in tegra_dsi_early_unregister()  local
259 	drm_debugfs_remove_files(dsi->debugfs_files, count,  in tegra_dsi_early_unregister()
262 	kfree(dsi->debugfs_files);  in tegra_dsi_early_unregister()
263 	dsi->debugfs_files = NULL;  in tegra_dsi_early_unregister()
359 static void tegra_dsi_set_phy_timing(struct tegra_dsi *dsi,  in tegra_dsi_set_phy_timing()  argument
369 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_0);  in tegra_dsi_set_phy_timing()
375 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_1);  in tegra_dsi_set_phy_timing()
380 	tegra_dsi_writel(dsi, value, DSI_PHY_TIMING_2);  in tegra_dsi_set_phy_timing()
385 	tegra_dsi_writel(dsi, value, DSI_BTA_TIMING);  in tegra_dsi_set_phy_timing()
387 	if (dsi->slave)  in tegra_dsi_set_phy_timing()
388 		tegra_dsi_set_phy_timing(dsi->slave, period, timing);  in tegra_dsi_set_phy_timing()
445 static void tegra_dsi_ganged_enable(struct tegra_dsi *dsi, unsigned int start,  in tegra_dsi_ganged_enable()  argument
450 	tegra_dsi_writel(dsi, start, DSI_GANGED_MODE_START);  in tegra_dsi_ganged_enable()
451 	tegra_dsi_writel(dsi, size << 16 | size, DSI_GANGED_MODE_SIZE);  in tegra_dsi_ganged_enable()
454 	tegra_dsi_writel(dsi, value, DSI_GANGED_MODE_CONTROL);  in tegra_dsi_ganged_enable()
457 static void tegra_dsi_enable(struct tegra_dsi *dsi)  in tegra_dsi_enable()  argument
461 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_enable()
463 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_enable()
465 	if (dsi->slave)  in tegra_dsi_enable()
466 		tegra_dsi_enable(dsi->slave);  in tegra_dsi_enable()
469 static unsigned int tegra_dsi_get_lanes(struct tegra_dsi *dsi)  in tegra_dsi_get_lanes()  argument
471 	if (dsi->master)  in tegra_dsi_get_lanes()
472 		return dsi->master->lanes + dsi->lanes;  in tegra_dsi_get_lanes()
474 	if (dsi->slave)  in tegra_dsi_get_lanes()
475 		return dsi->lanes + dsi->slave->lanes;  in tegra_dsi_get_lanes()
477 	return dsi->lanes;  in tegra_dsi_get_lanes()
480 static void tegra_dsi_configure(struct tegra_dsi *dsi, unsigned int pipe,  in tegra_dsi_configure()  argument
489 	if (dsi->master)  in tegra_dsi_configure()
490 		state = tegra_dsi_get_state(dsi->master);  in tegra_dsi_configure()
492 		state = tegra_dsi_get_state(dsi);  in tegra_dsi_configure()
497 	if (dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {  in tegra_dsi_configure()
500 	} else if (dsi->flags & MIPI_DSI_MODE_VIDEO) {  in tegra_dsi_configure()
510 		DSI_CONTROL_LANES(dsi->lanes - 1) |  in tegra_dsi_configure()
512 	tegra_dsi_writel(dsi, value, DSI_CONTROL);  in tegra_dsi_configure()
514 	tegra_dsi_writel(dsi, dsi->video_fifo_depth, DSI_MAX_THRESHOLD);  in tegra_dsi_configure()
517 	tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);  in tegra_dsi_configure()
519 	value = tegra_dsi_readl(dsi, DSI_CONTROL);  in tegra_dsi_configure()
521 	if (dsi->flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)  in tegra_dsi_configure()
527 	if (dsi->flags & MIPI_DSI_MODE_VIDEO)  in tegra_dsi_configure()
534 	tegra_dsi_writel(dsi, value, DSI_CONTROL);  in tegra_dsi_configure()
537 		tegra_dsi_writel(dsi, pkt_seq[i], DSI_PKT_SEQ_0_LO + i);  in tegra_dsi_configure()
539 	if (dsi->flags & MIPI_DSI_MODE_VIDEO) {  in tegra_dsi_configure()
552 		if (dsi->master || dsi->slave) {  in tegra_dsi_configure()
559 		if ((dsi->flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) == 0)  in tegra_dsi_configure()
567 		tegra_dsi_writel(dsi, hsw << 16 | 0, DSI_PKT_LEN_0_1);  in tegra_dsi_configure()
568 		tegra_dsi_writel(dsi, hact << 16 | hbp, DSI_PKT_LEN_2_3);  in tegra_dsi_configure()
569 		tegra_dsi_writel(dsi, hfp, DSI_PKT_LEN_4_5);  in tegra_dsi_configure()
570 		tegra_dsi_writel(dsi, 0x0f0f << 16, DSI_PKT_LEN_6_7);  in tegra_dsi_configure()
574 		if (dsi->master || dsi->slave) {  in tegra_dsi_configure()
584 		tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_0_1);  in tegra_dsi_configure()
585 		tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_2_3);  in tegra_dsi_configure()
586 		tegra_dsi_writel(dsi, bytes << 16, DSI_PKT_LEN_4_5);  in tegra_dsi_configure()
587 		tegra_dsi_writel(dsi, 0, DSI_PKT_LEN_6_7);  in tegra_dsi_configure()
591 		tegra_dsi_writel(dsi, value, DSI_DCS_CMDS);  in tegra_dsi_configure()
595 	if (dsi->master || dsi->slave) {  in tegra_dsi_configure()
612 	tegra_dsi_writel(dsi, value, DSI_SOL_DELAY);  in tegra_dsi_configure()
614 	if (dsi->slave) {  in tegra_dsi_configure()
615 		tegra_dsi_configure(dsi->slave, pipe, mode);  in tegra_dsi_configure()
621 		tegra_dsi_ganged_enable(dsi, 0, mode->hdisplay / 2);  in tegra_dsi_configure()
622 		tegra_dsi_ganged_enable(dsi->slave, mode->hdisplay / 2,  in tegra_dsi_configure()
627 static int tegra_dsi_wait_idle(struct tegra_dsi *dsi, unsigned long timeout)  in tegra_dsi_wait_idle()  argument
634 		value = tegra_dsi_readl(dsi, DSI_STATUS);  in tegra_dsi_wait_idle()
644 static void tegra_dsi_video_disable(struct tegra_dsi *dsi)  in tegra_dsi_video_disable()  argument
648 	value = tegra_dsi_readl(dsi, DSI_CONTROL);  in tegra_dsi_video_disable()
650 	tegra_dsi_writel(dsi, value, DSI_CONTROL);  in tegra_dsi_video_disable()
652 	if (dsi->slave)  in tegra_dsi_video_disable()
653 		tegra_dsi_video_disable(dsi->slave);  in tegra_dsi_video_disable()
656 static void tegra_dsi_ganged_disable(struct tegra_dsi *dsi)  in tegra_dsi_ganged_disable()  argument
658 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_START);  in tegra_dsi_ganged_disable()
659 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_SIZE);  in tegra_dsi_ganged_disable()
660 	tegra_dsi_writel(dsi, 0, DSI_GANGED_MODE_CONTROL);  in tegra_dsi_ganged_disable()
663 static int tegra_dsi_pad_enable(struct tegra_dsi *dsi)  in tegra_dsi_pad_enable()  argument
668 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_0);  in tegra_dsi_pad_enable()
673 static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi)  in tegra_dsi_pad_calibrate()  argument
682 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_0);  in tegra_dsi_pad_calibrate()
683 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_1);  in tegra_dsi_pad_calibrate()
684 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_2);  in tegra_dsi_pad_calibrate()
685 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_3);  in tegra_dsi_pad_calibrate()
686 	tegra_dsi_writel(dsi, 0, DSI_PAD_CONTROL_4);  in tegra_dsi_pad_calibrate()
689 	tegra_dsi_pad_enable(dsi);  in tegra_dsi_pad_calibrate()
694 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_2);  in tegra_dsi_pad_calibrate()
698 	tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3);  in tegra_dsi_pad_calibrate()
700 	err = tegra_mipi_start_calibration(dsi->mipi);  in tegra_dsi_pad_calibrate()
704 	return tegra_mipi_finish_calibration(dsi->mipi);  in tegra_dsi_pad_calibrate()
707 static void tegra_dsi_set_timeout(struct tegra_dsi *dsi, unsigned long bclk,  in tegra_dsi_set_timeout()  argument
716 	tegra_dsi_writel(dsi, value, DSI_TIMEOUT_0);  in tegra_dsi_set_timeout()
721 	tegra_dsi_writel(dsi, value, DSI_TIMEOUT_1);  in tegra_dsi_set_timeout()
724 	tegra_dsi_writel(dsi, value, DSI_TO_TALLY);  in tegra_dsi_set_timeout()
726 	if (dsi->slave)  in tegra_dsi_set_timeout()
727 		tegra_dsi_set_timeout(dsi->slave, bclk, vrefresh);  in tegra_dsi_set_timeout()
730 static void tegra_dsi_disable(struct tegra_dsi *dsi)  in tegra_dsi_disable()  argument
734 	if (dsi->slave) {  in tegra_dsi_disable()
735 		tegra_dsi_ganged_disable(dsi->slave);  in tegra_dsi_disable()
736 		tegra_dsi_ganged_disable(dsi);  in tegra_dsi_disable()
739 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_disable()
741 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_disable()
743 	if (dsi->slave)  in tegra_dsi_disable()
744 		tegra_dsi_disable(dsi->slave);  in tegra_dsi_disable()
749 static void tegra_dsi_soft_reset(struct tegra_dsi *dsi)  in tegra_dsi_soft_reset()  argument
753 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_soft_reset()
755 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_soft_reset()
759 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_soft_reset()
761 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_soft_reset()
765 	value = tegra_dsi_readl(dsi, DSI_TRIGGER);  in tegra_dsi_soft_reset()
767 		tegra_dsi_writel(dsi, 0, DSI_TRIGGER);  in tegra_dsi_soft_reset()
769 	if (dsi->slave)  in tegra_dsi_soft_reset()
770 		tegra_dsi_soft_reset(dsi->slave);  in tegra_dsi_soft_reset()
827 static void tegra_dsi_unprepare(struct tegra_dsi *dsi)  in tegra_dsi_unprepare()  argument
831 	if (dsi->slave)  in tegra_dsi_unprepare()
832 		tegra_dsi_unprepare(dsi->slave);  in tegra_dsi_unprepare()
834 	err = tegra_mipi_disable(dsi->mipi);  in tegra_dsi_unprepare()
836 		dev_err(dsi->dev, "failed to disable MIPI calibration: %d\n",  in tegra_dsi_unprepare()
839 	err = host1x_client_suspend(&dsi->client);  in tegra_dsi_unprepare()
841 		dev_err(dsi->dev, "failed to suspend: %d\n", err);  in tegra_dsi_unprepare()
848 	struct tegra_dsi *dsi = to_dsi(output);  in tegra_dsi_encoder_disable()  local
855 	tegra_dsi_video_disable(dsi);  in tegra_dsi_encoder_disable()
869 	err = tegra_dsi_wait_idle(dsi, 100);  in tegra_dsi_encoder_disable()
871 		dev_dbg(dsi->dev, "failed to idle DSI: %d\n", err);  in tegra_dsi_encoder_disable()
873 	tegra_dsi_soft_reset(dsi);  in tegra_dsi_encoder_disable()
878 	tegra_dsi_disable(dsi);  in tegra_dsi_encoder_disable()
880 	tegra_dsi_unprepare(dsi);  in tegra_dsi_encoder_disable()
883 static int tegra_dsi_prepare(struct tegra_dsi *dsi)  in tegra_dsi_prepare()  argument
887 	err = host1x_client_resume(&dsi->client);  in tegra_dsi_prepare()
889 		dev_err(dsi->dev, "failed to resume: %d\n", err);  in tegra_dsi_prepare()
893 	err = tegra_mipi_enable(dsi->mipi);  in tegra_dsi_prepare()
895 		dev_err(dsi->dev, "failed to enable MIPI calibration: %d\n",  in tegra_dsi_prepare()
898 	err = tegra_dsi_pad_calibrate(dsi);  in tegra_dsi_prepare()
900 		dev_err(dsi->dev, "MIPI calibration failed: %d\n", err);  in tegra_dsi_prepare()
902 	if (dsi->slave)  in tegra_dsi_prepare()
903 		tegra_dsi_prepare(dsi->slave);  in tegra_dsi_prepare()
913 	struct tegra_dsi *dsi = to_dsi(output);  in tegra_dsi_encoder_enable()  local
918 	err = tegra_dsi_prepare(dsi);  in tegra_dsi_encoder_enable()
920 		dev_err(dsi->dev, "failed to prepare: %d\n", err);  in tegra_dsi_encoder_enable()
924 	state = tegra_dsi_get_state(dsi);  in tegra_dsi_encoder_enable()
926 	tegra_dsi_set_timeout(dsi, state->bclk, state->vrefresh);  in tegra_dsi_encoder_enable()
932 	tegra_dsi_set_phy_timing(dsi, state->period * 8, &state->timing);  in tegra_dsi_encoder_enable()
937 	tegra_dsi_configure(dsi, dc->pipe, mode);  in tegra_dsi_encoder_enable()
946 	/* enable DSI controller */  in tegra_dsi_encoder_enable()
947 	tegra_dsi_enable(dsi);  in tegra_dsi_encoder_enable()
961 	struct tegra_dsi *dsi = to_dsi(output);  in tegra_dsi_encoder_atomic_check()  local
968 	err = tegra_dsi_get_muldiv(dsi->format, &state->mul, &state->div);  in tegra_dsi_encoder_atomic_check()
972 	state->lanes = tegra_dsi_get_lanes(dsi);  in tegra_dsi_encoder_atomic_check()
974 	err = tegra_dsi_get_format(dsi->format, &state->format);  in tegra_dsi_encoder_atomic_check()
1001 		dev_err(dsi->dev, "failed to validate D-PHY timing: %d\n", err);  in tegra_dsi_encoder_atomic_check()
1024 	err = tegra_dc_state_setup_clock(dc, crtc_state, dsi->clk_parent,  in tegra_dsi_encoder_atomic_check()
1043 	struct tegra_dsi *dsi = host1x_client_to_dsi(client);  in tegra_dsi_init()  local
1047 	if (!dsi->master) {  in tegra_dsi_init()
1048 		dsi->output.dev = client->dev;  in tegra_dsi_init()
1050 		drm_connector_init(drm, &dsi->output.connector,  in tegra_dsi_init()
1053 		drm_connector_helper_add(&dsi->output.connector,  in tegra_dsi_init()
1055 		dsi->output.connector.dpms = DRM_MODE_DPMS_OFF;  in tegra_dsi_init()
1057 		drm_simple_encoder_init(drm, &dsi->output.encoder,  in tegra_dsi_init()
1059 		drm_encoder_helper_add(&dsi->output.encoder,  in tegra_dsi_init()
1062 		drm_connector_attach_encoder(&dsi->output.connector,  in tegra_dsi_init()
1063 						  &dsi->output.encoder);  in tegra_dsi_init()
1064 		drm_connector_register(&dsi->output.connector);  in tegra_dsi_init()
1066 		err = tegra_output_init(drm, &dsi->output);  in tegra_dsi_init()
1068 			dev_err(dsi->dev, "failed to initialize output: %d\n",  in tegra_dsi_init()
1071 		dsi->output.encoder.possible_crtcs = 0x3;  in tegra_dsi_init()
1079 	struct tegra_dsi *dsi = host1x_client_to_dsi(client);  in tegra_dsi_exit()  local
1081 	tegra_output_exit(&dsi->output);  in tegra_dsi_exit()
1088 	struct tegra_dsi *dsi = host1x_client_to_dsi(client);  in tegra_dsi_runtime_suspend()  local
1092 	if (dsi->rst) {  in tegra_dsi_runtime_suspend()
1093 		err = reset_control_assert(dsi->rst);  in tegra_dsi_runtime_suspend()
1102 	clk_disable_unprepare(dsi->clk_lp);  in tegra_dsi_runtime_suspend()
1103 	clk_disable_unprepare(dsi->clk);  in tegra_dsi_runtime_suspend()
1105 	regulator_disable(dsi->vdd);  in tegra_dsi_runtime_suspend()
1113 	struct tegra_dsi *dsi = host1x_client_to_dsi(client);  in tegra_dsi_runtime_resume()  local
1123 	err = regulator_enable(dsi->vdd);  in tegra_dsi_runtime_resume()
1129 	err = clk_prepare_enable(dsi->clk);  in tegra_dsi_runtime_resume()
1131 		dev_err(dev, "cannot enable DSI clock: %d\n", err);  in tegra_dsi_runtime_resume()
1135 	err = clk_prepare_enable(dsi->clk_lp);  in tegra_dsi_runtime_resume()
1143 	if (dsi->rst) {  in tegra_dsi_runtime_resume()
1144 		err = reset_control_deassert(dsi->rst);  in tegra_dsi_runtime_resume()
1154 	clk_disable_unprepare(dsi->clk_lp);  in tegra_dsi_runtime_resume()
1156 	clk_disable_unprepare(dsi->clk);  in tegra_dsi_runtime_resume()
1158 	regulator_disable(dsi->vdd);  in tegra_dsi_runtime_resume()
1171 static int tegra_dsi_setup_clocks(struct tegra_dsi *dsi)  in tegra_dsi_setup_clocks()  argument
1176 	parent = clk_get_parent(dsi->clk);  in tegra_dsi_setup_clocks()
1180 	err = clk_set_parent(parent, dsi->clk_parent);  in tegra_dsi_setup_clocks()
1199 	"DSI Data Type Not Recognized",
1200 	"DSI VC ID Invalid",
1203 	"DSI Protocol Violation",
1206 static ssize_t tegra_dsi_read_response(struct tegra_dsi *dsi,  in tegra_dsi_read_response()  argument
1217 	value = tegra_dsi_readl(dsi, DSI_RD_DATA);  in tegra_dsi_read_response()
1222 		dev_dbg(dsi->dev, "Acknowledge and error report: %04x\n",  in tegra_dsi_read_response()
1226 				dev_dbg(dsi->dev, "  %2u: %s\n", i,  in tegra_dsi_read_response()
1250 		dev_err(dsi->dev, "unhandled response type: %02x\n",  in tegra_dsi_read_response()
1261 			value = tegra_dsi_readl(dsi, DSI_RD_DATA);  in tegra_dsi_read_response()
1271 static int tegra_dsi_transmit(struct tegra_dsi *dsi, unsigned long timeout)  in tegra_dsi_transmit()  argument
1273 	tegra_dsi_writel(dsi, DSI_TRIGGER_HOST, DSI_TRIGGER);  in tegra_dsi_transmit()
1278 		u32 value = tegra_dsi_readl(dsi, DSI_TRIGGER);  in tegra_dsi_transmit()
1289 static int tegra_dsi_wait_for_response(struct tegra_dsi *dsi,  in tegra_dsi_wait_for_response()  argument
1295 		u32 value = tegra_dsi_readl(dsi, DSI_STATUS);  in tegra_dsi_wait_for_response()
1308 static void tegra_dsi_writesl(struct tegra_dsi *dsi, unsigned long offset,  in tegra_dsi_writesl()  argument
1321 		tegra_dsi_writel(dsi, value, DSI_WR_DATA);  in tegra_dsi_writesl()
1328 	struct tegra_dsi *dsi = host_to_tegra(host);  in tegra_dsi_host_transfer()  local
1342 	if (packet.size > dsi->video_fifo_depth * 4)  in tegra_dsi_host_transfer()
1346 	value = tegra_dsi_readl(dsi, DSI_STATUS);  in tegra_dsi_host_transfer()
1349 		tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);  in tegra_dsi_host_transfer()
1353 	value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL);  in tegra_dsi_host_transfer()
1355 	tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL);  in tegra_dsi_host_transfer()
1369 	if (packet.size > dsi->host_fifo_depth * 4)  in tegra_dsi_host_transfer()
1372 	tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);  in tegra_dsi_host_transfer()
1380 		value = tegra_dsi_readl(dsi, DSI_HOST_CONTROL);  in tegra_dsi_host_transfer()
1382 		tegra_dsi_writel(dsi, value, DSI_HOST_CONTROL);  in tegra_dsi_host_transfer()
1386 	tegra_dsi_writel(dsi, value, DSI_CONTROL);  in tegra_dsi_host_transfer()
1390 	tegra_dsi_writel(dsi, value, DSI_WR_DATA);  in tegra_dsi_host_transfer()
1394 		tegra_dsi_writesl(dsi, DSI_WR_DATA, packet.payload,  in tegra_dsi_host_transfer()
1397 	err = tegra_dsi_transmit(dsi, 250);  in tegra_dsi_host_transfer()
1403 		err = tegra_dsi_wait_for_response(dsi, 250);  in tegra_dsi_host_transfer()
1409 		value = tegra_dsi_readl(dsi, DSI_RD_DATA);  in tegra_dsi_host_transfer()
1413 			dev_dbg(dsi->dev, "ACK\n");  in tegra_dsi_host_transfer()
1419 			dev_dbg(dsi->dev, "ESCAPE\n");  in tegra_dsi_host_transfer()
1424 			dev_err(dsi->dev, "unknown status: %08x\n", value);  in tegra_dsi_host_transfer()
1429 			err = tegra_dsi_read_response(dsi, msg, count);  in tegra_dsi_host_transfer()
1431 				dev_err(dsi->dev,  in tegra_dsi_host_transfer()
1453 static int tegra_dsi_ganged_setup(struct tegra_dsi *dsi)  in tegra_dsi_ganged_setup()  argument
1458 	/* make sure both DSI controllers share the same PLL */  in tegra_dsi_ganged_setup()
1459 	parent = clk_get_parent(dsi->slave->clk);  in tegra_dsi_ganged_setup()
1463 	err = clk_set_parent(parent, dsi->clk_parent);  in tegra_dsi_ganged_setup()
1473 	struct tegra_dsi *dsi = host_to_tegra(host);  in tegra_dsi_host_attach()  local
1475 	dsi->flags = device->mode_flags;  in tegra_dsi_host_attach()
1476 	dsi->format = device->format;  in tegra_dsi_host_attach()
1477 	dsi->lanes = device->lanes;  in tegra_dsi_host_attach()
1479 	if (dsi->slave) {  in tegra_dsi_host_attach()
1482 		dev_dbg(dsi->dev, "attaching dual-channel device %s\n",  in tegra_dsi_host_attach()
1485 		err = tegra_dsi_ganged_setup(dsi);  in tegra_dsi_host_attach()
1487 			dev_err(dsi->dev, "failed to set up ganged mode: %d\n",  in tegra_dsi_host_attach()
1497 	if (!dsi->master) {  in tegra_dsi_host_attach()
1498 		struct tegra_output *output = &dsi->output;  in tegra_dsi_host_attach()
1514 	struct tegra_dsi *dsi = host_to_tegra(host);  in tegra_dsi_host_detach()  local
1515 	struct tegra_output *output = &dsi->output;  in tegra_dsi_host_detach()
1533 static int tegra_dsi_ganged_probe(struct tegra_dsi *dsi)  in tegra_dsi_ganged_probe()  argument
1537 	np = of_parse_phandle(dsi->dev->of_node, "nvidia,ganged-mode", 0);  in tegra_dsi_ganged_probe()
1544 		dsi->slave = platform_get_drvdata(gangster);  in tegra_dsi_ganged_probe()
1546 		if (!dsi->slave) {  in tegra_dsi_ganged_probe()
1551 		dsi->slave->master = dsi;  in tegra_dsi_ganged_probe()
1559 	struct tegra_dsi *dsi;  in tegra_dsi_probe()  local
1562 	dsi = devm_kzalloc(&pdev->dev, sizeof(*dsi), GFP_KERNEL);  in tegra_dsi_probe()
1563 	if (!dsi)  in tegra_dsi_probe()
1566 	dsi->output.dev = dsi->dev = &pdev->dev;  in tegra_dsi_probe()
1567 	dsi->video_fifo_depth = 1920;  in tegra_dsi_probe()
1568 	dsi->host_fifo_depth = 64;  in tegra_dsi_probe()
1570 	err = tegra_dsi_ganged_probe(dsi);  in tegra_dsi_probe()
1574 	err = tegra_output_probe(&dsi->output);  in tegra_dsi_probe()
1578 	dsi->output.connector.polled = DRM_CONNECTOR_POLL_HPD;  in tegra_dsi_probe()
1581 	 * Assume these values by default. When a DSI peripheral driver  in tegra_dsi_probe()
1582 	 * attaches to the DSI host, the parameters will be taken from  in tegra_dsi_probe()
1585 	dsi->flags = MIPI_DSI_MODE_VIDEO;  in tegra_dsi_probe()
1586 	dsi->format = MIPI_DSI_FMT_RGB888;  in tegra_dsi_probe()
1587 	dsi->lanes = 4;  in tegra_dsi_probe()
1590 		dsi->rst = devm_reset_control_get(&pdev->dev, "dsi");  in tegra_dsi_probe()
1591 		if (IS_ERR(dsi->rst)) {  in tegra_dsi_probe()
1592 			err = PTR_ERR(dsi->rst);  in tegra_dsi_probe()
1597 	dsi->clk = devm_clk_get(&pdev->dev, NULL);  in tegra_dsi_probe()
1598 	if (IS_ERR(dsi->clk)) {  in tegra_dsi_probe()
1599 		err = dev_err_probe(&pdev->dev, PTR_ERR(dsi->clk),  in tegra_dsi_probe()
1600 				    "cannot get DSI clock\n");  in tegra_dsi_probe()
1604 	dsi->clk_lp = devm_clk_get(&pdev->dev, "lp");  in tegra_dsi_probe()
1605 	if (IS_ERR(dsi->clk_lp)) {  in tegra_dsi_probe()
1606 		err = dev_err_probe(&pdev->dev, PTR_ERR(dsi->clk_lp),  in tegra_dsi_probe()
1611 	dsi->clk_parent = devm_clk_get(&pdev->dev, "parent");  in tegra_dsi_probe()
1612 	if (IS_ERR(dsi->clk_parent)) {  in tegra_dsi_probe()
1613 		err = dev_err_probe(&pdev->dev, PTR_ERR(dsi->clk_parent),  in tegra_dsi_probe()
1618 	dsi->vdd = devm_regulator_get(&pdev->dev, "avdd-dsi-csi");  in tegra_dsi_probe()
1619 	if (IS_ERR(dsi->vdd)) {  in tegra_dsi_probe()
1620 		err = dev_err_probe(&pdev->dev, PTR_ERR(dsi->vdd),  in tegra_dsi_probe()
1625 	err = tegra_dsi_setup_clocks(dsi);  in tegra_dsi_probe()
1631 	dsi->regs = devm_platform_ioremap_resource(pdev, 0);  in tegra_dsi_probe()
1632 	if (IS_ERR(dsi->regs)) {  in tegra_dsi_probe()
1633 		err = PTR_ERR(dsi->regs);  in tegra_dsi_probe()
1637 	dsi->mipi = tegra_mipi_request(&pdev->dev, pdev->dev.of_node);  in tegra_dsi_probe()
1638 	if (IS_ERR(dsi->mipi)) {  in tegra_dsi_probe()
1639 		err = PTR_ERR(dsi->mipi);  in tegra_dsi_probe()
1643 	dsi->host.ops = &tegra_dsi_host_ops;  in tegra_dsi_probe()
1644 	dsi->host.dev = &pdev->dev;  in tegra_dsi_probe()
1646 	err = mipi_dsi_host_register(&dsi->host);  in tegra_dsi_probe()
1648 		dev_err(&pdev->dev, "failed to register DSI host: %d\n", err);  in tegra_dsi_probe()
1652 	platform_set_drvdata(pdev, dsi);  in tegra_dsi_probe()
1655 	INIT_LIST_HEAD(&dsi->client.list);  in tegra_dsi_probe()
1656 	dsi->client.ops = &dsi_client_ops;  in tegra_dsi_probe()
1657 	dsi->client.dev = &pdev->dev;  in tegra_dsi_probe()
1659 	err = host1x_client_register(&dsi->client);  in tegra_dsi_probe()
1670 	mipi_dsi_host_unregister(&dsi->host);  in tegra_dsi_probe()
1672 	tegra_mipi_free(dsi->mipi);  in tegra_dsi_probe()
1674 	tegra_output_remove(&dsi->output);  in tegra_dsi_probe()
1680 	struct tegra_dsi *dsi = platform_get_drvdata(pdev);  in tegra_dsi_remove()  local
1684 	host1x_client_unregister(&dsi->client);  in tegra_dsi_remove()
1686 	tegra_output_remove(&dsi->output);  in tegra_dsi_remove()
1688 	mipi_dsi_host_unregister(&dsi->host);  in tegra_dsi_remove()
1689 	tegra_mipi_free(dsi->mipi);  in tegra_dsi_remove()
1693 	{ .compatible = "nvidia,tegra210-dsi", },
1694 	{ .compatible = "nvidia,tegra132-dsi", },
1695 	{ .compatible = "nvidia,tegra124-dsi", },
1696 	{ .compatible = "nvidia,tegra114-dsi", },
1703 		.name = "tegra-dsi",