Lines Matching +full:tegra124 +full:- +full:hdmi
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
28 #include <asm/dma-iommu.h>
77 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail()
78 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail()
80 if (tegra->hub) { in tegra_atomic_commit_tail()
109 return -ENOMEM; in tegra_drm_open()
111 idr_init_base(&fpriv->legacy_contexts, 1); in tegra_drm_open()
112 xa_init_flags(&fpriv->contexts, XA_FLAGS_ALLOC1); in tegra_drm_open()
113 xa_init(&fpriv->syncpoints); in tegra_drm_open()
114 mutex_init(&fpriv->lock); in tegra_drm_open()
115 filp->driver_priv = fpriv; in tegra_drm_open()
122 context->client->ops->close_channel(context); in tegra_drm_context_free()
123 pm_runtime_put(context->client->base.dev); in tegra_drm_context_free()
135 err = get_user(cmdbuf, &src->cmdbuf.handle); in host1x_reloc_copy_from_user()
139 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset); in host1x_reloc_copy_from_user()
143 err = get_user(target, &src->target.handle); in host1x_reloc_copy_from_user()
147 err = get_user(dest->target.offset, &src->target.offset); in host1x_reloc_copy_from_user()
151 err = get_user(dest->shift, &src->shift); in host1x_reloc_copy_from_user()
155 dest->flags = HOST1X_RELOC_READ | HOST1X_RELOC_WRITE; in host1x_reloc_copy_from_user()
157 dest->cmdbuf.bo = tegra_gem_lookup(file, cmdbuf); in host1x_reloc_copy_from_user()
158 if (!dest->cmdbuf.bo) in host1x_reloc_copy_from_user()
159 return -ENOENT; in host1x_reloc_copy_from_user()
161 dest->target.bo = tegra_gem_lookup(file, target); in host1x_reloc_copy_from_user()
162 if (!dest->target.bo) in host1x_reloc_copy_from_user()
163 return -ENOENT; in host1x_reloc_copy_from_user()
172 struct host1x_client *client = &context->client->base; in tegra_drm_submit()
173 unsigned int num_cmdbufs = args->num_cmdbufs; in tegra_drm_submit()
174 unsigned int num_relocs = args->num_relocs; in tegra_drm_submit()
179 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); in tegra_drm_submit()
186 user_cmdbufs = u64_to_user_ptr(args->cmdbufs); in tegra_drm_submit()
187 user_relocs = u64_to_user_ptr(args->relocs); in tegra_drm_submit()
188 user_syncpt = u64_to_user_ptr(args->syncpts); in tegra_drm_submit()
191 if (args->num_syncpts != 1) in tegra_drm_submit()
192 return -EINVAL; in tegra_drm_submit()
195 if (args->num_waitchks != 0) in tegra_drm_submit()
196 return -EINVAL; in tegra_drm_submit()
198 job = host1x_job_alloc(context->channel, args->num_cmdbufs, in tegra_drm_submit()
199 args->num_relocs, false); in tegra_drm_submit()
201 return -ENOMEM; in tegra_drm_submit()
203 job->num_relocs = args->num_relocs; in tegra_drm_submit()
204 job->client = client; in tegra_drm_submit()
205 job->class = client->class; in tegra_drm_submit()
206 job->serialize = true; in tegra_drm_submit()
207 job->syncpt_recovery = true; in tegra_drm_submit()
217 err = -ENOMEM; in tegra_drm_submit()
231 err = -EFAULT; in tegra_drm_submit()
240 err = -EINVAL; in tegra_drm_submit()
246 err = -ENOENT; in tegra_drm_submit()
252 refs[num_refs++] = &obj->gem; in tegra_drm_submit()
255 * Gather buffer base address must be 4-bytes aligned, in tegra_drm_submit()
259 if (offset & 3 || offset > obj->gem.size) { in tegra_drm_submit()
260 err = -EINVAL; in tegra_drm_submit()
265 num_cmdbufs--; in tegra_drm_submit()
270 while (num_relocs--) { in tegra_drm_submit()
274 err = host1x_reloc_copy_from_user(&job->relocs[num_relocs], in tegra_drm_submit()
280 reloc = &job->relocs[num_relocs]; in tegra_drm_submit()
281 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo); in tegra_drm_submit()
282 refs[num_refs++] = &obj->gem; in tegra_drm_submit()
289 if (reloc->cmdbuf.offset & 3 || in tegra_drm_submit()
290 reloc->cmdbuf.offset >= obj->gem.size) { in tegra_drm_submit()
291 err = -EINVAL; in tegra_drm_submit()
295 obj = host1x_to_tegra_bo(reloc->target.bo); in tegra_drm_submit()
296 refs[num_refs++] = &obj->gem; in tegra_drm_submit()
298 if (reloc->target.offset >= obj->gem.size) { in tegra_drm_submit()
299 err = -EINVAL; in tegra_drm_submit()
305 err = -EFAULT; in tegra_drm_submit()
312 err = -ENOENT; in tegra_drm_submit()
316 job->is_addr_reg = context->client->ops->is_addr_reg; in tegra_drm_submit()
317 job->is_valid_class = context->client->ops->is_valid_class; in tegra_drm_submit()
318 job->syncpt_incrs = syncpt.incrs; in tegra_drm_submit()
319 job->syncpt = sp; in tegra_drm_submit()
320 job->timeout = 10000; in tegra_drm_submit()
322 if (args->timeout && args->timeout < 10000) in tegra_drm_submit()
323 job->timeout = args->timeout; in tegra_drm_submit()
325 err = host1x_job_pin(job, context->client->base.dev); in tegra_drm_submit()
335 args->fence = job->syncpt_end; in tegra_drm_submit()
338 while (num_refs--) in tegra_drm_submit()
356 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags, in tegra_gem_create()
357 &args->handle); in tegra_gem_create()
371 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_mmap()
373 return -EINVAL; in tegra_gem_mmap()
377 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node); in tegra_gem_mmap()
387 struct host1x *host = dev_get_drvdata(drm->dev->parent); in tegra_syncpt_read()
391 sp = host1x_syncpt_get_by_id_noref(host, args->id); in tegra_syncpt_read()
393 return -EINVAL; in tegra_syncpt_read()
395 args->value = host1x_syncpt_read_min(sp); in tegra_syncpt_read()
402 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); in tegra_syncpt_incr()
406 sp = host1x_syncpt_get_by_id_noref(host1x, args->id); in tegra_syncpt_incr()
408 return -EINVAL; in tegra_syncpt_incr()
416 struct host1x *host1x = dev_get_drvdata(drm->dev->parent); in tegra_syncpt_wait()
420 sp = host1x_syncpt_get_by_id_noref(host1x, args->id); in tegra_syncpt_wait()
422 return -EINVAL; in tegra_syncpt_wait()
424 return host1x_syncpt_wait(sp, args->thresh, in tegra_syncpt_wait()
425 msecs_to_jiffies(args->timeout), in tegra_syncpt_wait()
426 &args->value); in tegra_syncpt_wait()
435 err = pm_runtime_resume_and_get(client->base.dev); in tegra_client_open()
439 err = client->ops->open_channel(client, context); in tegra_client_open()
441 pm_runtime_put(client->base.dev); in tegra_client_open()
445 err = idr_alloc(&fpriv->legacy_contexts, context, 1, 0, GFP_KERNEL); in tegra_client_open()
447 client->ops->close_channel(context); in tegra_client_open()
448 pm_runtime_put(client->base.dev); in tegra_client_open()
452 context->client = client; in tegra_client_open()
453 context->id = err; in tegra_client_open()
461 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_open_channel()
462 struct tegra_drm *tegra = drm->dev_private; in tegra_open_channel()
466 int err = -ENODEV; in tegra_open_channel()
470 return -ENOMEM; in tegra_open_channel()
472 mutex_lock(&fpriv->lock); in tegra_open_channel()
474 list_for_each_entry(client, &tegra->clients, list) in tegra_open_channel()
475 if (client->base.class == args->client) { in tegra_open_channel()
480 args->context = context->id; in tegra_open_channel()
487 mutex_unlock(&fpriv->lock); in tegra_open_channel()
494 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_close_channel()
499 mutex_lock(&fpriv->lock); in tegra_close_channel()
501 context = idr_find(&fpriv->legacy_contexts, args->context); in tegra_close_channel()
503 err = -EINVAL; in tegra_close_channel()
507 idr_remove(&fpriv->legacy_contexts, context->id); in tegra_close_channel()
511 mutex_unlock(&fpriv->lock); in tegra_close_channel()
518 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_get_syncpt()
524 mutex_lock(&fpriv->lock); in tegra_get_syncpt()
526 context = idr_find(&fpriv->legacy_contexts, args->context); in tegra_get_syncpt()
528 err = -ENODEV; in tegra_get_syncpt()
532 if (args->index >= context->client->base.num_syncpts) { in tegra_get_syncpt()
533 err = -EINVAL; in tegra_get_syncpt()
537 syncpt = context->client->base.syncpts[args->index]; in tegra_get_syncpt()
538 args->id = host1x_syncpt_id(syncpt); in tegra_get_syncpt()
541 mutex_unlock(&fpriv->lock); in tegra_get_syncpt()
548 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_submit()
553 mutex_lock(&fpriv->lock); in tegra_submit()
555 context = idr_find(&fpriv->legacy_contexts, args->context); in tegra_submit()
557 err = -ENODEV; in tegra_submit()
561 err = context->client->ops->submit(context, args, drm, file); in tegra_submit()
564 mutex_unlock(&fpriv->lock); in tegra_submit()
571 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_get_syncpt_base()
578 mutex_lock(&fpriv->lock); in tegra_get_syncpt_base()
580 context = idr_find(&fpriv->legacy_contexts, args->context); in tegra_get_syncpt_base()
582 err = -ENODEV; in tegra_get_syncpt_base()
586 if (args->syncpt >= context->client->base.num_syncpts) { in tegra_get_syncpt_base()
587 err = -EINVAL; in tegra_get_syncpt_base()
591 syncpt = context->client->base.syncpts[args->syncpt]; in tegra_get_syncpt_base()
595 err = -ENXIO; in tegra_get_syncpt_base()
599 args->id = host1x_syncpt_base_id(base); in tegra_get_syncpt_base()
602 mutex_unlock(&fpriv->lock); in tegra_get_syncpt_base()
615 switch (args->mode) { in tegra_gem_set_tiling()
619 if (args->value != 0) in tegra_gem_set_tiling()
620 return -EINVAL; in tegra_gem_set_tiling()
627 if (args->value != 0) in tegra_gem_set_tiling()
628 return -EINVAL; in tegra_gem_set_tiling()
635 if (args->value > 5) in tegra_gem_set_tiling()
636 return -EINVAL; in tegra_gem_set_tiling()
638 value = args->value; in tegra_gem_set_tiling()
642 return -EINVAL; in tegra_gem_set_tiling()
645 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_set_tiling()
647 return -ENOENT; in tegra_gem_set_tiling()
651 bo->tiling.mode = mode; in tegra_gem_set_tiling()
652 bo->tiling.value = value; in tegra_gem_set_tiling()
667 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_get_tiling()
669 return -ENOENT; in tegra_gem_get_tiling()
673 switch (bo->tiling.mode) { in tegra_gem_get_tiling()
675 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH; in tegra_gem_get_tiling()
676 args->value = 0; in tegra_gem_get_tiling()
680 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED; in tegra_gem_get_tiling()
681 args->value = 0; in tegra_gem_get_tiling()
685 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK; in tegra_gem_get_tiling()
686 args->value = bo->tiling.value; in tegra_gem_get_tiling()
690 err = -EINVAL; in tegra_gem_get_tiling()
706 if (args->flags & ~DRM_TEGRA_GEM_FLAGS) in tegra_gem_set_flags()
707 return -EINVAL; in tegra_gem_set_flags()
709 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_set_flags()
711 return -ENOENT; in tegra_gem_set_flags()
714 bo->flags = 0; in tegra_gem_set_flags()
716 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP) in tegra_gem_set_flags()
717 bo->flags |= TEGRA_BO_BOTTOM_UP; in tegra_gem_set_flags()
731 gem = drm_gem_object_lookup(file, args->handle); in tegra_gem_get_flags()
733 return -ENOENT; in tegra_gem_get_flags()
736 args->flags = 0; in tegra_gem_get_flags()
738 if (bo->flags & TEGRA_BO_BOTTOM_UP) in tegra_gem_get_flags()
739 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP; in tegra_gem_get_flags()
819 struct tegra_drm_file *fpriv = file->driver_priv; in tegra_drm_postclose()
821 mutex_lock(&fpriv->lock); in tegra_drm_postclose()
822 idr_for_each(&fpriv->legacy_contexts, tegra_drm_context_cleanup, NULL); in tegra_drm_postclose()
824 mutex_unlock(&fpriv->lock); in tegra_drm_postclose()
826 idr_destroy(&fpriv->legacy_contexts); in tegra_drm_postclose()
827 mutex_destroy(&fpriv->lock); in tegra_drm_postclose()
834 struct drm_info_node *node = (struct drm_info_node *)s->private; in tegra_debugfs_framebuffers()
835 struct drm_device *drm = node->minor->dev; in tegra_debugfs_framebuffers()
838 mutex_lock(&drm->mode_config.fb_lock); in tegra_debugfs_framebuffers()
840 list_for_each_entry(fb, &drm->mode_config.fb_list, head) { in tegra_debugfs_framebuffers()
842 fb->base.id, fb->width, fb->height, in tegra_debugfs_framebuffers()
843 fb->format->depth, in tegra_debugfs_framebuffers()
844 fb->format->cpp[0] * 8, in tegra_debugfs_framebuffers()
848 mutex_unlock(&drm->mode_config.fb_lock); in tegra_debugfs_framebuffers()
855 struct drm_info_node *node = (struct drm_info_node *)s->private; in tegra_debugfs_iova()
856 struct drm_device *drm = node->minor->dev; in tegra_debugfs_iova()
857 struct tegra_drm *tegra = drm->dev_private; in tegra_debugfs_iova()
860 if (tegra->domain) { in tegra_debugfs_iova()
861 mutex_lock(&tegra->mm_lock); in tegra_debugfs_iova()
862 drm_mm_print(&tegra->mm, &p); in tegra_debugfs_iova()
863 mutex_unlock(&tegra->mm_lock); in tegra_debugfs_iova()
878 minor->debugfs_root, minor); in tegra_debugfs_init()
917 client->shared_channel = host1x_channel_request(&client->base); in tegra_drm_register_client()
918 if (!client->shared_channel) in tegra_drm_register_client()
919 return -EBUSY; in tegra_drm_register_client()
921 mutex_lock(&tegra->clients_lock); in tegra_drm_register_client()
922 list_add_tail(&client->list, &tegra->clients); in tegra_drm_register_client()
923 client->drm = tegra; in tegra_drm_register_client()
924 mutex_unlock(&tegra->clients_lock); in tegra_drm_register_client()
932 mutex_lock(&tegra->clients_lock); in tegra_drm_unregister_client()
933 list_del_init(&client->list); in tegra_drm_unregister_client()
934 client->drm = NULL; in tegra_drm_unregister_client()
935 mutex_unlock(&tegra->clients_lock); in tegra_drm_unregister_client()
937 if (client->shared_channel) in tegra_drm_unregister_client()
938 host1x_channel_put(client->shared_channel); in tegra_drm_unregister_client()
945 struct iommu_domain *domain = iommu_get_domain_for_dev(client->dev); in host1x_client_iommu_attach()
946 struct drm_device *drm = dev_get_drvdata(client->host); in host1x_client_iommu_attach()
947 struct tegra_drm *tegra = drm->dev_private; in host1x_client_iommu_attach()
952 if (client->dev->archdata.mapping) { in host1x_client_iommu_attach()
954 to_dma_iommu_mapping(client->dev); in host1x_client_iommu_attach()
955 arm_iommu_detach_device(client->dev); in host1x_client_iommu_attach()
958 domain = iommu_get_domain_for_dev(client->dev); in host1x_client_iommu_attach()
965 * domain. This allows using the IOMMU-backed DMA API. in host1x_client_iommu_attach()
967 if (domain && domain->type != IOMMU_DOMAIN_IDENTITY && in host1x_client_iommu_attach()
968 domain != tegra->domain) in host1x_client_iommu_attach()
971 if (tegra->domain) { in host1x_client_iommu_attach()
972 group = iommu_group_get(client->dev); in host1x_client_iommu_attach()
974 return -ENODEV; in host1x_client_iommu_attach()
976 if (domain != tegra->domain) { in host1x_client_iommu_attach()
977 err = iommu_attach_group(tegra->domain, group); in host1x_client_iommu_attach()
984 tegra->use_explicit_iommu = true; in host1x_client_iommu_attach()
987 client->group = group; in host1x_client_iommu_attach()
994 struct drm_device *drm = dev_get_drvdata(client->host); in host1x_client_iommu_detach()
995 struct tegra_drm *tegra = drm->dev_private; in host1x_client_iommu_detach()
998 if (client->group) { in host1x_client_iommu_detach()
1004 domain = iommu_get_domain_for_dev(client->dev); in host1x_client_iommu_detach()
1006 iommu_detach_group(tegra->domain, client->group); in host1x_client_iommu_detach()
1008 iommu_group_put(client->group); in host1x_client_iommu_detach()
1009 client->group = NULL; in host1x_client_iommu_detach()
1020 if (tegra->domain) in tegra_drm_alloc()
1021 size = iova_align(&tegra->carveout.domain, size); in tegra_drm_alloc()
1026 if (!tegra->domain) { in tegra_drm_alloc()
1028 * Many units only support 32-bit addresses, even on 64-bit in tegra_drm_alloc()
1029 * SoCs. If there is no IOMMU to translate into a 32-bit IO in tegra_drm_alloc()
1031 * lower 32-bit range. in tegra_drm_alloc()
1038 return ERR_PTR(-ENOMEM); in tegra_drm_alloc()
1040 if (!tegra->domain) { in tegra_drm_alloc()
1049 alloc = alloc_iova(&tegra->carveout.domain, in tegra_drm_alloc()
1050 size >> tegra->carveout.shift, in tegra_drm_alloc()
1051 tegra->carveout.limit, true); in tegra_drm_alloc()
1053 err = -EBUSY; in tegra_drm_alloc()
1057 *dma = iova_dma_addr(&tegra->carveout.domain, alloc); in tegra_drm_alloc()
1058 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt), in tegra_drm_alloc()
1066 __free_iova(&tegra->carveout.domain, alloc); in tegra_drm_alloc()
1076 if (tegra->domain) in tegra_drm_free()
1077 size = iova_align(&tegra->carveout.domain, size); in tegra_drm_free()
1081 if (tegra->domain) { in tegra_drm_free()
1082 iommu_unmap(tegra->domain, dma, size); in tegra_drm_free()
1083 free_iova(&tegra->carveout.domain, in tegra_drm_free()
1084 iova_pfn(&tegra->carveout.domain, dma)); in tegra_drm_free()
1092 struct host1x *host1x = dev_get_drvdata(dev->dev.parent); in host1x_drm_wants_iommu()
1101 * likely to be allocated beyond the 32-bit boundary if sufficient in host1x_drm_wants_iommu()
1106 * 32-bit boundary. in host1x_drm_wants_iommu()
1126 domain = iommu_get_domain_for_dev(dev->dev.parent); in host1x_drm_wants_iommu()
1130 * 32-bit boundary, so the regular GATHER opcodes will always be in host1x_drm_wants_iommu()
1142 struct device *dma_dev = dev->dev.parent; in host1x_drm_probe()
1147 drm = drm_dev_alloc(&tegra_drm_driver, &dev->dev); in host1x_drm_probe()
1153 err = -ENOMEM; in host1x_drm_probe()
1158 tegra->domain = iommu_paging_domain_alloc(dma_dev); in host1x_drm_probe()
1159 if (IS_ERR(tegra->domain)) { in host1x_drm_probe()
1160 err = PTR_ERR(tegra->domain); in host1x_drm_probe()
1169 mutex_init(&tegra->clients_lock); in host1x_drm_probe()
1170 INIT_LIST_HEAD(&tegra->clients); in host1x_drm_probe()
1172 dev_set_drvdata(&dev->dev, drm); in host1x_drm_probe()
1173 drm->dev_private = tegra; in host1x_drm_probe()
1174 tegra->drm = drm; in host1x_drm_probe()
1178 drm->mode_config.min_width = 0; in host1x_drm_probe()
1179 drm->mode_config.min_height = 0; in host1x_drm_probe()
1180 drm->mode_config.max_width = 0; in host1x_drm_probe()
1181 drm->mode_config.max_height = 0; in host1x_drm_probe()
1183 drm->mode_config.normalize_zpos = true; in host1x_drm_probe()
1185 drm->mode_config.funcs = &tegra_drm_mode_config_funcs; in host1x_drm_probe()
1186 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers; in host1x_drm_probe()
1199 tegra->hmask = drm->mode_config.max_width - 1; in host1x_drm_probe()
1200 tegra->vmask = drm->mode_config.max_height - 1; in host1x_drm_probe()
1202 if (tegra->use_explicit_iommu) { in host1x_drm_probe()
1204 u64 dma_mask = dma_get_mask(&dev->dev); in host1x_drm_probe()
1208 start = tegra->domain->geometry.aperture_start & dma_mask; in host1x_drm_probe()
1209 end = tegra->domain->geometry.aperture_end & dma_mask; in host1x_drm_probe()
1212 gem_end = end - CARVEOUT_SZ; in host1x_drm_probe()
1216 order = __ffs(tegra->domain->pgsize_bitmap); in host1x_drm_probe()
1217 init_iova_domain(&tegra->carveout.domain, 1UL << order, in host1x_drm_probe()
1220 tegra->carveout.shift = iova_shift(&tegra->carveout.domain); in host1x_drm_probe()
1221 tegra->carveout.limit = carveout_end >> tegra->carveout.shift; in host1x_drm_probe()
1223 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1); in host1x_drm_probe()
1224 mutex_init(&tegra->mm_lock); in host1x_drm_probe()
1227 DRM_DEBUG_DRIVER(" GEM: %#llx-%#llx\n", gem_start, gem_end); in host1x_drm_probe()
1228 DRM_DEBUG_DRIVER(" Carveout: %#llx-%#llx\n", carveout_start, in host1x_drm_probe()
1230 } else if (tegra->domain) { in host1x_drm_probe()
1231 iommu_domain_free(tegra->domain); in host1x_drm_probe()
1232 tegra->domain = NULL; in host1x_drm_probe()
1236 if (tegra->hub) { in host1x_drm_probe()
1237 err = tegra_display_hub_prepare(tegra->hub); in host1x_drm_probe()
1242 /* syncpoints are used for full 32-bit hardware VBLANK counters */ in host1x_drm_probe()
1243 drm->max_vblank_count = 0xffffffff; in host1x_drm_probe()
1245 err = drm_vblank_init(drm, drm->mode_config.num_crtc); in host1x_drm_probe()
1260 if (drm->mode_config.num_crtc > 0) { in host1x_drm_probe()
1269 drm->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC); in host1x_drm_probe()
1281 if (tegra->hub) in host1x_drm_probe()
1282 tegra_display_hub_cleanup(tegra->hub); in host1x_drm_probe()
1284 if (tegra->domain) { in host1x_drm_probe()
1285 mutex_destroy(&tegra->mm_lock); in host1x_drm_probe()
1286 drm_mm_takedown(&tegra->mm); in host1x_drm_probe()
1287 put_iova_domain(&tegra->carveout.domain); in host1x_drm_probe()
1296 if (tegra->domain) in host1x_drm_probe()
1297 iommu_domain_free(tegra->domain); in host1x_drm_probe()
1307 struct drm_device *drm = dev_get_drvdata(&dev->dev); in host1x_drm_remove()
1308 struct tegra_drm *tegra = drm->dev_private; in host1x_drm_remove()
1317 if (tegra->hub) in host1x_drm_remove()
1318 tegra_display_hub_cleanup(tegra->hub); in host1x_drm_remove()
1322 dev_err(&dev->dev, "host1x device cleanup failed: %d\n", err); in host1x_drm_remove()
1324 if (tegra->domain) { in host1x_drm_remove()
1325 mutex_destroy(&tegra->mm_lock); in host1x_drm_remove()
1326 drm_mm_takedown(&tegra->mm); in host1x_drm_remove()
1327 put_iova_domain(&tegra->carveout.domain); in host1x_drm_remove()
1329 iommu_domain_free(tegra->domain); in host1x_drm_remove()
1340 drm_atomic_helper_shutdown(dev_get_drvdata(&dev->dev)); in host1x_drm_shutdown()
1363 { .compatible = "nvidia,tegra20-dc", },
1364 { .compatible = "nvidia,tegra20-hdmi", },
1365 { .compatible = "nvidia,tegra20-gr2d", },
1366 { .compatible = "nvidia,tegra20-gr3d", },
1367 { .compatible = "nvidia,tegra30-dc", },
1368 { .compatible = "nvidia,tegra30-hdmi", },
1369 { .compatible = "nvidia,tegra30-gr2d", },
1370 { .compatible = "nvidia,tegra30-gr3d", },
1371 { .compatible = "nvidia,tegra114-dc", },
1372 { .compatible = "nvidia,tegra114-dsi", },
1373 { .compatible = "nvidia,tegra114-hdmi", },
1374 { .compatible = "nvidia,tegra114-gr2d", },
1375 { .compatible = "nvidia,tegra114-gr3d", },
1376 { .compatible = "nvidia,tegra124-dc", },
1377 { .compatible = "nvidia,tegra124-sor", },
1378 { .compatible = "nvidia,tegra124-hdmi", },
1379 { .compatible = "nvidia,tegra124-dsi", },
1380 { .compatible = "nvidia,tegra124-vic", },
1381 { .compatible = "nvidia,tegra132-dsi", },
1382 { .compatible = "nvidia,tegra210-dc", },
1383 { .compatible = "nvidia,tegra210-dsi", },
1384 { .compatible = "nvidia,tegra210-sor", },
1385 { .compatible = "nvidia,tegra210-sor1", },
1386 { .compatible = "nvidia,tegra210-vic", },
1387 { .compatible = "nvidia,tegra210-nvdec", },
1388 { .compatible = "nvidia,tegra186-display", },
1389 { .compatible = "nvidia,tegra186-dc", },
1390 { .compatible = "nvidia,tegra186-sor", },
1391 { .compatible = "nvidia,tegra186-sor1", },
1392 { .compatible = "nvidia,tegra186-vic", },
1393 { .compatible = "nvidia,tegra186-nvdec", },
1394 { .compatible = "nvidia,tegra194-display", },
1395 { .compatible = "nvidia,tegra194-dc", },
1396 { .compatible = "nvidia,tegra194-sor", },
1397 { .compatible = "nvidia,tegra194-vic", },
1398 { .compatible = "nvidia,tegra194-nvdec", },
1399 { .compatible = "nvidia,tegra234-vic", },
1400 { .compatible = "nvidia,tegra234-nvdec", },
1433 return -ENODEV; in host1x_drm_init()
1458 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");