1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/dma-mapping.h>
250 	return -EINVAL;  in sun8i_mixer_drm_format_to_hw()
255 	u32 ch_base = sun8i_channel_base(layer->mixer, layer->channel);  in sun8i_layer_enable()
258 	if (layer->type == SUN8I_LAYER_TYPE_UI) {  in sun8i_layer_enable()
261 		reg = SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay);  in sun8i_layer_enable()
265 		reg = SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, layer->overlay);  in sun8i_layer_enable()
268 	regmap_update_bits(layer->mixer->engine.regs, reg, mask, val);  in sun8i_layer_enable()
283 	drm_for_each_plane(plane, state->dev) {  in sun8i_mixer_commit()
288 		if (!(plane->possible_crtcs & drm_crtc_mask(crtc)) || layer->mixer != mixer)  in sun8i_mixer_commit()
293 			plane_state = plane->state;  in sun8i_mixer_commit()
295 		enable = plane_state->crtc && plane_state->visible;  in sun8i_mixer_commit()
296 		zpos = plane_state->normalized_zpos;  in sun8i_mixer_commit()
299 				 plane->base.id, layer->channel, layer->overlay,  in sun8i_mixer_commit()
303 		 * We always update the layer enable bit, because it can clear  in sun8i_mixer_commit()
312 		route |= layer->channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);  in sun8i_mixer_commit()
316 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), route);  in sun8i_mixer_commit()
317 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),  in sun8i_mixer_commit()
320 	regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF,  in sun8i_mixer_commit()
331 	planes = devm_kcalloc(drm->dev,  in sun8i_layers_init()
332 			      mixer->cfg->vi_num + mixer->cfg->ui_num + 1,  in sun8i_layers_init()
335 		return ERR_PTR(-ENOMEM);  in sun8i_layers_init()
337 	for (i = 0; i < mixer->cfg->vi_num; i++) {  in sun8i_layers_init()
342 			dev_err(drm->dev,  in sun8i_layers_init()
347 		planes[i] = &layer->plane;  in sun8i_layers_init()
350 	for (i = 0; i < mixer->cfg->ui_num; i++) {  in sun8i_layers_init()
355 			dev_err(drm->dev, "Couldn't initialize %s plane\n",  in sun8i_layers_init()
360 		planes[mixer->cfg->vi_num + i] = &layer->plane;  in sun8i_layers_init()
374 	interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);  in sun8i_mixer_mode_set()
375 	size = SUN8I_MIXER_SIZE(mode->hdisplay, mode->vdisplay);  in sun8i_mixer_mode_set()
378 			 mode->hdisplay, mode->vdisplay);  in sun8i_mixer_mode_set()
380 	regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_SIZE, size);  in sun8i_mixer_mode_set()
381 	regmap_write(engine->regs, SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size);  in sun8i_mixer_mode_set()
388 	regmap_update_bits(engine->regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base),  in sun8i_mixer_mode_set()
414 	ep = of_graph_get_endpoint_by_regs(node, 1, -1);  in sun8i_mixer_of_get_id()
416 		return -EINVAL;  in sun8i_mixer_of_get_id()
421 		return -EINVAL;  in sun8i_mixer_of_get_id()
433 	struct sun4i_drv *drv = drm->dev_private;  in sun8i_mixer_bind()
441 	 * The mixer uses single 32-bit register to store memory  in sun8i_mixer_bind()
442 	 * addresses, so that it cannot deal with 64-bit memory  in sun8i_mixer_bind()
449 		dev_err(dev, "Cannot do 32-bit DMA.\n");  in sun8i_mixer_bind()
455 		return -ENOMEM;  in sun8i_mixer_bind()
457 	mixer->engine.ops = &sun8i_engine_ops;  in sun8i_mixer_bind()
458 	mixer->engine.node = dev->of_node;  in sun8i_mixer_bind()
460 	if (of_property_present(dev->of_node, "iommus")) {  in sun8i_mixer_bind()
465 		 * DRM doesn't do per-device allocation either, so we  in sun8i_mixer_bind()
468 		ret = of_dma_configure(drm->dev, dev->of_node, true);  in sun8i_mixer_bind()
474 	 * While this function can fail, we shouldn't do anything  in sun8i_mixer_bind()
481 	mixer->engine.id = sun8i_mixer_of_get_id(dev->of_node);  in sun8i_mixer_bind()
483 	mixer->cfg = of_device_get_match_data(dev);  in sun8i_mixer_bind()
484 	if (!mixer->cfg)  in sun8i_mixer_bind()
485 		return -EINVAL;  in sun8i_mixer_bind()
491 	mixer->engine.regs = devm_regmap_init_mmio(dev, regs,  in sun8i_mixer_bind()
493 	if (IS_ERR(mixer->engine.regs)) {  in sun8i_mixer_bind()
495 		return PTR_ERR(mixer->engine.regs);  in sun8i_mixer_bind()
498 	mixer->reset = devm_reset_control_get(dev, NULL);  in sun8i_mixer_bind()
499 	if (IS_ERR(mixer->reset)) {  in sun8i_mixer_bind()
501 		return PTR_ERR(mixer->reset);  in sun8i_mixer_bind()
504 	ret = reset_control_deassert(mixer->reset);  in sun8i_mixer_bind()
510 	mixer->bus_clk = devm_clk_get(dev, "bus");  in sun8i_mixer_bind()
511 	if (IS_ERR(mixer->bus_clk)) {  in sun8i_mixer_bind()
513 		ret = PTR_ERR(mixer->bus_clk);  in sun8i_mixer_bind()
516 	clk_prepare_enable(mixer->bus_clk);  in sun8i_mixer_bind()
518 	mixer->mod_clk = devm_clk_get(dev, "mod");  in sun8i_mixer_bind()
519 	if (IS_ERR(mixer->mod_clk)) {  in sun8i_mixer_bind()
521 		ret = PTR_ERR(mixer->mod_clk);  in sun8i_mixer_bind()
530 	if (mixer->cfg->mod_rate)  in sun8i_mixer_bind()
531 		clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);  in sun8i_mixer_bind()
533 	clk_prepare_enable(mixer->mod_clk);  in sun8i_mixer_bind()
535 	list_add_tail(&mixer->engine.list, &drv->engine_list);  in sun8i_mixer_bind()
539 	/* Reset registers and disable unused sub-engines */  in sun8i_mixer_bind()
540 	if (mixer->cfg->is_de3) {  in sun8i_mixer_bind()
542 			regmap_write(mixer->engine.regs, i, 0);  in sun8i_mixer_bind()
544 		regmap_write(mixer->engine.regs, SUN50I_MIXER_FCE_EN, 0);  in sun8i_mixer_bind()
545 		regmap_write(mixer->engine.regs, SUN50I_MIXER_PEAK_EN, 0);  in sun8i_mixer_bind()
546 		regmap_write(mixer->engine.regs, SUN50I_MIXER_LCTI_EN, 0);  in sun8i_mixer_bind()
547 		regmap_write(mixer->engine.regs, SUN50I_MIXER_BLS_EN, 0);  in sun8i_mixer_bind()
548 		regmap_write(mixer->engine.regs, SUN50I_MIXER_FCC_EN, 0);  in sun8i_mixer_bind()
549 		regmap_write(mixer->engine.regs, SUN50I_MIXER_DNS_EN, 0);  in sun8i_mixer_bind()
550 		regmap_write(mixer->engine.regs, SUN50I_MIXER_DRC_EN, 0);  in sun8i_mixer_bind()
551 		regmap_write(mixer->engine.regs, SUN50I_MIXER_FMT_EN, 0);  in sun8i_mixer_bind()
552 		regmap_write(mixer->engine.regs, SUN50I_MIXER_CDC0_EN, 0);  in sun8i_mixer_bind()
553 		regmap_write(mixer->engine.regs, SUN50I_MIXER_CDC1_EN, 0);  in sun8i_mixer_bind()
556 			regmap_write(mixer->engine.regs, i, 0);  in sun8i_mixer_bind()
558 		regmap_write(mixer->engine.regs, SUN8I_MIXER_FCE_EN, 0);  in sun8i_mixer_bind()
559 		regmap_write(mixer->engine.regs, SUN8I_MIXER_BWS_EN, 0);  in sun8i_mixer_bind()
560 		regmap_write(mixer->engine.regs, SUN8I_MIXER_LTI_EN, 0);  in sun8i_mixer_bind()
561 		regmap_write(mixer->engine.regs, SUN8I_MIXER_PEAK_EN, 0);  in sun8i_mixer_bind()
562 		regmap_write(mixer->engine.regs, SUN8I_MIXER_ASE_EN, 0);  in sun8i_mixer_bind()
563 		regmap_write(mixer->engine.regs, SUN8I_MIXER_FCC_EN, 0);  in sun8i_mixer_bind()
564 		regmap_write(mixer->engine.regs, SUN8I_MIXER_DCSC_EN, 0);  in sun8i_mixer_bind()
568 	regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL,  in sun8i_mixer_bind()
572 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base),  in sun8i_mixer_bind()
579 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base),  in sun8i_mixer_bind()
581 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0),  in sun8i_mixer_bind()
584 	plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num;  in sun8i_mixer_bind()
586 		regmap_write(mixer->engine.regs,  in sun8i_mixer_bind()
590 	regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base),  in sun8i_mixer_bind()
596 	clk_disable_unprepare(mixer->bus_clk);  in sun8i_mixer_bind()
598 	reset_control_assert(mixer->reset);  in sun8i_mixer_bind()
607 	list_del(&mixer->engine.list);  in sun8i_mixer_unbind()
609 	clk_disable_unprepare(mixer->mod_clk);  in sun8i_mixer_unbind()
610 	clk_disable_unprepare(mixer->bus_clk);  in sun8i_mixer_unbind()
611 	reset_control_assert(mixer->reset);  in sun8i_mixer_unbind()
621 	return component_add(&pdev->dev, &sun8i_mixer_ops);  in sun8i_mixer_probe()
626 	component_del(&pdev->dev, &sun8i_mixer_ops);  in sun8i_mixer_remove()
729 		.compatible = "allwinner,sun8i-a83t-de2-mixer-0",
733 		.compatible = "allwinner,sun8i-a83t-de2-mixer-1",
737 		.compatible = "allwinner,sun8i-h3-de2-mixer-0",
741 		.compatible = "allwinner,sun8i-r40-de2-mixer-0",
745 		.compatible = "allwinner,sun8i-r40-de2-mixer-1",
749 		.compatible = "allwinner,sun8i-v3s-de2-mixer",
753 		.compatible = "allwinner,sun20i-d1-de2-mixer-0",
757 		.compatible = "allwinner,sun20i-d1-de2-mixer-1",
761 		.compatible = "allwinner,sun50i-a64-de2-mixer-0",
765 		.compatible = "allwinner,sun50i-a64-de2-mixer-1",
769 		.compatible = "allwinner,sun50i-h6-de3-mixer-0",
780 		.name		= "sun8i-mixer",