Lines Matching +full:clk +full:- +full:phase +full:-
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Boris Brezillon <boris.brezillon@free-electrons.com>
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
27 #define SUN4I_TCON_GINT0_VBLANK_ENABLE(pipe) BIT(31 - (pipe))
30 #define SUN4I_TCON_GINT0_VBLANK_INT(pipe) BIT(15 - (pipe))
67 #define SUN4I_TCON0_BASIC0_X(width) ((((width) - 1) & 0xfff) << 16)
68 #define SUN4I_TCON0_BASIC0_Y(height) (((height) - 1) & 0xfff)
71 #define SUN4I_TCON0_BASIC1_H_TOTAL(total) ((((total) - 1) & 0x1fff) << 16)
72 #define SUN4I_TCON0_BASIC1_H_BACKPORCH(bp) (((bp) - 1) & 0xfff)
76 #define SUN4I_TCON0_BASIC2_V_BACKPORCH(bp) (((bp) - 1) & 0xfff)
79 #define SUN4I_TCON0_BASIC3_H_SYNC(width) ((((width) - 1) & 0x7ff) << 16)
80 #define SUN4I_TCON0_BASIC3_V_SYNC(height) (((height) - 1) & 0x7ff)
115 #define SUN4I_TCON0_IO_POL_DCLK_PHASE(phase) ((phase & 3) << 28) argument
134 #define SUN4I_TCON1_BASIC0_X(width) ((((width) - 1) & 0xfff) << 16)
135 #define SUN4I_TCON1_BASIC0_Y(height) (((height) - 1) & 0xfff)
138 #define SUN4I_TCON1_BASIC1_X(width) ((((width) - 1) & 0xfff) << 16)
139 #define SUN4I_TCON1_BASIC1_Y(height) (((height) - 1) & 0xfff)
142 #define SUN4I_TCON1_BASIC2_X(width) ((((width) - 1) & 0xfff) << 16)
143 #define SUN4I_TCON1_BASIC2_Y(height) (((height) - 1) & 0xfff)
146 #define SUN4I_TCON1_BASIC3_H_TOTAL(total) ((((total) - 1) & 0x1fff) << 16)
147 #define SUN4I_TCON1_BASIC3_H_BACKPORCH(bp) (((bp) - 1) & 0xfff)
151 #define SUN4I_TCON1_BASIC4_V_BACKPORCH(bp) (((bp) - 1) & 0xfff)
154 #define SUN4I_TCON1_BASIC5_H_SYNC(width) ((((width) - 1) & 0x3ff) << 16)
155 #define SUN4I_TCON1_BASIC5_V_SYNC(height) (((height) - 1) & 0x3ff)
186 #define SUN4I_TCON0_CPU_TRI0_BLOCK_SPACE(space) ((((space) - 1) & 0xfff) << 16)
187 #define SUN4I_TCON0_CPU_TRI0_BLOCK_SIZE(size) (((size) - 1) & 0xfff)
190 #define SUN4I_TCON0_CPU_TRI1_BLOCK_NUM(num) (((num) - 1) & 0xffff)
261 struct clk *clk; member
264 struct clk *sclk0;
265 struct clk *sclk1;
268 struct clk *lvds_pll;
271 struct clk *dclk;