Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:tcon
1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
14 #include <linux/dma-mapping.h>
35 /* backend <-> TCON muxing selection done in backend */
55 regmap_write(engine->regs, SUN4I_BACKEND_OCCTL_REG, in sun4i_backend_apply_color_correction()
59 regmap_write(engine->regs, SUN4I_BACKEND_OCRCOEF_REG(i), in sun4i_backend_apply_color_correction()
68 regmap_update_bits(engine->regs, SUN4I_BACKEND_OCCTL_REG, in sun4i_backend_disable_color_correction()
78 regmap_write(engine->regs, SUN4I_BACKEND_REGBUFFCTL_REG, in sun4i_backend_commit()
96 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_layer_enable()
136 return -EINVAL; in sun4i_backend_drm_format_to_layer()
174 struct drm_plane_state *state = plane->state; in sun4i_backend_update_layer_coord()
180 state->crtc_w, state->crtc_h); in sun4i_backend_update_layer_coord()
181 regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYSIZE_REG(layer), in sun4i_backend_update_layer_coord()
182 SUN4I_BACKEND_LAYSIZE(state->crtc_w, in sun4i_backend_update_layer_coord()
183 state->crtc_h)); in sun4i_backend_update_layer_coord()
187 state->crtc_x, state->crtc_y); in sun4i_backend_update_layer_coord()
188 regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYCOOR_REG(layer), in sun4i_backend_update_layer_coord()
189 SUN4I_BACKEND_LAYCOOR(state->crtc_x, in sun4i_backend_update_layer_coord()
190 state->crtc_y)); in sun4i_backend_update_layer_coord()
198 struct drm_plane_state *state = plane->state; in sun4i_backend_update_yuv_format()
199 struct drm_framebuffer *fb = state->fb; in sun4i_backend_update_yuv_format()
200 const struct drm_format_info *format = fb->format; in sun4i_backend_update_yuv_format()
201 const uint32_t fmt = format->format; in sun4i_backend_update_yuv_format()
206 regmap_write(backend->engine.regs, in sun4i_backend_update_yuv_format()
214 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer), in sun4i_backend_update_yuv_format()
218 /* TODO: Add support for the multi-planar YUV formats */ in sun4i_backend_update_yuv_format()
247 regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVCTL_REG, val); in sun4i_backend_update_yuv_format()
255 struct drm_plane_state *state = plane->state; in sun4i_backend_update_layer_formats()
256 struct drm_framebuffer *fb = state->fb; in sun4i_backend_update_layer_formats()
261 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer), in sun4i_backend_update_layer_formats()
264 val = SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(state->alpha >> 8); in sun4i_backend_update_layer_formats()
265 if (state->alpha != DRM_BLEND_ALPHA_OPAQUE) in sun4i_backend_update_layer_formats()
267 regmap_update_bits(backend->engine.regs, in sun4i_backend_update_layer_formats()
273 if (fb->format->is_yuv) in sun4i_backend_update_layer_formats()
276 ret = sun4i_backend_drm_format_to_layer(fb->format->format, &val); in sun4i_backend_update_layer_formats()
282 regmap_update_bits(backend->engine.regs, in sun4i_backend_update_layer_formats()
301 regmap_update_bits(backend->engine.regs, in sun4i_backend_update_layer_frontend()
306 regmap_update_bits(backend->engine.regs, in sun4i_backend_update_layer_frontend()
317 /* TODO: Add support for the multi-planar YUV formats */ in sun4i_backend_update_yuv_buffer()
319 regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVADD_REG(0), paddr); in sun4i_backend_update_yuv_buffer()
321 DRM_DEBUG_DRIVER("Layer line width: %d bits\n", fb->pitches[0] * 8); in sun4i_backend_update_yuv_buffer()
322 regmap_write(backend->engine.regs, SUN4I_BACKEND_IYUVLINEWIDTH_REG(0), in sun4i_backend_update_yuv_buffer()
323 fb->pitches[0] * 8); in sun4i_backend_update_yuv_buffer()
331 struct drm_plane_state *state = plane->state; in sun4i_backend_update_layer_buffer()
332 struct drm_framebuffer *fb = state->fb; in sun4i_backend_update_layer_buffer()
337 DRM_DEBUG_DRIVER("Layer line width: %d bits\n", fb->pitches[0] * 8); in sun4i_backend_update_layer_buffer()
338 regmap_write(backend->engine.regs, in sun4i_backend_update_layer_buffer()
340 fb->pitches[0] * 8); in sun4i_backend_update_layer_buffer()
346 if (fb->format->is_yuv) in sun4i_backend_update_layer_buffer()
352 regmap_write(backend->engine.regs, in sun4i_backend_update_layer_buffer()
359 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_LAYFB_H4ADD_REG, in sun4i_backend_update_layer_buffer()
369 struct drm_plane_state *state = plane->state; in sun4i_backend_update_layer_zpos()
371 unsigned int priority = state->normalized_zpos; in sun4i_backend_update_layer_zpos()
372 unsigned int pipe = p_state->pipe; in sun4i_backend_update_layer_zpos()
376 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer), in sun4i_backend_update_layer_zpos()
379 SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(p_state->pipe) | in sun4i_backend_update_layer_zpos()
388 regmap_update_bits(backend->engine.regs, in sun4i_backend_cleanup_layer()
396 u16 src_h = state->src_h >> 16; in sun4i_backend_plane_uses_scaler()
397 u16 src_w = state->src_w >> 16; in sun4i_backend_plane_uses_scaler()
400 src_w, src_h, state->crtc_w, state->crtc_h); in sun4i_backend_plane_uses_scaler()
402 if ((state->crtc_h != src_h) || (state->crtc_w != src_w)) in sun4i_backend_plane_uses_scaler()
410 struct sun4i_layer *layer = plane_to_sun4i_layer(state->plane); in sun4i_backend_plane_uses_frontend()
411 struct sun4i_backend *backend = layer->backend; in sun4i_backend_plane_uses_frontend()
412 uint32_t format = state->fb->format->format; in sun4i_backend_plane_uses_frontend()
413 uint64_t modifier = state->fb->modifier; in sun4i_backend_plane_uses_frontend()
415 if (IS_ERR(backend->frontend)) in sun4i_backend_plane_uses_frontend()
463 WARN_ON(regmap_read_poll_timeout(engine->regs, in sun4i_backend_atomic_begin()
474 struct drm_atomic_state *state = crtc_state->state; in sun4i_backend_atomic_check()
475 struct drm_device *drm = state->dev; in sun4i_backend_atomic_check()
487 if (!crtc_state->planes_changed) in sun4i_backend_atomic_check()
490 drm_for_each_plane_mask(plane, drm, crtc_state->plane_mask) { in sun4i_backend_atomic_check()
495 struct drm_framebuffer *fb = plane_state->fb; in sun4i_backend_atomic_check()
498 &layer_state->uses_frontend)) in sun4i_backend_atomic_check()
499 return -EINVAL; in sun4i_backend_atomic_check()
501 if (layer_state->uses_frontend) { in sun4i_backend_atomic_check()
503 plane->index); in sun4i_backend_atomic_check()
506 if (fb->format->is_yuv) { in sun4i_backend_atomic_check()
513 &fb->format->format); in sun4i_backend_atomic_check()
514 if (fb->format->has_alpha || (plane_state->alpha != DRM_BLEND_ALPHA_OPAQUE)) in sun4i_backend_atomic_check()
518 plane_state->normalized_zpos); in sun4i_backend_atomic_check()
521 plane_states[plane_state->normalized_zpos] = plane_state; in sun4i_backend_atomic_check()
545 * This two-step scenario makes us unable to guarantee a in sun4i_backend_atomic_check()
564 if (backend->quirks->supports_lowest_plane_alpha) in sun4i_backend_atomic_check()
569 return -EINVAL; in sun4i_backend_atomic_check()
573 if (!backend->quirks->supports_lowest_plane_alpha && in sun4i_backend_atomic_check()
574 (plane_states[0]->alpha != DRM_BLEND_ALPHA_OPAQUE)) in sun4i_backend_atomic_check()
575 return -EINVAL; in sun4i_backend_atomic_check()
579 struct drm_framebuffer *fb = p_state->fb; in sun4i_backend_atomic_check()
586 if (fb->format->has_alpha || (p_state->alpha != DRM_BLEND_ALPHA_OPAQUE)) in sun4i_backend_atomic_check()
589 s_state->pipe = current_pipe; in sun4i_backend_atomic_check()
595 return -EINVAL; in sun4i_backend_atomic_check()
600 return -EINVAL; in sun4i_backend_atomic_check()
613 struct sun4i_frontend *frontend = backend->frontend; in sun4i_backend_vblank_quirk()
632 spin_lock(&backend->frontend_lock); in sun4i_backend_vblank_quirk()
633 if (backend->frontend_teardown) { in sun4i_backend_vblank_quirk()
635 backend->frontend_teardown = false; in sun4i_backend_vblank_quirk()
637 spin_unlock(&backend->frontend_lock); in sun4i_backend_vblank_quirk()
643 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); in sun4i_backend_mode_set()
646 mode->hdisplay, mode->vdisplay); in sun4i_backend_mode_set()
648 regmap_write(engine->regs, SUN4I_BACKEND_DISSIZE_REG, in sun4i_backend_mode_set()
649 SUN4I_BACKEND_DISSIZE(mode->hdisplay, mode->vdisplay)); in sun4i_backend_mode_set()
651 regmap_update_bits(engine->regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_mode_set()
663 backend->sat_reset = devm_reset_control_get(dev, "sat"); in sun4i_backend_init_sat()
664 if (IS_ERR(backend->sat_reset)) { in sun4i_backend_init_sat()
666 return PTR_ERR(backend->sat_reset); in sun4i_backend_init_sat()
669 ret = reset_control_deassert(backend->sat_reset); in sun4i_backend_init_sat()
675 backend->sat_clk = devm_clk_get(dev, "sat"); in sun4i_backend_init_sat()
676 if (IS_ERR(backend->sat_clk)) { in sun4i_backend_init_sat()
678 ret = PTR_ERR(backend->sat_clk); in sun4i_backend_init_sat()
682 ret = clk_prepare_enable(backend->sat_clk); in sun4i_backend_init_sat()
691 reset_control_assert(backend->sat_reset); in sun4i_backend_init_sat()
698 clk_disable_unprepare(backend->sat_clk); in sun4i_backend_free_sat()
699 reset_control_assert(backend->sat_reset); in sun4i_backend_free_sat()
718 ep = of_graph_get_endpoint_by_regs(node, 0, -1); in sun4i_backend_of_get_id()
720 return -EINVAL; in sun4i_backend_of_get_id()
725 return -EINVAL; in sun4i_backend_of_get_id()
741 return ERR_PTR(-EINVAL); in sun4i_backend_find_frontend()
750 list_for_each_entry(frontend, &drv->frontend_list, list) { in sun4i_backend_find_frontend()
751 if (remote == frontend->node) { in sun4i_backend_find_frontend()
759 return ERR_PTR(-EINVAL); in sun4i_backend_find_frontend()
785 struct sun4i_drv *drv = drm->dev_private; in sun4i_backend_bind()
793 return -ENOMEM; in sun4i_backend_bind()
795 spin_lock_init(&backend->frontend_lock); in sun4i_backend_bind()
797 if (of_property_present(dev->of_node, "interconnects")) { in sun4i_backend_bind()
802 * for us, and DRM doesn't do per-device allocation either, so in sun4i_backend_bind()
805 ret = of_dma_configure(drm->dev, dev->of_node, true); in sun4i_backend_bind()
810 backend->engine.node = dev->of_node; in sun4i_backend_bind()
811 backend->engine.ops = &sun4i_backend_engine_ops; in sun4i_backend_bind()
812 backend->engine.id = sun4i_backend_of_get_id(dev->of_node); in sun4i_backend_bind()
813 if (backend->engine.id < 0) in sun4i_backend_bind()
814 return backend->engine.id; in sun4i_backend_bind()
816 backend->frontend = sun4i_backend_find_frontend(drv, dev->of_node); in sun4i_backend_bind()
817 if (IS_ERR(backend->frontend)) in sun4i_backend_bind()
824 backend->reset = devm_reset_control_get(dev, NULL); in sun4i_backend_bind()
825 if (IS_ERR(backend->reset)) { in sun4i_backend_bind()
827 return PTR_ERR(backend->reset); in sun4i_backend_bind()
830 ret = reset_control_deassert(backend->reset); in sun4i_backend_bind()
836 backend->bus_clk = devm_clk_get(dev, "ahb"); in sun4i_backend_bind()
837 if (IS_ERR(backend->bus_clk)) { in sun4i_backend_bind()
839 ret = PTR_ERR(backend->bus_clk); in sun4i_backend_bind()
842 clk_prepare_enable(backend->bus_clk); in sun4i_backend_bind()
844 backend->mod_clk = devm_clk_get(dev, "mod"); in sun4i_backend_bind()
845 if (IS_ERR(backend->mod_clk)) { in sun4i_backend_bind()
847 ret = PTR_ERR(backend->mod_clk); in sun4i_backend_bind()
851 ret = clk_set_rate_exclusive(backend->mod_clk, 300000000); in sun4i_backend_bind()
857 clk_prepare_enable(backend->mod_clk); in sun4i_backend_bind()
859 backend->ram_clk = devm_clk_get(dev, "ram"); in sun4i_backend_bind()
860 if (IS_ERR(backend->ram_clk)) { in sun4i_backend_bind()
862 ret = PTR_ERR(backend->ram_clk); in sun4i_backend_bind()
865 clk_prepare_enable(backend->ram_clk); in sun4i_backend_bind()
867 if (of_device_is_compatible(dev->of_node, in sun4i_backend_bind()
868 "allwinner,sun8i-a33-display-backend")) { in sun4i_backend_bind()
876 backend->engine.regs = devm_regmap_init_mmio(dev, regs, in sun4i_backend_bind()
878 if (IS_ERR(backend->engine.regs)) { in sun4i_backend_bind()
880 return PTR_ERR(backend->engine.regs); in sun4i_backend_bind()
883 list_add_tail(&backend->engine.list, &drv->engine_list); in sun4i_backend_bind()
894 regmap_write(backend->engine.regs, i, 0); in sun4i_backend_bind()
897 regmap_write(backend->engine.regs, SUN4I_BACKEND_REGBUFFCTL_REG, in sun4i_backend_bind()
901 regmap_write(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_bind()
907 if (quirks->needs_output_muxing) { in sun4i_backend_bind()
913 * the CRTC is tied to the TCON, while the layers are in sun4i_backend_bind()
918 regmap_update_bits(backend->engine.regs, in sun4i_backend_bind()
921 (backend->engine.id in sun4i_backend_bind()
926 backend->quirks = quirks; in sun4i_backend_bind()
931 clk_disable_unprepare(backend->ram_clk); in sun4i_backend_bind()
933 clk_rate_exclusive_put(backend->mod_clk); in sun4i_backend_bind()
934 clk_disable_unprepare(backend->mod_clk); in sun4i_backend_bind()
936 clk_disable_unprepare(backend->bus_clk); in sun4i_backend_bind()
938 reset_control_assert(backend->reset); in sun4i_backend_bind()
947 list_del(&backend->engine.list); in sun4i_backend_unbind()
949 if (of_device_is_compatible(dev->of_node, in sun4i_backend_unbind()
950 "allwinner,sun8i-a33-display-backend")) in sun4i_backend_unbind()
953 clk_disable_unprepare(backend->ram_clk); in sun4i_backend_unbind()
954 clk_rate_exclusive_put(backend->mod_clk); in sun4i_backend_unbind()
955 clk_disable_unprepare(backend->mod_clk); in sun4i_backend_unbind()
956 clk_disable_unprepare(backend->bus_clk); in sun4i_backend_unbind()
957 reset_control_assert(backend->reset); in sun4i_backend_unbind()
967 return component_add(&pdev->dev, &sun4i_backend_ops); in sun4i_backend_probe()
972 component_del(&pdev->dev, &sun4i_backend_ops); in sun4i_backend_remove()
998 .compatible = "allwinner,sun4i-a10-display-backend",
1002 .compatible = "allwinner,sun5i-a13-display-backend",
1006 .compatible = "allwinner,sun6i-a31-display-backend",
1010 .compatible = "allwinner,sun7i-a20-display-backend",
1014 .compatible = "allwinner,sun8i-a23-display-backend",
1018 .compatible = "allwinner,sun8i-a33-display-backend",
1022 .compatible = "allwinner,sun9i-a80-display-backend",
1033 .name = "sun4i-backend",
1039 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
1040 MODULE_DESCRIPTION("Allwinner A10 Display Backend Driver");