1 // SPDX-License-Identifier: GPL-2.0
64 #define VTG_IRQ_TOP         BIT(1)
74 #define AWG_DELAY_HD        (-9)
75 #define AWG_DELAY_ED        (-8)
76 #define AWG_DELAY_SD        (-7)
154 	put_device(&pdev->dev);  in of_vtg_find()
161 	writel(1, vtg->regs + VTG_DRST_AUTOC);  in vtg_reset()
173 	u32 xstop = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);  in vtg_set_output_window()
174 	u32 ystop = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);  in vtg_set_output_window()
190 static void vtg_set_hsync_vsync_pos(struct sti_vtg_sync_params *sync,  in vtg_set_hsync_vsync_pos()  argument
198 	clocksperline = mode->htotal;  in vtg_set_hsync_vsync_pos()
202 	stop = mode->hsync_end - mode->hsync_start;  in vtg_set_hsync_vsync_pos()
210 		start -= clocksperline;  in vtg_set_hsync_vsync_pos()
215 		stop -= clocksperline;  in vtg_set_hsync_vsync_pos()
217 	sync->hsync = (stop << 16) | start;  in vtg_set_hsync_vsync_pos()
221 		risesync_top = 1;  in vtg_set_hsync_vsync_pos()
223 		fallsync_top += mode->vsync_end - mode->vsync_start;  in vtg_set_hsync_vsync_pos()
228 		risesync_top = mode->vtotal;  in vtg_set_hsync_vsync_pos()
229 		fallsync_top = mode->vsync_end - mode->vsync_start;  in vtg_set_hsync_vsync_pos()
235 	sync->vsync_line_top = (fallsync_top << 16) | risesync_top;  in vtg_set_hsync_vsync_pos()
236 	sync->vsync_off_top = (fallsync_offs_top << 16) | risesync_offs_top;  in vtg_set_hsync_vsync_pos()
239 	sync->vsync_line_bot = sync->vsync_line_top;  in vtg_set_hsync_vsync_pos()
240 	sync->vsync_off_bot = sync->vsync_off_top;  in vtg_set_hsync_vsync_pos()
245 			 struct sti_vtg_sync_params *sync,  in vtg_set_mode()  argument
251 	writel(mode->htotal, vtg->regs + VTG_CLKLN);  in vtg_set_mode()
254 	writel(mode->vtotal * 2, vtg->regs + VTG_HLFLN);  in vtg_set_mode()
257 	vtg_set_output_window(vtg->regs, mode);  in vtg_set_mode()
260 	vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDMI - 1], HDMI_DELAY, mode);  in vtg_set_mode()
263 	vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDDCS - 1], 0, mode);  in vtg_set_mode()
266 	vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDF - 1], AWG_DELAY_HD, mode);  in vtg_set_mode()
269 	vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_DVO - 1], DVO_DELAY, mode);  in vtg_set_mode()
273 		writel(sync[i].hsync,  in vtg_set_mode()
274 		       vtg->regs + vtg_regs_offs[i].h_hd);  in vtg_set_mode()
275 		writel(sync[i].vsync_line_top,  in vtg_set_mode()
276 		       vtg->regs + vtg_regs_offs[i].top_v_vd);  in vtg_set_mode()
277 		writel(sync[i].vsync_line_bot,  in vtg_set_mode()
278 		       vtg->regs + vtg_regs_offs[i].bot_v_vd);  in vtg_set_mode()
279 		writel(sync[i].vsync_off_top,  in vtg_set_mode()
280 		       vtg->regs + vtg_regs_offs[i].top_v_hd);  in vtg_set_mode()
281 		writel(sync[i].vsync_off_bot,  in vtg_set_mode()
282 		       vtg->regs + vtg_regs_offs[i].bot_v_hd);  in vtg_set_mode()
286 	writel(type, vtg->regs + VTG_MODE);  in vtg_set_mode()
292 	writel(0xFFFF, vtg->regs + VTG_HOST_ITS_BCLR);  in vtg_enable_irq()
293 	writel(0xFFFF, vtg->regs + VTG_HOST_ITM_BCLR);  in vtg_enable_irq()
294 	writel(VTG_IRQ_MASK, vtg->regs + VTG_HOST_ITM_BSET);  in vtg_enable_irq()
301 	vtg_set_mode(vtg, VTG_MODE_MASTER, vtg->sync_params, mode);  in sti_vtg_set_config()
315  * into account the Sync and Back Porch information.
316  * Video frame line numbers start at 1, y starts at 0.
322 	u32 start_line = mode.vtotal - mode.vsync_start + 1;  in sti_vtg_get_line_number()
337  * into account the Sync and Back Porch information.
342 	return mode.htotal - mode.hsync_start + x;  in sti_vtg_get_pixel_number()
348 	vtg->crtc = crtc;  in sti_vtg_register_client()
349 	return raw_notifier_chain_register(&vtg->notifier_list, nb);  in sti_vtg_register_client()
354 	return raw_notifier_chain_unregister(&vtg->notifier_list, nb);  in sti_vtg_unregister_client()
362 	event = (vtg->irq_status & VTG_IRQ_TOP) ?  in vtg_irq_thread()
365 	raw_notifier_call_chain(&vtg->notifier_list, event, vtg->crtc);  in vtg_irq_thread()
374 	vtg->irq_status = readl(vtg->regs + VTG_HOST_ITS);  in vtg_irq()
376 	writel(vtg->irq_status, vtg->regs + VTG_HOST_ITS_BCLR);  in vtg_irq()
378 	/* force sync bus write */  in vtg_irq()
379 	readl(vtg->regs + VTG_HOST_ITS);  in vtg_irq()
386 	struct device *dev = &pdev->dev;  in vtg_probe()
392 		return -ENOMEM;  in vtg_probe()
393 	vtg->regs = devm_platform_ioremap_resource(pdev, 0);  in vtg_probe()
394 	if (IS_ERR(vtg->regs)) {  in vtg_probe()
396 		return PTR_ERR(vtg->regs);  in vtg_probe()
399 	vtg->irq = platform_get_irq(pdev, 0);  in vtg_probe()
400 	if (vtg->irq < 0) {  in vtg_probe()
402 		return vtg->irq;  in vtg_probe()
405 	RAW_INIT_NOTIFIER_HEAD(&vtg->notifier_list);  in vtg_probe()
407 	ret = devm_request_threaded_irq(dev, vtg->irq, vtg_irq,  in vtg_probe()
430 		.name = "sti-vtg",