Lines Matching refs:vop2
139 static void vop2_lock(struct vop2 *vop2)
141 mutex_lock(&vop2->vop2_lock);
144 static void vop2_unlock(struct vop2 *vop2)
146 mutex_unlock(&vop2->vop2_lock);
337 static bool vop2_output_rg_swap(struct vop2 *vop2, u32 bus_format)
339 if (vop2->version == VOP_VERSION_RK3588) {
387 struct vop2 *vop2 = win->vop2;
392 if (vop2->version == VOP_VERSION_RK3568) {
395 drm_dbg_kms(vop2->drm,
403 if (vop2->version == VOP_VERSION_RK3588) {
405 drm_dbg_kms(vop2->drm, "Only support 32 bpp format with afbc\n");
415 drm_dbg_kms(vop2->drm, "Unsupported format modifier 0x%llx\n",
560 static void vop2_setup_scale(struct vop2 *vop2, const struct vop2_win *win,
602 drm_dbg(vop2->drm, "%s dst_w[%d] should align as 2 pixel\n",
744 struct vop2 *vop2 = vp->vop2;
746 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irq << 16 | irq);
747 vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16 | irq);
752 struct vop2 *vop2 = vp->vop2;
754 vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16);
757 static int vop2_core_clks_prepare_enable(struct vop2 *vop2)
761 ret = clk_prepare_enable(vop2->hclk);
763 drm_err(vop2->drm, "failed to enable hclk - %d\n", ret);
767 ret = clk_prepare_enable(vop2->aclk);
769 drm_err(vop2->drm, "failed to enable aclk - %d\n", ret);
773 ret = clk_prepare_enable(vop2->pclk);
775 drm_err(vop2->drm, "failed to enable pclk - %d\n", ret);
781 clk_disable_unprepare(vop2->aclk);
783 clk_disable_unprepare(vop2->hclk);
788 static void rk3588_vop2_power_domain_enable_all(struct vop2 *vop2)
792 pd = vop2_readl(vop2, RK3588_SYS_PD_CTRL);
796 vop2_writel(vop2, RK3588_SYS_PD_CTRL, pd);
799 static void vop2_enable(struct vop2 *vop2)
804 ret = pm_runtime_resume_and_get(vop2->dev);
806 drm_err(vop2->drm, "failed to get pm runtime: %d\n", ret);
810 ret = vop2_core_clks_prepare_enable(vop2);
812 pm_runtime_put_sync(vop2->dev);
816 ret = rockchip_drm_dma_attach_device(vop2->drm, vop2->dev);
818 drm_err(vop2->drm, "failed to attach dma mapping, %d\n", ret);
822 version = vop2_readl(vop2, RK3568_VERSION_INFO);
823 if (version != vop2->version) {
824 drm_err(vop2->drm, "Hardware version(0x%08x) mismatch\n", version);
832 if (vop2->data->soc_id == 3566)
833 vop2_writel(vop2, RK3568_OTP_WIN_EN, 1);
835 if (vop2->version == VOP_VERSION_RK3588)
836 rk3588_vop2_power_domain_enable_all(vop2);
838 if (vop2->version <= VOP_VERSION_RK3588) {
839 vop2->old_layer_sel = vop2_readl(vop2, RK3568_OVL_LAYER_SEL);
840 vop2->old_port_sel = vop2_readl(vop2, RK3568_OVL_PORT_SEL);
843 vop2_writel(vop2, RK3568_REG_CFG_DONE, RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN);
849 regmap_clear_bits(vop2->map, RK3568_SYS_AUTO_GATING_CTRL,
852 vop2_writel(vop2, RK3568_SYS0_INT_CLR,
854 vop2_writel(vop2, RK3568_SYS0_INT_EN,
856 vop2_writel(vop2, RK3568_SYS1_INT_CLR,
858 vop2_writel(vop2, RK3568_SYS1_INT_EN,
862 static void vop2_disable(struct vop2 *vop2)
864 rockchip_drm_dma_detach_device(vop2->drm, vop2->dev);
866 pm_runtime_put_sync(vop2->dev);
868 regcache_drop_region(vop2->map, 0, vop2_regmap_config.max_register);
870 clk_disable_unprepare(vop2->pclk);
871 clk_disable_unprepare(vop2->aclk);
872 clk_disable_unprepare(vop2->hclk);
896 drm_err(vp->vop2->drm, "display LUT RAM enable timeout!\n");
919 static inline bool vop2_supports_seamless_gamma_lut_update(struct vop2 *vop2)
921 return vop2->version != VOP_VERSION_RK3568;
924 static bool vop2_gamma_lut_in_use(struct vop2 *vop2, struct vop2_video_port *vp)
926 const int nr_vps = vop2->data->nr_vps;
930 if (vop2_vp_dsp_lut_is_enabled(&vop2->vps[gamma_en_vp_id]))
940 struct vop2 *vop2 = vp->vop2;
944 vop2_lock(vop2);
967 drm_info(vop2->drm, "wait for vp%d dsp_hold timeout\n", vp->id);
976 vop2->enable_count--;
978 if (!vop2->enable_count)
979 vop2_disable(vop2);
981 vop2_unlock(vop2);
1000 struct vop2 *vop2;
1013 vop2 = vp->vop2;
1014 vop2_data = vop2->data;
1035 drm_err(vop2->drm, "Invalid size: %dx%d->%dx%d, min size is 4x4\n",
1044 drm_err(vop2->drm, "Invalid source: %dx%d. max input: %dx%d\n",
1057 drm_err(vop2->drm, "Invalid Source: Yuv format not support odd xpos\n");
1069 struct vop2 *vop2 = win->vop2;
1071 drm_dbg(vop2->drm, "%s disable\n", win->data->name);
1140 struct vop2 *vop2 = win->vop2;
1166 * can't update plane when vop2 is disabled.
1212 drm_dbg_kms(vop2->drm,
1224 drm_dbg_kms(vop2->drm,
1239 drm_dbg_kms(vop2->drm, "vp%d %s act_w[%d] MODE 16 == 1\n",
1246 drm_dbg_kms(vop2->drm, "vp%d %s actual_w[%d] not 4 pixel aligned\n",
1257 drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n",
1263 if (vop2->version > VOP_VERSION_RK3568) {
1269 if (vop2->version >= VOP_VERSION_RK3576)
1295 drm_dbg_kms(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligned\n",
1326 if (vop2->version == VOP_VERSION_RK3568)
1336 if (vop2->version >= VOP_VERSION_RK3576) {
1382 vop2_setup_scale(vop2, win, actual_w, actual_h, dsp_w, dsp_h, fb->format->format);
1446 static void vop2_crtc_write_gamma_lut(struct vop2 *vop2, struct drm_crtc *crtc)
1449 const struct vop2_video_port_data *vp_data = &vop2->data->vp[vp->id];
1459 writel(word, vop2->lut_regs + i * 4);
1463 static void vop2_crtc_atomic_set_gamma_seamless(struct vop2 *vop2,
1467 vop2_writel(vop2, RK3568_LUT_PORT_SEL,
1470 vop2_crtc_write_gamma_lut(vop2, crtc);
1474 static void vop2_crtc_atomic_set_gamma_rk356x(struct vop2 *vop2,
1483 vop2_writel(vop2, RK3568_LUT_PORT_SEL, vp->id);
1484 vop2_crtc_write_gamma_lut(vop2, crtc);
1488 static void vop2_crtc_atomic_try_set_gamma(struct vop2 *vop2,
1493 if (!vop2->lut_regs)
1501 if (vop2_supports_seamless_gamma_lut_update(vop2))
1502 vop2_crtc_atomic_set_gamma_seamless(vop2, vp, crtc);
1504 vop2_crtc_atomic_set_gamma_rk356x(vop2, vp, crtc);
1507 static inline void vop2_crtc_atomic_try_set_gamma_locked(struct vop2 *vop2,
1512 vop2_lock(vop2);
1513 vop2_crtc_atomic_try_set_gamma(vop2, vp, crtc, crtc_state);
1514 vop2_unlock(vop2);
1549 struct vop2 *vop2 = vp->vop2;
1563 vop2->ops->setup_bg_dly(vp);
1608 struct vop2 *vop2 = vp->vop2;
1609 const struct vop2_data *vop2_data = vop2->data;
1632 drm_dbg(vop2->drm, "Update mode to %dx%d%s%d, type: %d for vp%d\n",
1636 vop2_lock(vop2);
1640 drm_err(vop2->drm, "failed to enable dclk for video port%d - %d\n",
1642 vop2_unlock(vop2);
1646 if (!vop2->enable_count)
1647 vop2_enable(vop2);
1649 vop2->enable_count++;
1671 clock = vop2->ops->setup_intf_mux(vp, rkencoder->crtc_endpoint_id, polflags);
1675 vop2_unlock(vop2);
1689 if (vop2_output_rg_swap(vop2, vcstate->bus_format))
1724 vop2_writel(vop2, RK3568_VP_LINE_FLAG(vp->id),
1740 if ((vop2->pll_hdmiphy0 || vop2->pll_hdmiphy1) && clock <= VOP2_MAX_DCLK_RATE) {
1745 if (!vop2->pll_hdmiphy0)
1751 ret = clk_set_parent(vp->dclk, vop2->pll_hdmiphy0);
1753 drm_warn(vop2->drm,
1759 if (!vop2->pll_hdmiphy1)
1765 ret = clk_set_parent(vp->dclk, vop2->pll_hdmiphy1);
1767 drm_warn(vop2->drm,
1782 vop2_crtc_atomic_try_set_gamma(vop2, vp, crtc, crtc_state);
1786 vop2_unlock(vop2);
1794 struct vop2 *vop2 = vp->vop2;
1797 if (!vp->vop2->lut_regs || !crtc_state->color_mgmt_changed ||
1803 drm_dbg(vop2->drm, "Invalid LUT size; got %d, expected %d\n",
1808 if (!vop2_supports_seamless_gamma_lut_update(vop2) && vop2_gamma_lut_in_use(vop2, vp)) {
1809 drm_info(vop2->drm, "Gamma LUT can be enabled for only one CRTC at a time\n");
1842 struct vop2 *vop2 = vp->vop2;
1844 vop2->ops->setup_overlay(vp);
1852 struct vop2 *vop2 = vp->vop2;
1856 vop2_crtc_atomic_try_set_gamma_locked(vop2, vp, crtc, crtc_state);
2008 static void vop2_regs_print(struct vop2 *vop2, struct seq_file *s,
2016 val = vop2_readl(vop2, dump->base + dump->en_reg);
2023 start = vop2->res->start + dump->base;
2026 vop2_readl(vop2, dump->base + (4 * i)),
2027 vop2_readl(vop2, dump->base + (4 * (i + 1))),
2028 vop2_readl(vop2, dump->base + (4 * (i + 2))),
2029 vop2_readl(vop2, dump->base + (4 * (i + 3))));
2036 struct vop2 *vop2 = node->info_ent->data;
2044 regcache_drop_region(vop2->map, 0, vop2_regmap_config.max_register);
2046 if (vop2->enable_count) {
2047 for (i = 0; i < vop2->data->regs_dump_size; i++) {
2048 dump = &vop2->data->regs_dump[i];
2049 vop2_regs_print(vop2, s, dump, active_only);
2077 static void vop2_debugfs_init(struct vop2 *vop2, struct drm_minor *minor)
2082 root = debugfs_create_dir("vop2", minor->debugfs_root);
2085 vop2_debugfs_list[i].data = vop2;
2096 struct vop2 *vop2 = vp->vop2;
2099 vop2_debugfs_init(vop2, crtc->dev->primary);
2159 struct vop2 *vop2 = vp->vop2;
2164 if (!pm_runtime_get_if_in_use(vop2->dev))
2167 irqs = vop2_readl(vop2, RK3568_VP_INT_STATUS(vp->id));
2168 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs);
2179 u32 val = vop2_readl(vop2, RK3568_REG_CFG_DONE);
2193 drm_err_ratelimited(vop2->drm, "POST_BUF_EMPTY irq err at vp%d\n", vp->id);
2197 pm_runtime_put(vop2->dev);
2204 struct vop2 *vop2 = data;
2205 const struct vop2_data *vop2_data = vop2->data;
2212 * vop2-device is disabled the irq has to be targeted at the iommu.
2214 if (!pm_runtime_get_if_in_use(vop2->dev))
2217 if (vop2->version < VOP_VERSION_RK3576) {
2219 struct vop2_video_port *vp = &vop2->vps[i];
2223 irqs = vop2_readl(vop2, RK3568_VP_INT_STATUS(vp->id));
2224 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs);
2235 u32 val = vop2_readl(vop2, RK3568_REG_CFG_DONE);
2249 drm_err_ratelimited(vop2->drm,
2257 axi_irqs[0] = vop2_readl(vop2, RK3568_SYS0_INT_STATUS);
2258 vop2_writel(vop2, RK3568_SYS0_INT_CLR, axi_irqs[0] << 16 | axi_irqs[0]);
2259 axi_irqs[1] = vop2_readl(vop2, RK3568_SYS1_INT_STATUS);
2260 vop2_writel(vop2, RK3568_SYS1_INT_CLR, axi_irqs[1] << 16 | axi_irqs[1]);
2264 drm_err_ratelimited(vop2->drm, "BUS_ERROR irq err\n");
2269 pm_runtime_put(vop2->dev);
2274 static int vop2_plane_init(struct vop2 *vop2, struct vop2_win *win,
2283 ret = drm_universal_plane_init(vop2->drm, &win->base, possible_crtcs,
2289 drm_err(vop2->drm, "failed to initialize plane %d\n", ret);
2302 vop2->registered_num_wins - 1);
2316 struct vop2 *vop2 = win->vop2;
2318 if (vop2->data->soc_id == 3566) {
2332 static int vop2_create_crtcs(struct vop2 *vop2)
2334 const struct vop2_data *vop2_data = vop2->data;
2335 struct drm_device *drm = vop2->drm;
2336 struct device *dev = vop2->dev;
2351 vp = &vop2->vps[i];
2352 vp->vop2 = vop2;
2357 vp->dclk = devm_clk_get(vop2->dev, dclk_name);
2364 drm_dbg(vop2->drm, "%s: No remote for vp%d\n", __func__, i);
2380 vp = &vop2->vps[i];
2385 for (j = 0; j < vop2->registered_num_wins; j++) {
2386 win = &vop2->win[j];
2402 ret = vop2_plane_init(vop2, win, possible_crtcs);
2418 for (i = 0; i < vop2->registered_num_wins; i++) {
2419 win = &vop2->win[i];
2433 vp = &vop2->vps[j];
2443 ret = vop2_plane_init(vop2, win, possible_crtcs);
2450 vp = &vop2->vps[i];
2465 if (vop2->lut_regs) {
2479 for (i = 0; i < vop2->data->nr_vps; i++) {
2480 struct vop2_video_port *vp = &vop2->vps[i];
2489 static void vop2_destroy_crtcs(struct vop2 *vop2)
2491 struct drm_device *drm = vop2->drm;
2510 static int vop2_find_rgb_encoder(struct vop2 *vop2)
2512 struct device_node *node = vop2->dev->of_node;
2516 for (i = 0; i < vop2->data->nr_vps; i++) {
2532 struct vop2 *vop2 = win->vop2;
2543 win->reg[i] = devm_regmap_field_alloc(vop2->dev, vop2->map, field);
2551 static int vop2_win_init(struct vop2 *vop2)
2553 const struct vop2_data *vop2_data = vop2->data;
2560 win = &vop2->win[i];
2565 win->vop2 = vop2;
2567 ret = vop2_regmap_init(win, vop2->data->cluster_reg,
2568 vop2->data->nr_cluster_regs);
2570 ret = vop2_regmap_init(win, vop2->data->smart_reg,
2571 vop2->data->nr_smart_regs);
2576 vop2->registered_num_wins = vop2_data->win_size;
2601 .name = "vop2",
2611 struct vop2 *vop2;
2620 /* Allocate vop2 struct and its vop2_win array */
2621 alloc_size = struct_size(vop2, win, vop2_data->win_size);
2622 vop2 = devm_kzalloc(dev, alloc_size, GFP_KERNEL);
2623 if (!vop2)
2626 vop2->dev = dev;
2627 vop2->data = vop2_data;
2628 vop2->ops = vop2_data->ops;
2629 vop2->version = vop2_data->version;
2630 vop2->drm = drm;
2632 dev_set_drvdata(dev, vop2);
2637 "failed to get vop2 register byname\n");
2639 vop2->res = res;
2640 vop2->regs = devm_ioremap_resource(dev, res);
2641 if (IS_ERR(vop2->regs))
2642 return PTR_ERR(vop2->regs);
2643 vop2->len = resource_size(res);
2645 vop2->map = devm_regmap_init_mmio(dev, vop2->regs, &vop2_regmap_config);
2646 if (IS_ERR(vop2->map))
2647 return PTR_ERR(vop2->map);
2649 ret = vop2_win_init(vop2);
2655 vop2->lut_regs = devm_ioremap_resource(dev, res);
2656 if (IS_ERR(vop2->lut_regs))
2657 return PTR_ERR(vop2->lut_regs);
2660 vop2->sys_grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
2661 if (IS_ERR(vop2->sys_grf))
2662 return dev_err_probe(drm->dev, PTR_ERR(vop2->sys_grf),
2667 vop2->vop_grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,vop-grf");
2668 if (IS_ERR(vop2->vop_grf))
2669 return dev_err_probe(drm->dev, PTR_ERR(vop2->vop_grf),
2674 vop2->vo1_grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,vo1-grf");
2675 if (IS_ERR(vop2->vo1_grf))
2676 return dev_err_probe(drm->dev, PTR_ERR(vop2->vo1_grf),
2681 vop2->sys_pmu = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,pmu");
2682 if (IS_ERR(vop2->sys_pmu))
2683 return dev_err_probe(drm->dev, PTR_ERR(vop2->sys_pmu),
2687 vop2->hclk = devm_clk_get(vop2->dev, "hclk");
2688 if (IS_ERR(vop2->hclk))
2689 return dev_err_probe(drm->dev, PTR_ERR(vop2->hclk),
2692 vop2->aclk = devm_clk_get(vop2->dev, "aclk");
2693 if (IS_ERR(vop2->aclk))
2694 return dev_err_probe(drm->dev, PTR_ERR(vop2->aclk),
2697 vop2->pclk = devm_clk_get_optional(vop2->dev, "pclk_vop");
2698 if (IS_ERR(vop2->pclk))
2699 return dev_err_probe(drm->dev, PTR_ERR(vop2->pclk),
2702 vop2->pll_hdmiphy0 = devm_clk_get_optional(vop2->dev, "pll_hdmiphy0");
2703 if (IS_ERR(vop2->pll_hdmiphy0))
2704 return dev_err_probe(drm->dev, PTR_ERR(vop2->pll_hdmiphy0),
2707 vop2->pll_hdmiphy1 = devm_clk_get_optional(vop2->dev, "pll_hdmiphy1");
2708 if (IS_ERR(vop2->pll_hdmiphy1))
2709 return dev_err_probe(drm->dev, PTR_ERR(vop2->pll_hdmiphy1),
2712 vop2->irq = platform_get_irq(pdev, 0);
2713 if (vop2->irq < 0)
2714 return dev_err_probe(drm->dev, vop2->irq, "cannot find irq for vop2\n");
2716 mutex_init(&vop2->vop2_lock);
2717 mutex_init(&vop2->ovl_lock);
2719 ret = devm_request_irq(dev, vop2->irq, vop2_isr, IRQF_SHARED, dev_name(dev), vop2);
2723 ret = vop2_create_crtcs(vop2);
2727 if (vop2->version >= VOP_VERSION_RK3576) {
2741 "cannot find irq for vop2 vp%d\n", vp->id);
2747 "request irq for vop2 vp%d failed\n", vp->id);
2751 ret = vop2_find_rgb_encoder(vop2);
2753 vop2->rgb = rockchip_rgb_init(dev, &vop2->vps[ret].crtc,
2754 vop2->drm, ret);
2755 if (IS_ERR(vop2->rgb)) {
2756 if (PTR_ERR(vop2->rgb) == -EPROBE_DEFER) {
2757 ret = PTR_ERR(vop2->rgb);
2760 vop2->rgb = NULL;
2764 rockchip_drm_dma_init_device(vop2->drm, vop2->dev);
2771 vop2_destroy_crtcs(vop2);
2778 struct vop2 *vop2 = dev_get_drvdata(dev);
2782 if (vop2->rgb)
2783 rockchip_rgb_fini(vop2->rgb);
2785 vop2_destroy_crtcs(vop2);