Lines Matching full:vop2
42 * VOP2 architecture
139 static void vop2_lock(struct vop2 *vop2)
141 mutex_lock(&vop2->vop2_lock);
144 static void vop2_unlock(struct vop2 *vop2) in vop2_unlock() argument
146 mutex_unlock(&vop2->vop2_lock); in vop2_unlock()
337 static bool vop2_output_rg_swap(struct vop2 *vop2, u32 bus_format) in vop2_output_rg_swap() argument
339 if (vop2->version == VOP_VERSION_RK3588) { in vop2_output_rg_swap()
387 struct vop2 *vop2 = win->vop2; in rockchip_vop2_mod_supported() local
392 if (vop2->version == VOP_VERSION_RK3568) { in rockchip_vop2_mod_supported()
395 drm_dbg_kms(vop2->drm, in rockchip_vop2_mod_supported()
403 if (vop2->version == VOP_VERSION_RK3588) { in rockchip_vop2_mod_supported()
405 drm_dbg_kms(vop2->drm, "Only support 32 bpp format with afbc\n"); in rockchip_vop2_mod_supported()
415 drm_dbg_kms(vop2->drm, "Unsupported format modifier 0x%llx\n", in rockchip_vop2_mod_supported()
560 static void vop2_setup_scale(struct vop2 *vop2, const struct vop2_win *win, in vop2_setup_scale() argument
602 drm_dbg(vop2->drm, "%s dst_w[%d] should align as 2 pixel\n", in vop2_setup_scale()
744 struct vop2 *vop2 = vp->vop2; in vop2_crtc_enable_irq() local
746 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irq << 16 | irq); in vop2_crtc_enable_irq()
747 vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16 | irq); in vop2_crtc_enable_irq()
752 struct vop2 *vop2 = vp->vop2; in vop2_crtc_disable_irq() local
754 vop2_writel(vop2, RK3568_VP_INT_EN(vp->id), irq << 16); in vop2_crtc_disable_irq()
757 static int vop2_core_clks_prepare_enable(struct vop2 *vop2) in vop2_core_clks_prepare_enable() argument
761 ret = clk_prepare_enable(vop2->hclk); in vop2_core_clks_prepare_enable()
763 drm_err(vop2->drm, "failed to enable hclk - %d\n", ret); in vop2_core_clks_prepare_enable()
767 ret = clk_prepare_enable(vop2->aclk); in vop2_core_clks_prepare_enable()
769 drm_err(vop2->drm, "failed to enable aclk - %d\n", ret); in vop2_core_clks_prepare_enable()
773 ret = clk_prepare_enable(vop2->pclk); in vop2_core_clks_prepare_enable()
775 drm_err(vop2->drm, "failed to enable pclk - %d\n", ret); in vop2_core_clks_prepare_enable()
781 clk_disable_unprepare(vop2->aclk); in vop2_core_clks_prepare_enable()
783 clk_disable_unprepare(vop2->hclk); in vop2_core_clks_prepare_enable()
788 static void rk3588_vop2_power_domain_enable_all(struct vop2 *vop2) in rk3588_vop2_power_domain_enable_all() argument
792 pd = vop2_readl(vop2, RK3588_SYS_PD_CTRL); in rk3588_vop2_power_domain_enable_all()
796 vop2_writel(vop2, RK3588_SYS_PD_CTRL, pd); in rk3588_vop2_power_domain_enable_all()
799 static void vop2_enable(struct vop2 *vop2) in vop2_enable() argument
804 ret = pm_runtime_resume_and_get(vop2->dev); in vop2_enable()
806 drm_err(vop2->drm, "failed to get pm runtime: %d\n", ret); in vop2_enable()
810 ret = vop2_core_clks_prepare_enable(vop2); in vop2_enable()
812 pm_runtime_put_sync(vop2->dev); in vop2_enable()
816 ret = rockchip_drm_dma_attach_device(vop2->drm, vop2->dev); in vop2_enable()
818 drm_err(vop2->drm, "failed to attach dma mapping, %d\n", ret); in vop2_enable()
822 version = vop2_readl(vop2, RK3568_VERSION_INFO); in vop2_enable()
823 if (version != vop2->version) { in vop2_enable()
824 drm_err(vop2->drm, "Hardware version(0x%08x) mismatch\n", version); in vop2_enable()
832 if (vop2->data->soc_id == 3566) in vop2_enable()
833 vop2_writel(vop2, RK3568_OTP_WIN_EN, 1); in vop2_enable()
835 if (vop2->version == VOP_VERSION_RK3588) in vop2_enable()
836 rk3588_vop2_power_domain_enable_all(vop2); in vop2_enable()
838 if (vop2->version <= VOP_VERSION_RK3588) { in vop2_enable()
839 vop2->old_layer_sel = vop2_readl(vop2, RK3568_OVL_LAYER_SEL); in vop2_enable()
840 vop2->old_port_sel = vop2_readl(vop2, RK3568_OVL_PORT_SEL); in vop2_enable()
843 vop2_writel(vop2, RK3568_REG_CFG_DONE, RK3568_REG_CFG_DONE__GLB_CFG_DONE_EN); in vop2_enable()
849 regmap_clear_bits(vop2->map, RK3568_SYS_AUTO_GATING_CTRL, in vop2_enable()
852 vop2_writel(vop2, RK3568_SYS0_INT_CLR, in vop2_enable()
854 vop2_writel(vop2, RK3568_SYS0_INT_EN, in vop2_enable()
856 vop2_writel(vop2, RK3568_SYS1_INT_CLR, in vop2_enable()
858 vop2_writel(vop2, RK3568_SYS1_INT_EN, in vop2_enable()
862 static void vop2_disable(struct vop2 *vop2) in vop2_disable() argument
864 rockchip_drm_dma_detach_device(vop2->drm, vop2->dev); in vop2_disable()
866 pm_runtime_put_sync(vop2->dev); in vop2_disable()
868 regcache_drop_region(vop2->map, 0, vop2_regmap_config.max_register); in vop2_disable()
870 clk_disable_unprepare(vop2->pclk); in vop2_disable()
871 clk_disable_unprepare(vop2->aclk); in vop2_disable()
872 clk_disable_unprepare(vop2->hclk); in vop2_disable()
896 drm_err(vp->vop2->drm, "display LUT RAM enable timeout!\n"); in vop2_vp_dsp_lut_poll_disabled()
919 static inline bool vop2_supports_seamless_gamma_lut_update(struct vop2 *vop2) in vop2_supports_seamless_gamma_lut_update() argument
921 return vop2->version != VOP_VERSION_RK3568; in vop2_supports_seamless_gamma_lut_update()
924 static bool vop2_gamma_lut_in_use(struct vop2 *vop2, struct vop2_video_port *vp) in vop2_gamma_lut_in_use() argument
926 const int nr_vps = vop2->data->nr_vps; in vop2_gamma_lut_in_use()
930 if (vop2_vp_dsp_lut_is_enabled(&vop2->vps[gamma_en_vp_id])) in vop2_gamma_lut_in_use()
940 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_disable() local
944 vop2_lock(vop2); in vop2_crtc_atomic_disable()
967 drm_info(vop2->drm, "wait for vp%d dsp_hold timeout\n", vp->id); in vop2_crtc_atomic_disable()
976 vop2->enable_count--; in vop2_crtc_atomic_disable()
978 if (!vop2->enable_count) in vop2_crtc_atomic_disable()
979 vop2_disable(vop2); in vop2_crtc_atomic_disable()
981 vop2_unlock(vop2); in vop2_crtc_atomic_disable()
1000 struct vop2 *vop2; in vop2_plane_atomic_check() local
1013 vop2 = vp->vop2; in vop2_plane_atomic_check()
1014 vop2_data = vop2->data; in vop2_plane_atomic_check()
1035 drm_err(vop2->drm, "Invalid size: %dx%d->%dx%d, min size is 4x4\n", in vop2_plane_atomic_check()
1044 drm_err(vop2->drm, "Invalid source: %dx%d. max input: %dx%d\n", in vop2_plane_atomic_check()
1057 drm_err(vop2->drm, "Invalid Source: Yuv format not support odd xpos\n"); in vop2_plane_atomic_check()
1069 struct vop2 *vop2 = win->vop2; in vop2_plane_atomic_disable() local
1071 drm_dbg(vop2->drm, "%s disable\n", win->data->name); in vop2_plane_atomic_disable()
1140 struct vop2 *vop2 = win->vop2; in vop2_plane_atomic_update() local
1166 * can't update plane when vop2 is disabled. in vop2_plane_atomic_update()
1212 drm_dbg_kms(vop2->drm, in vop2_plane_atomic_update()
1224 drm_dbg_kms(vop2->drm, in vop2_plane_atomic_update()
1239 drm_dbg_kms(vop2->drm, "vp%d %s act_w[%d] MODE 16 == 1\n", in vop2_plane_atomic_update()
1246 drm_dbg_kms(vop2->drm, "vp%d %s actual_w[%d] not 4 pixel aligned\n", in vop2_plane_atomic_update()
1257 drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n", in vop2_plane_atomic_update()
1263 if (vop2->version > VOP_VERSION_RK3568) { in vop2_plane_atomic_update()
1269 if (vop2->version >= VOP_VERSION_RK3576) in vop2_plane_atomic_update()
1295 drm_dbg_kms(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligned\n", in vop2_plane_atomic_update()
1326 if (vop2->version == VOP_VERSION_RK3568) in vop2_plane_atomic_update()
1336 if (vop2->version >= VOP_VERSION_RK3576) { in vop2_plane_atomic_update()
1382 vop2_setup_scale(vop2, win, actual_w, actual_h, dsp_w, dsp_h, fb->format->format); in vop2_plane_atomic_update()
1446 static void vop2_crtc_write_gamma_lut(struct vop2 *vop2, struct drm_crtc *crtc) in vop2_crtc_write_gamma_lut() argument
1449 const struct vop2_video_port_data *vp_data = &vop2->data->vp[vp->id]; in vop2_crtc_write_gamma_lut()
1459 writel(word, vop2->lut_regs + i * 4); in vop2_crtc_write_gamma_lut()
1463 static void vop2_crtc_atomic_set_gamma_seamless(struct vop2 *vop2, in vop2_crtc_atomic_set_gamma_seamless() argument
1467 vop2_writel(vop2, RK3568_LUT_PORT_SEL, in vop2_crtc_atomic_set_gamma_seamless()
1470 vop2_crtc_write_gamma_lut(vop2, crtc); in vop2_crtc_atomic_set_gamma_seamless()
1474 static void vop2_crtc_atomic_set_gamma_rk356x(struct vop2 *vop2, in vop2_crtc_atomic_set_gamma_rk356x() argument
1483 vop2_writel(vop2, RK3568_LUT_PORT_SEL, vp->id); in vop2_crtc_atomic_set_gamma_rk356x()
1484 vop2_crtc_write_gamma_lut(vop2, crtc); in vop2_crtc_atomic_set_gamma_rk356x()
1488 static void vop2_crtc_atomic_try_set_gamma(struct vop2 *vop2, in vop2_crtc_atomic_try_set_gamma() argument
1493 if (!vop2->lut_regs) in vop2_crtc_atomic_try_set_gamma()
1501 if (vop2_supports_seamless_gamma_lut_update(vop2)) in vop2_crtc_atomic_try_set_gamma()
1502 vop2_crtc_atomic_set_gamma_seamless(vop2, vp, crtc); in vop2_crtc_atomic_try_set_gamma()
1504 vop2_crtc_atomic_set_gamma_rk356x(vop2, vp, crtc); in vop2_crtc_atomic_try_set_gamma()
1507 static inline void vop2_crtc_atomic_try_set_gamma_locked(struct vop2 *vop2, in vop2_crtc_atomic_try_set_gamma_locked() argument
1512 vop2_lock(vop2); in vop2_crtc_atomic_try_set_gamma_locked()
1513 vop2_crtc_atomic_try_set_gamma(vop2, vp, crtc, crtc_state); in vop2_crtc_atomic_try_set_gamma_locked()
1514 vop2_unlock(vop2); in vop2_crtc_atomic_try_set_gamma_locked()
1549 struct vop2 *vop2 = vp->vop2; in vop2_post_config() local
1563 vop2->ops->setup_bg_dly(vp); in vop2_post_config()
1608 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_enable() local
1609 const struct vop2_data *vop2_data = vop2->data; in vop2_crtc_atomic_enable()
1632 drm_dbg(vop2->drm, "Update mode to %dx%d%s%d, type: %d for vp%d\n", in vop2_crtc_atomic_enable()
1636 vop2_lock(vop2); in vop2_crtc_atomic_enable()
1640 drm_err(vop2->drm, "failed to enable dclk for video port%d - %d\n", in vop2_crtc_atomic_enable()
1642 vop2_unlock(vop2); in vop2_crtc_atomic_enable()
1646 if (!vop2->enable_count) in vop2_crtc_atomic_enable()
1647 vop2_enable(vop2); in vop2_crtc_atomic_enable()
1649 vop2->enable_count++; in vop2_crtc_atomic_enable()
1671 clock = vop2->ops->setup_intf_mux(vp, rkencoder->crtc_endpoint_id, polflags); in vop2_crtc_atomic_enable()
1675 vop2_unlock(vop2); in vop2_crtc_atomic_enable()
1689 if (vop2_output_rg_swap(vop2, vcstate->bus_format)) in vop2_crtc_atomic_enable()
1724 vop2_writel(vop2, RK3568_VP_LINE_FLAG(vp->id), in vop2_crtc_atomic_enable()
1740 if ((vop2->pll_hdmiphy0 || vop2->pll_hdmiphy1) && clock <= VOP2_MAX_DCLK_RATE) { in vop2_crtc_atomic_enable()
1745 if (!vop2->pll_hdmiphy0) in vop2_crtc_atomic_enable()
1751 ret = clk_set_parent(vp->dclk, vop2->pll_hdmiphy0); in vop2_crtc_atomic_enable()
1753 drm_warn(vop2->drm, in vop2_crtc_atomic_enable()
1759 if (!vop2->pll_hdmiphy1) in vop2_crtc_atomic_enable()
1765 ret = clk_set_parent(vp->dclk, vop2->pll_hdmiphy1); in vop2_crtc_atomic_enable()
1767 drm_warn(vop2->drm, in vop2_crtc_atomic_enable()
1782 vop2_crtc_atomic_try_set_gamma(vop2, vp, crtc, crtc_state); in vop2_crtc_atomic_enable()
1786 vop2_unlock(vop2); in vop2_crtc_atomic_enable()
1794 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_check_gamma() local
1797 if (!vp->vop2->lut_regs || !crtc_state->color_mgmt_changed || in vop2_crtc_atomic_check_gamma()
1803 drm_dbg(vop2->drm, "Invalid LUT size; got %d, expected %d\n", in vop2_crtc_atomic_check_gamma()
1808 if (!vop2_supports_seamless_gamma_lut_update(vop2) && vop2_gamma_lut_in_use(vop2, vp)) { in vop2_crtc_atomic_check_gamma()
1809 drm_info(vop2->drm, "Gamma LUT can be enabled for only one CRTC at a time\n"); in vop2_crtc_atomic_check_gamma()
1842 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_begin() local
1844 vop2->ops->setup_overlay(vp); in vop2_crtc_atomic_begin()
1852 struct vop2 *vop2 = vp->vop2; in vop2_crtc_atomic_flush() local
1856 vop2_crtc_atomic_try_set_gamma_locked(vop2, vp, crtc, crtc_state); in vop2_crtc_atomic_flush()
2008 static void vop2_regs_print(struct vop2 *vop2, struct seq_file *s, in vop2_regs_print() argument
2016 val = vop2_readl(vop2, dump->base + dump->en_reg); in vop2_regs_print()
2023 start = vop2->res->start + dump->base; in vop2_regs_print()
2026 vop2_readl(vop2, dump->base + (4 * i)), in vop2_regs_print()
2027 vop2_readl(vop2, dump->base + (4 * (i + 1))), in vop2_regs_print()
2028 vop2_readl(vop2, dump->base + (4 * (i + 2))), in vop2_regs_print()
2029 vop2_readl(vop2, dump->base + (4 * (i + 3)))); in vop2_regs_print()
2036 struct vop2 *vop2 = node->info_ent->data; in __vop2_regs_dump() local
2044 regcache_drop_region(vop2->map, 0, vop2_regmap_config.max_register); in __vop2_regs_dump()
2046 if (vop2->enable_count) { in __vop2_regs_dump()
2047 for (i = 0; i < vop2->data->regs_dump_size; i++) { in __vop2_regs_dump()
2048 dump = &vop2->data->regs_dump[i]; in __vop2_regs_dump()
2049 vop2_regs_print(vop2, s, dump, active_only); in __vop2_regs_dump()
2077 static void vop2_debugfs_init(struct vop2 *vop2, struct drm_minor *minor) in vop2_debugfs_init() argument
2082 root = debugfs_create_dir("vop2", minor->debugfs_root); in vop2_debugfs_init()
2085 vop2_debugfs_list[i].data = vop2; in vop2_debugfs_init()
2096 struct vop2 *vop2 = vp->vop2; in vop2_crtc_late_register() local
2099 vop2_debugfs_init(vop2, crtc->dev->primary); in vop2_crtc_late_register()
2159 struct vop2 *vop2 = vp->vop2; in rk3576_vp_isr() local
2164 if (!pm_runtime_get_if_in_use(vop2->dev)) in rk3576_vp_isr()
2167 irqs = vop2_readl(vop2, RK3568_VP_INT_STATUS(vp->id)); in rk3576_vp_isr()
2168 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs); in rk3576_vp_isr()
2179 u32 val = vop2_readl(vop2, RK3568_REG_CFG_DONE); in rk3576_vp_isr()
2193 drm_err_ratelimited(vop2->drm, "POST_BUF_EMPTY irq err at vp%d\n", vp->id); in rk3576_vp_isr()
2197 pm_runtime_put(vop2->dev); in rk3576_vp_isr()
2204 struct vop2 *vop2 = data; in vop2_isr() local
2205 const struct vop2_data *vop2_data = vop2->data; in vop2_isr()
2212 * vop2-device is disabled the irq has to be targeted at the iommu. in vop2_isr()
2214 if (!pm_runtime_get_if_in_use(vop2->dev)) in vop2_isr()
2217 if (vop2->version < VOP_VERSION_RK3576) { in vop2_isr()
2219 struct vop2_video_port *vp = &vop2->vps[i]; in vop2_isr()
2223 irqs = vop2_readl(vop2, RK3568_VP_INT_STATUS(vp->id)); in vop2_isr()
2224 vop2_writel(vop2, RK3568_VP_INT_CLR(vp->id), irqs << 16 | irqs); in vop2_isr()
2235 u32 val = vop2_readl(vop2, RK3568_REG_CFG_DONE); in vop2_isr()
2249 drm_err_ratelimited(vop2->drm, in vop2_isr()
2257 axi_irqs[0] = vop2_readl(vop2, RK3568_SYS0_INT_STATUS); in vop2_isr()
2258 vop2_writel(vop2, RK3568_SYS0_INT_CLR, axi_irqs[0] << 16 | axi_irqs[0]); in vop2_isr()
2259 axi_irqs[1] = vop2_readl(vop2, RK3568_SYS1_INT_STATUS); in vop2_isr()
2260 vop2_writel(vop2, RK3568_SYS1_INT_CLR, axi_irqs[1] << 16 | axi_irqs[1]); in vop2_isr()
2264 drm_err_ratelimited(vop2->drm, "BUS_ERROR irq err\n"); in vop2_isr()
2269 pm_runtime_put(vop2->dev); in vop2_isr()
2274 static int vop2_plane_init(struct vop2 *vop2, struct vop2_win *win, in vop2_plane_init() argument
2283 ret = drm_universal_plane_init(vop2->drm, &win->base, possible_crtcs, in vop2_plane_init()
2289 drm_err(vop2->drm, "failed to initialize plane %d\n", ret); in vop2_plane_init()
2302 vop2->registered_num_wins - 1); in vop2_plane_init()
2316 struct vop2 *vop2 = win->vop2; in vop2_is_mirror_win() local
2318 if (vop2->data->soc_id == 3566) { in vop2_is_mirror_win()
2332 static int vop2_create_crtcs(struct vop2 *vop2) in vop2_create_crtcs() argument
2334 const struct vop2_data *vop2_data = vop2->data; in vop2_create_crtcs()
2335 struct drm_device *drm = vop2->drm; in vop2_create_crtcs()
2336 struct device *dev = vop2->dev; in vop2_create_crtcs()
2351 vp = &vop2->vps[i]; in vop2_create_crtcs()
2352 vp->vop2 = vop2; in vop2_create_crtcs()
2357 vp->dclk = devm_clk_get(vop2->dev, dclk_name); in vop2_create_crtcs()
2364 drm_dbg(vop2->drm, "%s: No remote for vp%d\n", __func__, i); in vop2_create_crtcs()
2380 vp = &vop2->vps[i]; in vop2_create_crtcs()
2385 for (j = 0; j < vop2->registered_num_wins; j++) { in vop2_create_crtcs()
2386 win = &vop2->win[j]; in vop2_create_crtcs()
2402 ret = vop2_plane_init(vop2, win, possible_crtcs); in vop2_create_crtcs()
2418 for (i = 0; i < vop2->registered_num_wins; i++) { in vop2_create_crtcs()
2419 win = &vop2->win[i]; in vop2_create_crtcs()
2433 vp = &vop2->vps[j]; in vop2_create_crtcs()
2443 ret = vop2_plane_init(vop2, win, possible_crtcs); in vop2_create_crtcs()
2450 vp = &vop2->vps[i]; in vop2_create_crtcs()
2465 if (vop2->lut_regs) { in vop2_create_crtcs()
2475 * On the VOP2 it's very hard to change the number of layers on a VP in vop2_create_crtcs()
2479 for (i = 0; i < vop2->data->nr_vps; i++) { in vop2_create_crtcs()
2480 struct vop2_video_port *vp = &vop2->vps[i]; in vop2_create_crtcs()
2489 static void vop2_destroy_crtcs(struct vop2 *vop2) in vop2_destroy_crtcs() argument
2491 struct drm_device *drm = vop2->drm; in vop2_destroy_crtcs()
2510 static int vop2_find_rgb_encoder(struct vop2 *vop2) in vop2_find_rgb_encoder() argument
2512 struct device_node *node = vop2->dev->of_node; in vop2_find_rgb_encoder()
2516 for (i = 0; i < vop2->data->nr_vps; i++) { in vop2_find_rgb_encoder()
2532 struct vop2 *vop2 = win->vop2; in vop2_regmap_init() local
2543 win->reg[i] = devm_regmap_field_alloc(vop2->dev, vop2->map, field); in vop2_regmap_init()
2551 static int vop2_win_init(struct vop2 *vop2) in vop2_win_init() argument
2553 const struct vop2_data *vop2_data = vop2->data; in vop2_win_init()
2560 win = &vop2->win[i]; in vop2_win_init()
2565 win->vop2 = vop2; in vop2_win_init()
2567 ret = vop2_regmap_init(win, vop2->data->cluster_reg, in vop2_win_init()
2568 vop2->data->nr_cluster_regs); in vop2_win_init()
2570 ret = vop2_regmap_init(win, vop2->data->smart_reg, in vop2_win_init()
2571 vop2->data->nr_smart_regs); in vop2_win_init()
2576 vop2->registered_num_wins = vop2_data->win_size; in vop2_win_init()
2602 .name = "vop2",
2612 struct vop2 *vop2; in vop2_bind() local
2621 /* Allocate vop2 struct and its vop2_win array */ in vop2_bind()
2622 alloc_size = struct_size(vop2, win, vop2_data->win_size); in vop2_bind()
2623 vop2 = devm_kzalloc(dev, alloc_size, GFP_KERNEL); in vop2_bind()
2624 if (!vop2) in vop2_bind()
2627 vop2->dev = dev; in vop2_bind()
2628 vop2->data = vop2_data; in vop2_bind()
2629 vop2->ops = vop2_data->ops; in vop2_bind()
2630 vop2->version = vop2_data->version; in vop2_bind()
2631 vop2->drm = drm; in vop2_bind()
2633 dev_set_drvdata(dev, vop2); in vop2_bind()
2638 "failed to get vop2 register byname\n"); in vop2_bind()
2640 vop2->res = res; in vop2_bind()
2641 vop2->regs = devm_ioremap_resource(dev, res); in vop2_bind()
2642 if (IS_ERR(vop2->regs)) in vop2_bind()
2643 return PTR_ERR(vop2->regs); in vop2_bind()
2644 vop2->len = resource_size(res); in vop2_bind()
2646 vop2->map = devm_regmap_init_mmio(dev, vop2->regs, &vop2_regmap_config); in vop2_bind()
2647 if (IS_ERR(vop2->map)) in vop2_bind()
2648 return PTR_ERR(vop2->map); in vop2_bind()
2650 ret = vop2_win_init(vop2); in vop2_bind()
2656 vop2->lut_regs = devm_ioremap_resource(dev, res); in vop2_bind()
2657 if (IS_ERR(vop2->lut_regs)) in vop2_bind()
2658 return PTR_ERR(vop2->lut_regs); in vop2_bind()
2661 vop2->sys_grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); in vop2_bind()
2662 if (IS_ERR(vop2->sys_grf)) in vop2_bind()
2663 return dev_err_probe(drm->dev, PTR_ERR(vop2->sys_grf), in vop2_bind()
2668 vop2->vop_grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,vop-grf"); in vop2_bind()
2669 if (IS_ERR(vop2->vop_grf)) in vop2_bind()
2670 return dev_err_probe(drm->dev, PTR_ERR(vop2->vop_grf), in vop2_bind()
2675 vop2->vo1_grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,vo1-grf"); in vop2_bind()
2676 if (IS_ERR(vop2->vo1_grf)) in vop2_bind()
2677 return dev_err_probe(drm->dev, PTR_ERR(vop2->vo1_grf), in vop2_bind()
2682 vop2->sys_pmu = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,pmu"); in vop2_bind()
2683 if (IS_ERR(vop2->sys_pmu)) in vop2_bind()
2684 return dev_err_probe(drm->dev, PTR_ERR(vop2->sys_pmu), in vop2_bind()
2688 vop2->hclk = devm_clk_get(vop2->dev, "hclk"); in vop2_bind()
2689 if (IS_ERR(vop2->hclk)) in vop2_bind()
2690 return dev_err_probe(drm->dev, PTR_ERR(vop2->hclk), in vop2_bind()
2693 vop2->aclk = devm_clk_get(vop2->dev, "aclk"); in vop2_bind()
2694 if (IS_ERR(vop2->aclk)) in vop2_bind()
2695 return dev_err_probe(drm->dev, PTR_ERR(vop2->aclk), in vop2_bind()
2698 vop2->pclk = devm_clk_get_optional(vop2->dev, "pclk_vop"); in vop2_bind()
2699 if (IS_ERR(vop2->pclk)) in vop2_bind()
2700 return dev_err_probe(drm->dev, PTR_ERR(vop2->pclk), in vop2_bind()
2703 vop2->pll_hdmiphy0 = devm_clk_get_optional(vop2->dev, "pll_hdmiphy0"); in vop2_bind()
2704 if (IS_ERR(vop2->pll_hdmiphy0)) in vop2_bind()
2705 return dev_err_probe(drm->dev, PTR_ERR(vop2->pll_hdmiphy0), in vop2_bind()
2708 vop2->pll_hdmiphy1 = devm_clk_get_optional(vop2->dev, "pll_hdmiphy1"); in vop2_bind()
2709 if (IS_ERR(vop2->pll_hdmiphy1)) in vop2_bind()
2710 return dev_err_probe(drm->dev, PTR_ERR(vop2->pll_hdmiphy1), in vop2_bind()
2713 vop2->irq = platform_get_irq(pdev, 0); in vop2_bind()
2714 if (vop2->irq < 0) in vop2_bind()
2715 return dev_err_probe(drm->dev, vop2->irq, "cannot find irq for vop2\n"); in vop2_bind()
2717 mutex_init(&vop2->vop2_lock); in vop2_bind()
2718 mutex_init(&vop2->ovl_lock); in vop2_bind()
2720 ret = devm_request_irq(dev, vop2->irq, vop2_isr, IRQF_SHARED, dev_name(dev), vop2); in vop2_bind()
2724 ret = vop2_create_crtcs(vop2); in vop2_bind()
2728 if (vop2->version >= VOP_VERSION_RK3576) { in vop2_bind()
2742 "cannot find irq for vop2 vp%d\n", vp->id); in vop2_bind()
2748 "request irq for vop2 vp%d failed\n", vp->id); in vop2_bind()
2752 ret = vop2_find_rgb_encoder(vop2); in vop2_bind()
2754 vop2->rgb = rockchip_rgb_init(dev, &vop2->vps[ret].crtc, in vop2_bind()
2755 vop2->drm, ret); in vop2_bind()
2756 if (IS_ERR(vop2->rgb)) { in vop2_bind()
2757 if (PTR_ERR(vop2->rgb) == -EPROBE_DEFER) { in vop2_bind()
2758 ret = PTR_ERR(vop2->rgb); in vop2_bind()
2761 vop2->rgb = NULL; in vop2_bind()
2765 rockchip_drm_dma_init_device(vop2->drm, vop2->dev); in vop2_bind()
2772 vop2_destroy_crtcs(vop2); in vop2_bind()
2779 struct vop2 *vop2 = dev_get_drvdata(dev); in vop2_unbind() local
2783 if (vop2->rgb) in vop2_unbind()
2784 rockchip_rgb_fini(vop2->rgb); in vop2_unbind()
2786 vop2_destroy_crtcs(vop2); in vop2_unbind()