Lines Matching +full:hdmi +full:- +full:connector

1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2021-2022 Rockchip Electronics Co., Ltd.
6 * Author: Algea Cao <algea.cao@rock-chips.com>
92 struct dw_hdmi_qp *hdmi; member
101 void (*io_init)(struct rockchip_hdmi_qp *hdmi);
115 struct rockchip_hdmi_qp *hdmi = to_rockchip_hdmi_qp(encoder); in dw_hdmi_qp_rockchip_encoder_enable() local
116 struct drm_crtc *crtc = encoder->crtc; in dw_hdmi_qp_rockchip_encoder_enable()
120 gpiod_set_value(hdmi->enable_gpio, 1); in dw_hdmi_qp_rockchip_encoder_enable()
122 if (crtc && crtc->state) { in dw_hdmi_qp_rockchip_encoder_enable()
123 rate = drm_hdmi_compute_mode_clock(&crtc->state->adjusted_mode, in dw_hdmi_qp_rockchip_encoder_enable()
130 * drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c in dw_hdmi_qp_rockchip_encoder_enable()
132 phy_set_bus_width(hdmi->phy, div_u64(rate, 100)); in dw_hdmi_qp_rockchip_encoder_enable()
143 s->output_mode = ROCKCHIP_OUT_MODE_AAAA; in dw_hdmi_qp_rockchip_encoder_atomic_check()
144 s->output_type = DRM_MODE_CONNECTOR_HDMIA; in dw_hdmi_qp_rockchip_encoder_atomic_check()
157 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_phy_init() local
159 return phy_power_on(hdmi->phy); in dw_hdmi_qp_rk3588_phy_init()
165 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_phy_disable() local
167 phy_power_off(hdmi->phy); in dw_hdmi_qp_rk3588_phy_disable()
173 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_read_hpd() local
176 regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &val); in dw_hdmi_qp_rk3588_read_hpd()
177 val &= hdmi->port_id ? RK3588_HDMI1_LEVEL_INT : RK3588_HDMI0_LEVEL_INT; in dw_hdmi_qp_rk3588_read_hpd()
184 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3588_setup_hpd() local
187 if (hdmi->port_id) in dw_hdmi_qp_rk3588_setup_hpd()
194 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_setup_hpd()
207 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3576_read_hpd() local
210 regmap_read(hdmi->regmap, RK3576_IOC_HDMI_HPD_STATUS, &val); in dw_hdmi_qp_rk3576_read_hpd()
218 struct rockchip_hdmi_qp *hdmi = (struct rockchip_hdmi_qp *)data; in dw_hdmi_qp_rk3576_setup_hpd() local
224 regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val); in dw_hdmi_qp_rk3576_setup_hpd()
225 regmap_write(hdmi->regmap, 0xa404, 0xffff0102); in dw_hdmi_qp_rk3576_setup_hpd()
237 struct rockchip_hdmi_qp *hdmi = container_of(work, in dw_hdmi_qp_rk3588_hpd_work() local
240 struct drm_device *drm = hdmi->encoder.encoder.dev; in dw_hdmi_qp_rk3588_hpd_work()
246 dev_dbg(hdmi->dev, "connector status changed\n"); in dw_hdmi_qp_rk3588_hpd_work()
252 struct rockchip_hdmi_qp *hdmi = dev_id; in dw_hdmi_qp_rk3576_hardirq() local
255 regmap_read(hdmi->regmap, RK3576_IOC_HDMI_HPD_STATUS, &intr_stat); in dw_hdmi_qp_rk3576_hardirq()
259 regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val); in dw_hdmi_qp_rk3576_hardirq()
268 struct rockchip_hdmi_qp *hdmi = dev_id; in dw_hdmi_qp_rk3576_irq() local
271 regmap_read(hdmi->regmap, RK3576_IOC_HDMI_HPD_STATUS, &intr_stat); in dw_hdmi_qp_rk3576_irq()
277 regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val); in dw_hdmi_qp_rk3576_irq()
278 mod_delayed_work(system_wq, &hdmi->hpd_work, in dw_hdmi_qp_rk3576_irq()
282 regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val); in dw_hdmi_qp_rk3576_irq()
289 struct rockchip_hdmi_qp *hdmi = dev_id; in dw_hdmi_qp_rk3588_hardirq() local
292 regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &intr_stat); in dw_hdmi_qp_rk3588_hardirq()
295 if (hdmi->port_id) in dw_hdmi_qp_rk3588_hardirq()
301 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_hardirq()
310 struct rockchip_hdmi_qp *hdmi = dev_id; in dw_hdmi_qp_rk3588_irq() local
313 regmap_read(hdmi->regmap, RK3588_GRF_SOC_STATUS1, &intr_stat); in dw_hdmi_qp_rk3588_irq()
317 if (hdmi->port_id) in dw_hdmi_qp_rk3588_irq()
323 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_irq()
325 mod_delayed_work(system_wq, &hdmi->hpd_work, in dw_hdmi_qp_rk3588_irq()
328 if (hdmi->port_id) in dw_hdmi_qp_rk3588_irq()
332 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_irq()
337 static void dw_hdmi_qp_rk3576_io_init(struct rockchip_hdmi_qp *hdmi) in dw_hdmi_qp_rk3576_io_init() argument
346 regmap_write(hdmi->vo_regmap, RK3576_VO0_GRF_SOC_CON14, val); in dw_hdmi_qp_rk3576_io_init()
349 regmap_write(hdmi->regmap, RK3576_IOC_MISC_CON0, val); in dw_hdmi_qp_rk3576_io_init()
352 static void dw_hdmi_qp_rk3588_io_init(struct rockchip_hdmi_qp *hdmi) in dw_hdmi_qp_rk3588_io_init() argument
360 regmap_write(hdmi->vo_regmap, in dw_hdmi_qp_rk3588_io_init()
361 hdmi->port_id ? RK3588_GRF_VO1_CON6 : RK3588_GRF_VO1_CON3, in dw_hdmi_qp_rk3588_io_init()
365 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON7, val); in dw_hdmi_qp_rk3588_io_init()
367 if (hdmi->port_id) in dw_hdmi_qp_rk3588_io_init()
371 regmap_write(hdmi->vo_regmap, RK3588_GRF_VO1_CON9, val); in dw_hdmi_qp_rk3588_io_init()
373 if (hdmi->port_id) in dw_hdmi_qp_rk3588_io_init()
377 regmap_write(hdmi->regmap, RK3588_GRF_SOC_CON2, val); in dw_hdmi_qp_rk3588_io_init()
420 .compatible = "rockchip,rk3576-dw-hdmi-qp",
423 .compatible = "rockchip,rk3588-dw-hdmi-qp",
437 struct drm_connector *connector; in dw_hdmi_qp_rockchip_bind() local
439 struct rockchip_hdmi_qp *hdmi; in dw_hdmi_qp_rockchip_bind() local
444 if (!pdev->dev.of_node) in dw_hdmi_qp_rockchip_bind()
445 return -ENODEV; in dw_hdmi_qp_rockchip_bind()
447 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); in dw_hdmi_qp_rockchip_bind()
448 if (!hdmi) in dw_hdmi_qp_rockchip_bind()
449 return -ENOMEM; in dw_hdmi_qp_rockchip_bind()
453 return -ENODEV; in dw_hdmi_qp_rockchip_bind()
457 return -ENODEV; in dw_hdmi_qp_rockchip_bind()
459 if (!cfg->ctrl_ops || !cfg->ctrl_ops->io_init || in dw_hdmi_qp_rockchip_bind()
460 !cfg->ctrl_ops->irq_callback || !cfg->ctrl_ops->hardirq_callback) { in dw_hdmi_qp_rockchip_bind()
462 return -ENODEV; in dw_hdmi_qp_rockchip_bind()
465 hdmi->ctrl_ops = cfg->ctrl_ops; in dw_hdmi_qp_rockchip_bind()
466 hdmi->dev = &pdev->dev; in dw_hdmi_qp_rockchip_bind()
467 hdmi->port_id = -ENODEV; in dw_hdmi_qp_rockchip_bind()
470 for (i = 0; i < cfg->num_ports; i++) { in dw_hdmi_qp_rockchip_bind()
471 if (res->start == cfg->port_ids[i]) { in dw_hdmi_qp_rockchip_bind()
472 hdmi->port_id = i; in dw_hdmi_qp_rockchip_bind()
476 if (hdmi->port_id < 0) { in dw_hdmi_qp_rockchip_bind()
477 dev_err(hdmi->dev, "Failed to match HDMI port ID\n"); in dw_hdmi_qp_rockchip_bind()
478 return hdmi->port_id; in dw_hdmi_qp_rockchip_bind()
481 plat_data.phy_ops = cfg->phy_ops; in dw_hdmi_qp_rockchip_bind()
482 plat_data.phy_data = hdmi; in dw_hdmi_qp_rockchip_bind()
484 encoder = &hdmi->encoder.encoder; in dw_hdmi_qp_rockchip_bind()
485 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); in dw_hdmi_qp_rockchip_bind()
487 rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder, in dw_hdmi_qp_rockchip_bind()
488 dev->of_node, 0, 0); in dw_hdmi_qp_rockchip_bind()
495 if (encoder->possible_crtcs == 0) in dw_hdmi_qp_rockchip_bind()
496 return -EPROBE_DEFER; in dw_hdmi_qp_rockchip_bind()
498 hdmi->regmap = syscon_regmap_lookup_by_phandle(dev->of_node, in dw_hdmi_qp_rockchip_bind()
500 if (IS_ERR(hdmi->regmap)) { in dw_hdmi_qp_rockchip_bind()
501 dev_err(hdmi->dev, "Unable to get rockchip,grf\n"); in dw_hdmi_qp_rockchip_bind()
502 return PTR_ERR(hdmi->regmap); in dw_hdmi_qp_rockchip_bind()
505 hdmi->vo_regmap = syscon_regmap_lookup_by_phandle(dev->of_node, in dw_hdmi_qp_rockchip_bind()
506 "rockchip,vo-grf"); in dw_hdmi_qp_rockchip_bind()
507 if (IS_ERR(hdmi->vo_regmap)) { in dw_hdmi_qp_rockchip_bind()
508 dev_err(hdmi->dev, "Unable to get rockchip,vo-grf\n"); in dw_hdmi_qp_rockchip_bind()
509 return PTR_ERR(hdmi->vo_regmap); in dw_hdmi_qp_rockchip_bind()
512 ret = devm_clk_bulk_get_all_enabled(hdmi->dev, &clks); in dw_hdmi_qp_rockchip_bind()
514 dev_err(hdmi->dev, "Failed to get clocks: %d\n", ret); in dw_hdmi_qp_rockchip_bind()
518 hdmi->enable_gpio = devm_gpiod_get_optional(hdmi->dev, "enable", in dw_hdmi_qp_rockchip_bind()
520 if (IS_ERR(hdmi->enable_gpio)) { in dw_hdmi_qp_rockchip_bind()
521 ret = PTR_ERR(hdmi->enable_gpio); in dw_hdmi_qp_rockchip_bind()
522 dev_err(hdmi->dev, "Failed to request enable GPIO: %d\n", ret); in dw_hdmi_qp_rockchip_bind()
526 hdmi->phy = devm_of_phy_get_by_index(dev, dev->of_node, 0); in dw_hdmi_qp_rockchip_bind()
527 if (IS_ERR(hdmi->phy)) { in dw_hdmi_qp_rockchip_bind()
528 ret = PTR_ERR(hdmi->phy); in dw_hdmi_qp_rockchip_bind()
529 if (ret != -EPROBE_DEFER) in dw_hdmi_qp_rockchip_bind()
530 dev_err(hdmi->dev, "failed to get phy: %d\n", ret); in dw_hdmi_qp_rockchip_bind()
534 cfg->ctrl_ops->io_init(hdmi); in dw_hdmi_qp_rockchip_bind()
536 INIT_DELAYED_WORK(&hdmi->hpd_work, dw_hdmi_qp_rk3588_hpd_work); in dw_hdmi_qp_rockchip_bind()
546 ret = devm_request_threaded_irq(hdmi->dev, irq, in dw_hdmi_qp_rockchip_bind()
547 cfg->ctrl_ops->hardirq_callback, in dw_hdmi_qp_rockchip_bind()
548 cfg->ctrl_ops->irq_callback, in dw_hdmi_qp_rockchip_bind()
549 IRQF_SHARED, "dw-hdmi-qp-hpd", in dw_hdmi_qp_rockchip_bind()
550 hdmi); in dw_hdmi_qp_rockchip_bind()
557 platform_set_drvdata(pdev, hdmi); in dw_hdmi_qp_rockchip_bind()
559 hdmi->hdmi = dw_hdmi_qp_bind(pdev, encoder, &plat_data); in dw_hdmi_qp_rockchip_bind()
560 if (IS_ERR(hdmi->hdmi)) { in dw_hdmi_qp_rockchip_bind()
561 ret = PTR_ERR(hdmi->hdmi); in dw_hdmi_qp_rockchip_bind()
566 connector = drm_bridge_connector_init(drm, encoder); in dw_hdmi_qp_rockchip_bind()
567 if (IS_ERR(connector)) { in dw_hdmi_qp_rockchip_bind()
568 ret = PTR_ERR(connector); in dw_hdmi_qp_rockchip_bind()
569 dev_err(hdmi->dev, "failed to init bridge connector: %d\n", ret); in dw_hdmi_qp_rockchip_bind()
573 return drm_connector_attach_encoder(connector, encoder); in dw_hdmi_qp_rockchip_bind()
580 struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev); in dw_hdmi_qp_rockchip_unbind() local
582 cancel_delayed_work_sync(&hdmi->hpd_work); in dw_hdmi_qp_rockchip_unbind()
584 drm_encoder_cleanup(&hdmi->encoder.encoder); in dw_hdmi_qp_rockchip_unbind()
594 return component_add(&pdev->dev, &dw_hdmi_qp_rockchip_ops); in dw_hdmi_qp_rockchip_probe()
599 component_del(&pdev->dev, &dw_hdmi_qp_rockchip_ops); in dw_hdmi_qp_rockchip_remove()
604 struct rockchip_hdmi_qp *hdmi = dev_get_drvdata(dev); in dw_hdmi_qp_rockchip_resume() local
606 hdmi->ctrl_ops->io_init(hdmi); in dw_hdmi_qp_rockchip_resume()
608 dw_hdmi_qp_resume(dev, hdmi->hdmi); in dw_hdmi_qp_rockchip_resume()
610 if (hdmi->encoder.encoder.dev) in dw_hdmi_qp_rockchip_resume()
611 drm_helper_hpd_irq_event(hdmi->encoder.encoder.dev); in dw_hdmi_qp_rockchip_resume()
624 .name = "dwhdmiqp-rockchip",