Lines Matching +full:rk3288 +full:- +full:dw +full:- +full:hdmi
1 // SPDX-License-Identifier: GPL-2.0-or-later
38 /* need to be unset if hdmi or i2c should control voltage */
60 * struct rockchip_hdmi_chip_data - splite the grf setting of kind of chips
62 * @lcdsel_big: reg value of selecting vop big for HDMI
63 * @lcdsel_lit: reg value of selecting vop little for HDMI
81 struct dw_hdmi *hdmi; member
209 static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) in rockchip_hdmi_parse_dt() argument
211 struct device_node *np = hdmi->dev->of_node; in rockchip_hdmi_parse_dt()
214 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); in rockchip_hdmi_parse_dt()
215 if (IS_ERR(hdmi->regmap)) { in rockchip_hdmi_parse_dt()
216 drm_err(hdmi, "Unable to get rockchip,grf\n"); in rockchip_hdmi_parse_dt()
217 return PTR_ERR(hdmi->regmap); in rockchip_hdmi_parse_dt()
220 hdmi->ref_clk = devm_clk_get_optional_enabled(hdmi->dev, "ref"); in rockchip_hdmi_parse_dt()
221 if (!hdmi->ref_clk) in rockchip_hdmi_parse_dt()
222 hdmi->ref_clk = devm_clk_get_optional_enabled(hdmi->dev, "vpll"); in rockchip_hdmi_parse_dt()
224 if (IS_ERR(hdmi->ref_clk)) { in rockchip_hdmi_parse_dt()
225 ret = PTR_ERR(hdmi->ref_clk); in rockchip_hdmi_parse_dt()
226 if (ret != -EPROBE_DEFER) in rockchip_hdmi_parse_dt()
227 drm_err(hdmi, "failed to get reference clock\n"); in rockchip_hdmi_parse_dt()
231 hdmi->grf_clk = devm_clk_get_optional(hdmi->dev, "grf"); in rockchip_hdmi_parse_dt()
232 if (IS_ERR(hdmi->grf_clk)) { in rockchip_hdmi_parse_dt()
233 ret = PTR_ERR(hdmi->grf_clk); in rockchip_hdmi_parse_dt()
234 if (ret != -EPROBE_DEFER) in rockchip_hdmi_parse_dt()
235 drm_err(hdmi, "failed to get grf clock\n"); in rockchip_hdmi_parse_dt()
239 ret = devm_regulator_get_enable(hdmi->dev, "avdd-0v9"); in rockchip_hdmi_parse_dt()
243 ret = devm_regulator_get_enable(hdmi->dev, "avdd-1v8"); in rockchip_hdmi_parse_dt()
253 struct rockchip_hdmi *hdmi = data; in dw_hdmi_rockchip_mode_valid() local
255 int pclk = mode->clock * 1000; in dw_hdmi_rockchip_mode_valid()
256 bool exact_match = hdmi->plat_data->phy_force_vendor; in dw_hdmi_rockchip_mode_valid()
259 if (hdmi->chip_data->max_tmds_clock && in dw_hdmi_rockchip_mode_valid()
260 mode->clock > hdmi->chip_data->max_tmds_clock) in dw_hdmi_rockchip_mode_valid()
263 if (hdmi->ref_clk) { in dw_hdmi_rockchip_mode_valid()
264 int rpclk = clk_round_rate(hdmi->ref_clk, pclk); in dw_hdmi_rockchip_mode_valid()
266 if (abs(rpclk - pclk) > pclk / 1000) in dw_hdmi_rockchip_mode_valid()
304 struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); in dw_hdmi_rockchip_encoder_mode_set() local
306 clk_set_rate(hdmi->ref_clk, adj_mode->clock * 1000); in dw_hdmi_rockchip_encoder_mode_set()
311 struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); in dw_hdmi_rockchip_encoder_enable() local
315 if (hdmi->chip_data->lcdsel_grf_reg < 0) in dw_hdmi_rockchip_encoder_enable()
318 ret = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder); in dw_hdmi_rockchip_encoder_enable()
320 val = hdmi->chip_data->lcdsel_lit; in dw_hdmi_rockchip_encoder_enable()
322 val = hdmi->chip_data->lcdsel_big; in dw_hdmi_rockchip_encoder_enable()
324 ret = clk_prepare_enable(hdmi->grf_clk); in dw_hdmi_rockchip_encoder_enable()
326 drm_err(hdmi, "failed to enable grfclk %d\n", ret); in dw_hdmi_rockchip_encoder_enable()
330 ret = regmap_write(hdmi->regmap, hdmi->chip_data->lcdsel_grf_reg, val); in dw_hdmi_rockchip_encoder_enable()
332 drm_err(hdmi, "Could not write to GRF: %d\n", ret); in dw_hdmi_rockchip_encoder_enable()
334 clk_disable_unprepare(hdmi->grf_clk); in dw_hdmi_rockchip_encoder_enable()
335 drm_dbg(hdmi, "vop %s output to hdmi\n", ret ? "LIT" : "BIG"); in dw_hdmi_rockchip_encoder_enable()
345 s->output_mode = ROCKCHIP_OUT_MODE_AAAA; in dw_hdmi_rockchip_encoder_atomic_check()
346 s->output_type = DRM_MODE_CONNECTOR_HDMIA; in dw_hdmi_rockchip_encoder_atomic_check()
363 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rockchip_genphy_init() local
367 return phy_power_on(hdmi->phy); in dw_hdmi_rockchip_genphy_init()
372 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rockchip_genphy_disable() local
374 phy_power_off(hdmi->phy); in dw_hdmi_rockchip_genphy_disable()
379 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rk3228_setup_hpd() local
383 regmap_write(hdmi->regmap, in dw_hdmi_rk3228_setup_hpd()
390 regmap_write(hdmi->regmap, in dw_hdmi_rk3228_setup_hpd()
399 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rk3328_read_hpd() local
405 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_read_hpd()
410 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_read_hpd()
419 struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; in dw_hdmi_rk3328_setup_hpd() local
423 /* Enable and map pins to 3V grf-controlled io-voltage */ in dw_hdmi_rk3328_setup_hpd()
424 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_setup_hpd()
429 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_setup_hpd()
434 regmap_write(hdmi->regmap, in dw_hdmi_rk3328_setup_hpd()
452 .lcdsel_grf_reg = -1,
488 .lcdsel_grf_reg = -1,
518 .lcdsel_grf_reg = -1,
532 { .compatible = "rockchip,rk3228-dw-hdmi",
535 { .compatible = "rockchip,rk3288-dw-hdmi",
538 { .compatible = "rockchip,rk3328-dw-hdmi",
541 { .compatible = "rockchip,rk3399-dw-hdmi",
544 { .compatible = "rockchip,rk3568-dw-hdmi",
559 struct rockchip_hdmi *hdmi; in dw_hdmi_rockchip_bind() local
562 if (!pdev->dev.of_node) in dw_hdmi_rockchip_bind()
563 return -ENODEV; in dw_hdmi_rockchip_bind()
565 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); in dw_hdmi_rockchip_bind()
566 if (!hdmi) in dw_hdmi_rockchip_bind()
567 return -ENOMEM; in dw_hdmi_rockchip_bind()
569 match = of_match_node(dw_hdmi_rockchip_dt_ids, pdev->dev.of_node); in dw_hdmi_rockchip_bind()
570 plat_data = devm_kmemdup(&pdev->dev, match->data, in dw_hdmi_rockchip_bind()
573 return -ENOMEM; in dw_hdmi_rockchip_bind()
575 hdmi->dev = &pdev->dev; in dw_hdmi_rockchip_bind()
576 hdmi->plat_data = plat_data; in dw_hdmi_rockchip_bind()
577 hdmi->chip_data = plat_data->phy_data; in dw_hdmi_rockchip_bind()
578 plat_data->phy_data = hdmi; in dw_hdmi_rockchip_bind()
579 plat_data->priv_data = hdmi; in dw_hdmi_rockchip_bind()
580 encoder = &hdmi->encoder.encoder; in dw_hdmi_rockchip_bind()
582 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); in dw_hdmi_rockchip_bind()
583 rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder, in dw_hdmi_rockchip_bind()
584 dev->of_node, 0, 0); in dw_hdmi_rockchip_bind()
592 if (encoder->possible_crtcs == 0) in dw_hdmi_rockchip_bind()
593 return -EPROBE_DEFER; in dw_hdmi_rockchip_bind()
595 ret = rockchip_hdmi_parse_dt(hdmi); in dw_hdmi_rockchip_bind()
597 if (ret != -EPROBE_DEFER) in dw_hdmi_rockchip_bind()
598 drm_err(hdmi, "Unable to parse OF data\n"); in dw_hdmi_rockchip_bind()
602 hdmi->phy = devm_phy_optional_get(dev, "hdmi"); in dw_hdmi_rockchip_bind()
603 if (IS_ERR(hdmi->phy)) { in dw_hdmi_rockchip_bind()
604 ret = PTR_ERR(hdmi->phy); in dw_hdmi_rockchip_bind()
605 if (ret != -EPROBE_DEFER) in dw_hdmi_rockchip_bind()
606 drm_err(hdmi, "failed to get phy\n"); in dw_hdmi_rockchip_bind()
610 if (hdmi->chip_data == &rk3568_chip_data) { in dw_hdmi_rockchip_bind()
611 regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1, in dw_hdmi_rockchip_bind()
621 platform_set_drvdata(pdev, hdmi); in dw_hdmi_rockchip_bind()
623 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data); in dw_hdmi_rockchip_bind()
629 if (IS_ERR(hdmi->hdmi)) { in dw_hdmi_rockchip_bind()
630 ret = PTR_ERR(hdmi->hdmi); in dw_hdmi_rockchip_bind()
645 struct rockchip_hdmi *hdmi = dev_get_drvdata(dev); in dw_hdmi_rockchip_unbind() local
647 dw_hdmi_unbind(hdmi->hdmi); in dw_hdmi_rockchip_unbind()
648 drm_encoder_cleanup(&hdmi->encoder.encoder); in dw_hdmi_rockchip_unbind()
658 return component_add(&pdev->dev, &dw_hdmi_rockchip_ops); in dw_hdmi_rockchip_probe()
663 component_del(&pdev->dev, &dw_hdmi_rockchip_ops); in dw_hdmi_rockchip_remove()
668 struct rockchip_hdmi *hdmi = dev_get_drvdata(dev); in dw_hdmi_rockchip_resume() local
670 dw_hdmi_resume(hdmi->hdmi); in dw_hdmi_rockchip_resume()
683 .name = "dwhdmi-rockchip",