297 					     struct radeon_ps *new_rps,
792 						struct radeon_ps *new_rps,  in trinity_program_power_levels_0_to_n()  argument
795 	struct trinity_ps *new_ps = trinity_get_ps(new_rps);  in trinity_program_power_levels_0_to_n()
874 				     struct radeon_ps *new_rps,  in trinity_setup_uvd_clocks()  argument
884 		if (trinity_uvd_clocks_zero(new_rps) &&  in trinity_setup_uvd_clocks()
887 		} else if (!trinity_uvd_clocks_zero(new_rps)) {  in trinity_setup_uvd_clocks()
888 			trinity_setup_uvd_clock_table(rdev, new_rps);  in trinity_setup_uvd_clocks()
895 				radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);  in trinity_setup_uvd_clocks()
902 		if (trinity_uvd_clocks_zero(new_rps) ||  in trinity_setup_uvd_clocks()
903 		    trinity_uvd_clocks_equal(new_rps, old_rps))  in trinity_setup_uvd_clocks()
906 		radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);  in trinity_setup_uvd_clocks()
915 						       struct radeon_ps *new_rps,  in trinity_set_uvd_clock_before_set_eng_clock()  argument
918 	struct trinity_ps *new_ps = trinity_get_ps(new_rps);  in trinity_set_uvd_clock_before_set_eng_clock()
919 	struct trinity_ps *current_ps = trinity_get_ps(new_rps);  in trinity_set_uvd_clock_before_set_eng_clock()
925 	trinity_setup_uvd_clocks(rdev, new_rps, old_rps);  in trinity_set_uvd_clock_before_set_eng_clock()
929 						      struct radeon_ps *new_rps,  in trinity_set_uvd_clock_after_set_eng_clock()  argument
932 	struct trinity_ps *new_ps = trinity_get_ps(new_rps);  in trinity_set_uvd_clock_after_set_eng_clock()
939 	trinity_setup_uvd_clocks(rdev, new_rps, old_rps);  in trinity_set_uvd_clock_after_set_eng_clock()
943 				  struct radeon_ps *new_rps,  in trinity_set_vce_clock()  argument
946 	if ((old_rps->evclk != new_rps->evclk) ||  in trinity_set_vce_clock()
947 	    (old_rps->ecclk != new_rps->ecclk)) {  in trinity_set_vce_clock()
949 		if (new_rps->evclk || new_rps->ecclk)  in trinity_set_vce_clock()
953 		radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);  in trinity_set_vce_clock()
1487 					     struct radeon_ps *new_rps,  in trinity_apply_state_adjust_rules()  argument
1490 	struct trinity_ps *ps = trinity_get_ps(new_rps);  in trinity_apply_state_adjust_rules()
1501 	if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL)  in trinity_apply_state_adjust_rules()
1504 	trinity_adjust_uvd_state(rdev, new_rps);  in trinity_apply_state_adjust_rules()
1506 	if (new_rps->vce_active) {  in trinity_apply_state_adjust_rules()
1507 		new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;  in trinity_apply_state_adjust_rules()
1508 		new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;  in trinity_apply_state_adjust_rules()
1510 		new_rps->evclk = 0;  in trinity_apply_state_adjust_rules()
1511 		new_rps->ecclk = 0;  in trinity_apply_state_adjust_rules()
1523 		if (new_rps->vce_active) {  in trinity_apply_state_adjust_rules()
1528 			trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage);  in trinity_apply_state_adjust_rules()
1546 	if ((new_rps->class & (ATOM_PPLIB_CLASSIFICATION_HDSTATE | ATOM_PPLIB_CLASSIFICATION_SDSTATE)) ||  in trinity_apply_state_adjust_rules()
1547 	    ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY))  in trinity_apply_state_adjust_rules()
1556 		if ((new_rps->class & (ATOM_PPLIB_CLASSIFICATION_HDSTATE | ATOM_PPLIB_CLASSIFICATION_SDSTATE)) ||  in trinity_apply_state_adjust_rules()
1557 …  ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY)) {  in trinity_apply_state_adjust_rules()
1558 			force_high = ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_HDSTATE) ||  in trinity_apply_state_adjust_rules()
1559 				      ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) &&  in trinity_apply_state_adjust_rules()