Lines Matching +full:100 +full:ps
74 struct sumo_ps *ps = rps->ps_priv; in sumo_get_ps() local
76 return ps; in sumo_get_ps()
133 u32 grs = 256 * 25 / 100; in sumo_program_grsd()
318 pi->pasi = 65535 * 100 / high_clk; in sumo_calculate_bsp()
319 pi->asi = 65535 * 100 / high_clk; in sumo_calculate_bsp()
343 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_program_bsp() local
345 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
347 if (ps->flags & SUMO_POWERSTATE_FLAGS_BOOST_STATE) in sumo_program_bsp()
352 for (i = 0; i < ps->num_levels - 1; i++) in sumo_program_bsp()
357 if (ps->flags & SUMO_POWERSTATE_FLAGS_BOOST_STATE) in sumo_program_bsp()
386 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_program_at() local
406 for (i = 0; i < ps->num_levels; i++) { in sumo_program_at()
407 asi = (i == ps->num_levels - 1) ? pi->pasi : pi->asi; in sumo_program_at()
409 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
411 a_t = CG_R(m_a * r[i] / 100) | CG_L(m_a * l[i] / 100); in sumo_program_at()
416 if (ps->flags & SUMO_POWERSTATE_FLAGS_BOOST_STATE) { in sumo_program_at()
419 m_a = asi * pi->boost_pl.sclk / 100; in sumo_program_at()
421 a_t = CG_R(m_a * r[ps->num_levels - 1] / 100) | in sumo_program_at()
422 CG_L(m_a * l[ps->num_levels - 1] / 100); in sumo_program_at()
1041 struct sumo_ps *ps, in sumo_patch_thermal_state() argument
1058 ps->levels[0].vddc_index = current_vddc; in sumo_patch_thermal_state()
1060 if (ps->levels[0].sclk > current_sclk) in sumo_patch_thermal_state()
1061 ps->levels[0].sclk = current_sclk; in sumo_patch_thermal_state()
1063 ps->levels[0].ss_divider_index = in sumo_patch_thermal_state()
1064 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr); in sumo_patch_thermal_state()
1066 ps->levels[0].ds_divider_index = in sumo_patch_thermal_state()
1067 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, SUMO_MINIMUM_ENGINE_CLOCK); in sumo_patch_thermal_state()
1069 if (ps->levels[0].ds_divider_index > ps->levels[0].ss_divider_index + 1) in sumo_patch_thermal_state()
1070 ps->levels[0].ds_divider_index = ps->levels[0].ss_divider_index + 1; in sumo_patch_thermal_state()
1072 if (ps->levels[0].ss_divider_index == ps->levels[0].ds_divider_index) { in sumo_patch_thermal_state()
1073 if (ps->levels[0].ss_divider_index > 1) in sumo_patch_thermal_state()
1074 ps->levels[0].ss_divider_index = ps->levels[0].ss_divider_index - 1; in sumo_patch_thermal_state()
1077 if (ps->levels[0].ss_divider_index == 0) in sumo_patch_thermal_state()
1078 ps->levels[0].ds_divider_index = 0; in sumo_patch_thermal_state()
1080 if (ps->levels[0].ds_divider_index == 0) in sumo_patch_thermal_state()
1081 ps->levels[0].ss_divider_index = 0; in sumo_patch_thermal_state()
1088 struct sumo_ps *ps = sumo_get_ps(new_rps); in sumo_apply_state_adjust_rules() local
1097 return sumo_patch_thermal_state(rdev, ps, current_ps); in sumo_apply_state_adjust_rules()
1101 ps->flags |= SUMO_POWERSTATE_FLAGS_BOOST_STATE; in sumo_apply_state_adjust_rules()
1107 ps->flags |= SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE; in sumo_apply_state_adjust_rules()
1109 for (i = 0; i < ps->num_levels; i++) { in sumo_apply_state_adjust_rules()
1110 if (ps->levels[i].vddc_index < min_voltage) in sumo_apply_state_adjust_rules()
1111 ps->levels[i].vddc_index = min_voltage; in sumo_apply_state_adjust_rules()
1113 if (ps->levels[i].sclk < min_sclk) in sumo_apply_state_adjust_rules()
1114 ps->levels[i].sclk = in sumo_apply_state_adjust_rules()
1117 ps->levels[i].ss_divider_index = in sumo_apply_state_adjust_rules()
1118 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr); in sumo_apply_state_adjust_rules()
1120 ps->levels[i].ds_divider_index = in sumo_apply_state_adjust_rules()
1121 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, SUMO_MINIMUM_ENGINE_CLOCK); in sumo_apply_state_adjust_rules()
1123 if (ps->levels[i].ds_divider_index > ps->levels[i].ss_divider_index + 1) in sumo_apply_state_adjust_rules()
1124 ps->levels[i].ds_divider_index = ps->levels[i].ss_divider_index + 1; in sumo_apply_state_adjust_rules()
1126 if (ps->levels[i].ss_divider_index == ps->levels[i].ds_divider_index) { in sumo_apply_state_adjust_rules()
1127 if (ps->levels[i].ss_divider_index > 1) in sumo_apply_state_adjust_rules()
1128 ps->levels[i].ss_divider_index = ps->levels[i].ss_divider_index - 1; in sumo_apply_state_adjust_rules()
1131 if (ps->levels[i].ss_divider_index == 0) in sumo_apply_state_adjust_rules()
1132 ps->levels[i].ds_divider_index = 0; in sumo_apply_state_adjust_rules()
1134 if (ps->levels[i].ds_divider_index == 0) in sumo_apply_state_adjust_rules()
1135 ps->levels[i].ss_divider_index = 0; in sumo_apply_state_adjust_rules()
1137 if (ps->flags & SUMO_POWERSTATE_FLAGS_FORCE_NBPS1_STATE) in sumo_apply_state_adjust_rules()
1138 ps->levels[i].allow_gnb_slow = 1; in sumo_apply_state_adjust_rules()
1141 ps->levels[i].allow_gnb_slow = 0; in sumo_apply_state_adjust_rules()
1142 else if (i == ps->num_levels - 1) in sumo_apply_state_adjust_rules()
1143 ps->levels[i].allow_gnb_slow = 0; in sumo_apply_state_adjust_rules()
1145 ps->levels[i].allow_gnb_slow = 1; in sumo_apply_state_adjust_rules()
1391 struct sumo_ps *ps) in sumo_patch_boot_state() argument
1395 ps->num_levels = 1; in sumo_patch_boot_state()
1396 ps->flags = 0; in sumo_patch_boot_state()
1397 ps->levels[0] = pi->boot_pl; in sumo_patch_boot_state()
1405 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_parse_pplib_non_clock_info() local
1421 sumo_patch_boot_state(rdev, ps); in sumo_parse_pplib_non_clock_info()
1432 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_parse_pplib_clock_info() local
1433 struct sumo_pl *pl = &ps->levels[index]; in sumo_parse_pplib_clock_info()
1442 ps->num_levels = index + 1; in sumo_parse_pplib_clock_info()
1465 struct sumo_ps *ps; in sumo_parse_power_table() local
1482 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in sumo_parse_power_table()
1485 if (!rdev->pm.dpm.ps) in sumo_parse_power_table()
1495 kfree(rdev->pm.dpm.ps); in sumo_parse_power_table()
1498 ps = kzalloc(sizeof(struct sumo_ps), GFP_KERNEL); in sumo_parse_power_table()
1499 if (ps == NULL) { in sumo_parse_power_table()
1500 kfree(rdev->pm.dpm.ps); in sumo_parse_power_table()
1503 rdev->pm.dpm.ps[i].ps_priv = ps; in sumo_parse_power_table()
1515 &rdev->pm.dpm.ps[i], k, in sumo_parse_power_table()
1519 sumo_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in sumo_parse_power_table()
1800 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_print_power_state() local
1805 for (i = 0; i < ps->num_levels; i++) { in sumo_dpm_print_power_state()
1806 struct sumo_pl *pl = &ps->levels[i]; in sumo_dpm_print_power_state()
1819 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_debugfs_print_current_performance_level() local
1831 } else if (current_index >= ps->num_levels) { in sumo_dpm_debugfs_print_current_performance_level()
1834 pl = &ps->levels[current_index]; in sumo_dpm_debugfs_print_current_performance_level()
1846 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_get_current_sclk() local
1855 } else if (current_index >= ps->num_levels) { in sumo_dpm_get_current_sclk()
1858 pl = &ps->levels[current_index]; in sumo_dpm_get_current_sclk()
1874 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_get_current_vddc() local
1882 } else if (current_index >= ps->num_levels) { in sumo_dpm_get_current_vddc()
1885 pl = &ps->levels[current_index]; in sumo_dpm_get_current_vddc()
1897 kfree(rdev->pm.dpm.ps[i].ps_priv); in sumo_dpm_fini()
1899 kfree(rdev->pm.dpm.ps); in sumo_dpm_fini()
1926 struct sumo_ps *ps = sumo_get_ps(rps); in sumo_dpm_force_performance_level() local
1929 if (ps->num_levels <= 1) in sumo_dpm_force_performance_level()
1935 sumo_power_level_enable(rdev, ps->num_levels - 1, true); in sumo_dpm_force_performance_level()
1936 sumo_set_forced_level(rdev, ps->num_levels - 1); in sumo_dpm_force_performance_level()
1938 for (i = 0; i < ps->num_levels - 1; i++) { in sumo_dpm_force_performance_level()
1950 for (i = 1; i < ps->num_levels; i++) { in sumo_dpm_force_performance_level()
1957 for (i = 0; i < ps->num_levels; i++) { in sumo_dpm_force_performance_level()