Lines Matching full:pi
58 struct rv7xx_power_info *pi = rdev->pm.dpm.priv; in rv770_get_pi() local
60 return pi; in rv770_get_pi()
65 struct evergreen_power_info *pi = rdev->pm.dpm.priv; in evergreen_get_pi() local
67 return pi; in evergreen_get_pi()
73 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_bif_dynamic_pcie_gen2() local
82 if (!pi->boot_in_gen2) { in rv770_enable_bif_dynamic_pcie_gen2()
147 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_mg_clock_gating_enable() local
160 if (pi->mgcgtssm) in rv770_mg_clock_gating_enable()
239 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
242 pi->soft_regs_start + reg_offset,
243 value, pi->sram_end);
250 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_write_smc_soft_register() local
253 pi->soft_regs_start + reg_offset, in rv770_write_smc_soft_register()
254 value, pi->sram_end); in rv770_write_smc_soft_register()
262 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_t() local
273 a_n = (int)state->medium.sclk * pi->lmp + in rv770_populate_smc_t()
274 (int)state->low.sclk * (R600_AH_DFLT - pi->rlp); in rv770_populate_smc_t()
275 a_d = (int)state->low.sclk * (100 - (int)pi->rlp) + in rv770_populate_smc_t()
276 (int)state->medium.sclk * pi->lmp; in rv770_populate_smc_t()
278 l[1] = (u8)(pi->lmp - (int)pi->lmp * a_n / a_d); in rv770_populate_smc_t()
279 r[0] = (u8)(pi->rlp + (100 - (int)pi->rlp) * a_n / a_d); in rv770_populate_smc_t()
281 a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk * in rv770_populate_smc_t()
282 (R600_AH_DFLT - pi->rmp); in rv770_populate_smc_t()
283 a_d = (int)state->medium.sclk * (100 - (int)pi->rmp) + in rv770_populate_smc_t()
284 (int)state->high.sclk * pi->lhp; in rv770_populate_smc_t()
286 l[2] = (u8)(pi->lhp - (int)pi->lhp * a_n / a_d); in rv770_populate_smc_t()
287 r[1] = (u8)(pi->rmp + (100 - (int)pi->rmp) * a_n / a_d); in rv770_populate_smc_t()
290 a_t = CG_R(r[i] * pi->bsp / 200) | CG_L(l[i] * pi->bsp / 200); in rv770_populate_smc_t()
294 a_t = CG_R(r[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1] * pi->pbsp / 200) | in rv770_populate_smc_t()
295 CG_L(l[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1] * pi->pbsp / 200); in rv770_populate_smc_t()
307 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_sp() local
311 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
314 cpu_to_be32(pi->psp); in rv770_populate_smc_sp()
391 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_mclk_value() local
394 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_mclk_value()
396 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_mclk_value()
398 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_mclk_value()
400 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_mclk_value()
402 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv770_populate_mclk_value()
403 u32 dll_cntl = pi->clk_regs.rv770.dll_cntl; in rv770_populate_mclk_value()
420 pi->mem_gddr5, in rv770_populate_mclk_value()
445 if (pi->mem_gddr5) { in rv770_populate_mclk_value()
448 pi->mem_gddr5, in rv770_populate_mclk_value()
489 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_sclk_value() local
492 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_sclk_value()
494 pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv770_populate_sclk_value()
496 pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv770_populate_sclk_value()
498 pi->clk_regs.rv770.cg_spll_spread_spectrum; in rv770_populate_sclk_value()
500 pi->clk_regs.rv770.cg_spll_spread_spectrum_2; in rv770_populate_sclk_value()
539 if (pi->sclk_ss) { in rv770_populate_sclk_value()
570 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_vddc_value() local
573 if (!pi->voltage_control) { in rv770_populate_vddc_value()
579 for (i = 0; i < pi->valid_vddc_entries; i++) { in rv770_populate_vddc_value()
580 if (vddc <= pi->vddc_table[i].vddc) { in rv770_populate_vddc_value()
581 voltage->index = pi->vddc_table[i].vddc_index; in rv770_populate_vddc_value()
587 if (i == pi->valid_vddc_entries) in rv770_populate_vddc_value()
596 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_mvdd_value() local
598 if (!pi->mvdd_control) { in rv770_populate_mvdd_value()
604 if (mclk <= pi->mvdd_split_frequency) { in rv770_populate_mvdd_value()
620 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_convert_power_level_to_smc() local
623 level->gen2PCIE = pi->pcie_gen2 ? in rv770_convert_power_level_to_smc()
642 if (pi->mem_gddr5) { in rv770_convert_power_level_to_smc()
643 if (pl->mclk <= pi->mclk_strobe_mode_threshold) in rv770_convert_power_level_to_smc()
649 if (pl->mclk > pi->mclk_edc_enable_threshold) in rv770_convert_power_level_to_smc()
744 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_memory_timing_parameters() local
758 STATE0(64 * high_clock / pi->boot_sclk) | in rv770_program_memory_timing_parameters()
765 POWERMODE0(rv770_calculate_memory_refresh_rate(rdev, pi->boot_sclk)) | in rv770_program_memory_timing_parameters()
784 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_spread_spectrum() local
787 if (pi->sclk_ss) in rv770_enable_spread_spectrum()
790 if (pi->mclk_ss) { in rv770_enable_spread_spectrum()
808 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_mpll_timing_parameters() local
810 if ((rdev->family == CHIP_RV770) && !pi->mem_gddr5) { in rv770_program_mpll_timing_parameters()
812 (MPLL_LOCK_TIME(R600_MPLLLOCKTIME_DFLT * pi->ref_div) | in rv770_program_mpll_timing_parameters()
819 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_setup_bsp() local
822 r600_calculate_u_and_p(pi->asi, in rv770_setup_bsp()
825 &pi->bsp, in rv770_setup_bsp()
826 &pi->bsu); in rv770_setup_bsp()
828 r600_calculate_u_and_p(pi->pasi, in rv770_setup_bsp()
831 &pi->pbsp, in rv770_setup_bsp()
832 &pi->pbsu); in rv770_setup_bsp()
834 pi->dsp = BSP(pi->bsp) | BSU(pi->bsu); in rv770_setup_bsp()
835 pi->psp = BSP(pi->pbsp) | BSU(pi->pbsu); in rv770_setup_bsp()
837 WREG32(CG_BSP, pi->dsp); in rv770_setup_bsp()
891 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_vc() local
893 WREG32(CG_FTV, pi->vrc); in rv770_program_vc()
903 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_upload_firmware() local
909 ret = rv770_load_smc_ucode(rdev, pi->sram_end); in rv770_upload_firmware()
919 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_acpi_state() local
922 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_smc_acpi_state()
924 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_smc_acpi_state()
926 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_smc_acpi_state()
928 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_smc_acpi_state()
930 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_smc_acpi_state()
932 pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv770_populate_smc_acpi_state()
934 pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv770_populate_smc_acpi_state()
942 if (pi->acpi_vddc) { in rv770_populate_smc_acpi_state()
943 rv770_populate_vddc_value(rdev, pi->acpi_vddc, in rv770_populate_smc_acpi_state()
945 if (pi->pcie_gen2) { in rv770_populate_smc_acpi_state()
946 if (pi->acpi_pcie_gen2) in rv770_populate_smc_acpi_state()
952 if (pi->acpi_pcie_gen2) in rv770_populate_smc_acpi_state()
957 rv770_populate_vddc_value(rdev, pi->min_vddc_in_table, in rv770_populate_smc_acpi_state()
1010 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_initial_mvdd_value() local
1012 if ((pi->s0_vid_lower_smio_cntl & pi->mvdd_mask_low) == in rv770_populate_initial_mvdd_value()
1013 (pi->mvdd_low_smio[MVDD_LOW_INDEX] & pi->mvdd_mask_low)) { in rv770_populate_initial_mvdd_value()
1029 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_initial_state() local
1033 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl); in rv770_populate_smc_initial_state()
1035 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2); in rv770_populate_smc_initial_state()
1037 cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl); in rv770_populate_smc_initial_state()
1039 cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2); in rv770_populate_smc_initial_state()
1041 cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl); in rv770_populate_smc_initial_state()
1043 cpu_to_be32(pi->clk_regs.rv770.dll_cntl); in rv770_populate_smc_initial_state()
1046 cpu_to_be32(pi->clk_regs.rv770.mpll_ss1); in rv770_populate_smc_initial_state()
1048 cpu_to_be32(pi->clk_regs.rv770.mpll_ss2); in rv770_populate_smc_initial_state()
1054 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl); in rv770_populate_smc_initial_state()
1056 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_2); in rv770_populate_smc_initial_state()
1058 cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_3); in rv770_populate_smc_initial_state()
1060 cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum); in rv770_populate_smc_initial_state()
1062 cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2); in rv770_populate_smc_initial_state()
1081 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_initial_state()
1083 if (pi->boot_in_gen2) in rv770_populate_smc_initial_state()
1093 if (pi->mem_gddr5) { in rv770_populate_smc_initial_state()
1094 if (initial_state->low.mclk <= pi->mclk_strobe_mode_threshold) in rv770_populate_smc_initial_state()
1100 if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold) in rv770_populate_smc_initial_state()
1118 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_vddc_table() local
1121 for (i = 0; i < pi->valid_vddc_entries; i++) { in rv770_populate_smc_vddc_table()
1122 table->highSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1123 pi->vddc_table[i].high_smio; in rv770_populate_smc_vddc_table()
1124 table->lowSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1125 cpu_to_be32(pi->vddc_table[i].low_smio); in rv770_populate_smc_vddc_table()
1130 cpu_to_be32(pi->vddc_mask_low); in rv770_populate_smc_vddc_table()
1133 ((i < pi->valid_vddc_entries) && in rv770_populate_smc_vddc_table()
1134 (pi->max_vddc_in_table > in rv770_populate_smc_vddc_table()
1135 pi->vddc_table[i].vddc)); in rv770_populate_smc_vddc_table()
1139 pi->vddc_table[i].vddc_index; in rv770_populate_smc_vddc_table()
1147 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_populate_smc_mvdd_table() local
1149 if (pi->mvdd_control) { in rv770_populate_smc_mvdd_table()
1151 cpu_to_be32(pi->mvdd_low_smio[MVDD_HIGH_INDEX]); in rv770_populate_smc_mvdd_table()
1153 cpu_to_be32(pi->mvdd_low_smio[MVDD_LOW_INDEX]); in rv770_populate_smc_mvdd_table()
1157 cpu_to_be32(pi->mvdd_mask_low); in rv770_populate_smc_mvdd_table()
1166 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_init_smc_table() local
1168 RV770_SMC_STATETABLE *table = &pi->smc_statetable; in rv770_init_smc_table()
1173 pi->boot_sclk = boot_state->low.sclk; in rv770_init_smc_table()
1205 if (pi->mem_gddr5) in rv770_init_smc_table()
1227 pi->state_table_start, in rv770_init_smc_table()
1230 pi->sram_end); in rv770_init_smc_table()
1235 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_construct_vddc_table() local
1253 pi->vddc_table[i].vddc = (u16)(min + i * step); in rv770_construct_vddc_table()
1255 pi->vddc_table[i].vddc, in rv770_construct_vddc_table()
1258 pi->vddc_table[i].low_smio = gpio_pins & gpio_mask; in rv770_construct_vddc_table()
1259 pi->vddc_table[i].high_smio = 0; in rv770_construct_vddc_table()
1260 pi->vddc_mask_low = gpio_mask; in rv770_construct_vddc_table()
1262 if ((pi->vddc_table[i].low_smio != in rv770_construct_vddc_table()
1263 pi->vddc_table[i - 1].low_smio) || in rv770_construct_vddc_table()
1264 (pi->vddc_table[i].high_smio != in rv770_construct_vddc_table()
1265 pi->vddc_table[i - 1].high_smio)) in rv770_construct_vddc_table()
1268 pi->vddc_table[i].vddc_index = vddc_index; in rv770_construct_vddc_table()
1271 pi->valid_vddc_entries = (u8)steps; in rv770_construct_vddc_table()
1286 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mvdd_pin_configuration() local
1292 pi->mvdd_mask_low = gpio_mask; in rv770_get_mvdd_pin_configuration()
1293 pi->mvdd_low_smio[MVDD_HIGH_INDEX] = in rv770_get_mvdd_pin_configuration()
1299 pi->mvdd_low_smio[MVDD_LOW_INDEX] = in rv770_get_mvdd_pin_configuration()
1312 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mvdd_configuration() local
1319 pi->mvdd_control = false; in rv770_get_mvdd_configuration()
1323 pi->mvdd_split_frequency = in rv770_get_mvdd_configuration()
1326 if (pi->mvdd_split_frequency == 0) { in rv770_get_mvdd_configuration()
1327 pi->mvdd_control = false; in rv770_get_mvdd_configuration()
1386 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_upload_sw_state() local
1387 u16 address = pi->state_table_start + in rv770_upload_sw_state()
1398 pi->sram_end); in rv770_upload_sw_state()
1520 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_read_clock_registers() local
1522 pi->clk_regs.rv770.cg_spll_func_cntl = in rv770_read_clock_registers()
1524 pi->clk_regs.rv770.cg_spll_func_cntl_2 = in rv770_read_clock_registers()
1526 pi->clk_regs.rv770.cg_spll_func_cntl_3 = in rv770_read_clock_registers()
1528 pi->clk_regs.rv770.cg_spll_spread_spectrum = in rv770_read_clock_registers()
1530 pi->clk_regs.rv770.cg_spll_spread_spectrum_2 = in rv770_read_clock_registers()
1532 pi->clk_regs.rv770.mpll_ad_func_cntl = in rv770_read_clock_registers()
1534 pi->clk_regs.rv770.mpll_ad_func_cntl_2 = in rv770_read_clock_registers()
1536 pi->clk_regs.rv770.mpll_dq_func_cntl = in rv770_read_clock_registers()
1538 pi->clk_regs.rv770.mpll_dq_func_cntl_2 = in rv770_read_clock_registers()
1540 pi->clk_regs.rv770.mclk_pwrmgt_cntl = in rv770_read_clock_registers()
1542 pi->clk_regs.rv770.dll_cntl = RREG32(DLL_CNTL); in rv770_read_clock_registers()
1557 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_read_voltage_smio_registers() local
1559 pi->s0_vid_lower_smio_cntl = in rv770_read_voltage_smio_registers()
1565 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_reset_smio_status() local
1583 vid_smio_cntl = pi->s0_vid_lower_smio_cntl; in rv770_reset_smio_status()
1593 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_memory_type() local
1600 pi->mem_gddr5 = true; in rv770_get_memory_type()
1602 pi->mem_gddr5 = false; in rv770_get_memory_type()
1608 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_pcie_gen2_status() local
1615 pi->pcie_gen2 = true; in rv770_get_pcie_gen2_status()
1617 pi->pcie_gen2 = false; in rv770_get_pcie_gen2_status()
1619 if (pi->pcie_gen2) { in rv770_get_pcie_gen2_status()
1621 pi->boot_in_gen2 = true; in rv770_get_pcie_gen2_status()
1623 pi->boot_in_gen2 = false; in rv770_get_pcie_gen2_status()
1625 pi->boot_in_gen2 = false; in rv770_get_pcie_gen2_status()
1631 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
1633 if (pi->gfx_clock_gating) {
1650 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
1664 if (pi->gfx_clock_gating)
1673 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_mclk_odt_threshold() local
1677 pi->mclk_odt_threshold = 0; in rv770_get_mclk_odt_threshold()
1687 pi->mclk_odt_threshold = 30000; in rv770_get_mclk_odt_threshold()
1693 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_max_vddc() local
1697 pi->max_vddc = 0; in rv770_get_max_vddc()
1699 pi->max_vddc = vddc; in rv770_get_max_vddc()
1749 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_dcodt_before_state_switch() local
1755 if (pi->mclk_odt_threshold == 0) in rv770_program_dcodt_before_state_switch()
1758 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1761 if (new_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_before_state_switch()
1778 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_program_dcodt_after_state_switch() local
1784 if (pi->mclk_odt_threshold == 0) in rv770_program_dcodt_after_state_switch()
1787 if (current_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
1790 if (new_state->high.mclk <= pi->mclk_odt_threshold) in rv770_program_dcodt_after_state_switch()
1805 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_retrieve_odt_values() local
1807 if (pi->mclk_odt_threshold == 0) in rv770_retrieve_odt_values()
1816 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_set_dpm_event_sources() local
1844 if (pi->thermal_protection) in rv770_set_dpm_event_sources()
1855 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_enable_auto_throttle_source() local
1858 if (!(pi->active_auto_throttle_sources & (1 << source))) { in rv770_enable_auto_throttle_source()
1859 pi->active_auto_throttle_sources |= 1 << source; in rv770_enable_auto_throttle_source()
1860 rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv770_enable_auto_throttle_source()
1863 if (pi->active_auto_throttle_sources & (1 << source)) { in rv770_enable_auto_throttle_source()
1864 pi->active_auto_throttle_sources &= ~(1 << source); in rv770_enable_auto_throttle_source()
1865 rv770_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv770_enable_auto_throttle_source()
1897 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_enable() local
1901 if (pi->gfx_clock_gating) in rv770_dpm_enable()
1907 if (pi->voltage_control) { in rv770_dpm_enable()
1916 if (pi->dcodt) in rv770_dpm_enable()
1919 if (pi->mvdd_control) { in rv770_dpm_enable()
1932 if (pi->thermal_protection) in rv770_dpm_enable()
1945 if (pi->dynamic_pcie_gen2) in rv770_dpm_enable()
1967 if (pi->gfx_clock_gating) in rv770_dpm_enable()
1970 if (pi->mg_clock_gating) in rv770_dpm_enable()
2002 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_disable() local
2009 if (pi->thermal_protection) in rv770_dpm_disable()
2014 if (pi->dynamic_pcie_gen2) in rv770_dpm_disable()
2023 if (pi->gfx_clock_gating) in rv770_dpm_disable()
2026 if (pi->mg_clock_gating) in rv770_dpm_disable()
2040 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_set_power_state() local
2062 if (pi->dcodt) in rv770_dpm_set_power_state()
2074 if (pi->dcodt) in rv770_dpm_set_power_state()
2084 struct rv7xx_power_info *pi = rv770_get_pi(rdev);
2088 if (pi->dcodt)
2091 if (pi->dcodt)
2098 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_dpm_setup_asic() local
2103 if (pi->dcodt) in rv770_dpm_setup_asic()
2179 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv7xx_parse_pplib_clock_info() local
2222 if (pi->max_vddc) in rv7xx_parse_pplib_clock_info()
2223 pl->vddc = pi->max_vddc; in rv7xx_parse_pplib_clock_info()
2227 pi->acpi_vddc = pl->vddc; in rv7xx_parse_pplib_clock_info()
2231 pi->acpi_pcie_gen2 = true; in rv7xx_parse_pplib_clock_info()
2233 pi->acpi_pcie_gen2 = false; in rv7xx_parse_pplib_clock_info()
2243 if (pi->min_vddc_in_table > pl->vddc) in rv7xx_parse_pplib_clock_info()
2244 pi->min_vddc_in_table = pl->vddc; in rv7xx_parse_pplib_clock_info()
2246 if (pi->max_vddc_in_table < pl->vddc) in rv7xx_parse_pplib_clock_info()
2247 pi->max_vddc_in_table = pl->vddc; in rv7xx_parse_pplib_clock_info()
2331 struct rv7xx_power_info *pi = rv770_get_pi(rdev); in rv770_get_engine_memory_ss() local
2334 pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv770_get_engine_memory_ss()
2336 pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv770_get_engine_memory_ss()
2339 if (pi->sclk_ss || pi->mclk_ss) in rv770_get_engine_memory_ss()
2340 pi->dynamic_ss = true; in rv770_get_engine_memory_ss()
2342 pi->dynamic_ss = false; in rv770_get_engine_memory_ss()
2347 struct rv7xx_power_info *pi; in rv770_dpm_init() local
2351 pi = kzalloc(sizeof(struct rv7xx_power_info), GFP_KERNEL); in rv770_dpm_init()
2352 if (pi == NULL) in rv770_dpm_init()
2354 rdev->pm.dpm.priv = pi; in rv770_dpm_init()
2358 pi->acpi_vddc = 0; in rv770_dpm_init()
2359 pi->min_vddc_in_table = 0; in rv770_dpm_init()
2360 pi->max_vddc_in_table = 0; in rv770_dpm_init()
2378 pi->ref_div = dividers.ref_div + 1; in rv770_dpm_init()
2380 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in rv770_dpm_init()
2382 pi->mclk_strobe_mode_threshold = 30000; in rv770_dpm_init()
2383 pi->mclk_edc_enable_threshold = 30000; in rv770_dpm_init()
2385 pi->rlp = RV770_RLP_DFLT; in rv770_dpm_init()
2386 pi->rmp = RV770_RMP_DFLT; in rv770_dpm_init()
2387 pi->lhp = RV770_LHP_DFLT; in rv770_dpm_init()
2388 pi->lmp = RV770_LMP_DFLT; in rv770_dpm_init()
2390 pi->voltage_control = in rv770_dpm_init()
2393 pi->mvdd_control = in rv770_dpm_init()
2398 pi->asi = RV770_ASI_DFLT; in rv770_dpm_init()
2399 pi->pasi = RV770_HASI_DFLT; in rv770_dpm_init()
2400 pi->vrc = RV770_VRC_DFLT; in rv770_dpm_init()
2402 pi->power_gating = false; in rv770_dpm_init()
2404 pi->gfx_clock_gating = true; in rv770_dpm_init()
2406 pi->mg_clock_gating = true; in rv770_dpm_init()
2407 pi->mgcgtssm = true; in rv770_dpm_init()
2409 pi->dynamic_pcie_gen2 = true; in rv770_dpm_init()
2412 pi->thermal_protection = true; in rv770_dpm_init()
2414 pi->thermal_protection = false; in rv770_dpm_init()
2416 pi->display_gap = true; in rv770_dpm_init()
2419 pi->dcodt = true; in rv770_dpm_init()
2421 pi->dcodt = false; in rv770_dpm_init()
2423 pi->ulps = true; in rv770_dpm_init()
2425 pi->mclk_stutter_mode_threshold = 0; in rv770_dpm_init()
2427 pi->sram_end = SMC_RAM_END; in rv770_dpm_init()
2428 pi->state_table_start = RV770_SMC_TABLE_ADDRESS; in rv770_dpm_init()
2429 pi->soft_regs_start = RV770_SMC_SOFT_REGISTERS_START; in rv770_dpm_init()