67 	uint32_t tmp;  in rs400_gart_tlb_flush()  local
72 		tmp = RREG32_MC(RS480_GART_CACHE_CNTRL);  in rs400_gart_tlb_flush()
73 		if ((tmp & RS480_GART_CACHE_INVALIDATE) == 0)  in rs400_gart_tlb_flush()
114 	uint32_t tmp;  in rs400_gart_enable()  local
116 	tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);  in rs400_gart_enable()
117 	tmp |= RS690_DIS_OUT_OF_PCI_GART_ACCESS;  in rs400_gart_enable()
118 	WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp);  in rs400_gart_enable()
153 	tmp = REG_SET(RS690_MC_AGP_TOP, rdev->mc.gtt_end >> 16);  in rs400_gart_enable()
154 	tmp |= REG_SET(RS690_MC_AGP_START, rdev->mc.gtt_start >> 16);  in rs400_gart_enable()
156 		WREG32_MC(RS690_MCCFG_AGP_LOCATION, tmp);  in rs400_gart_enable()
157 		tmp = RREG32(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;  in rs400_gart_enable()
158 		WREG32(RADEON_BUS_CNTL, tmp);  in rs400_gart_enable()
160 		WREG32(RADEON_MC_AGP_LOCATION, tmp);  in rs400_gart_enable()
161 		tmp = RREG32(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;  in rs400_gart_enable()
162 		WREG32(RADEON_BUS_CNTL, tmp);  in rs400_gart_enable()
165 	tmp = (u32)rdev->gart.table_addr & 0xfffff000;  in rs400_gart_enable()
166 	tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4;  in rs400_gart_enable()
168 	WREG32_MC(RS480_GART_BASE, tmp);  in rs400_gart_enable()
180 		tmp = RREG32_MC(RS480_MC_MISC_CNTL);  in rs400_gart_enable()
181 		tmp |= RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN;  in rs400_gart_enable()
182 		WREG32_MC(RS480_MC_MISC_CNTL, tmp);  in rs400_gart_enable()
184 		tmp = RREG32_MC(RS480_MC_MISC_CNTL);  in rs400_gart_enable()
185 		tmp |= RS480_GART_INDEX_REG_EN;  in rs400_gart_enable()
186 		WREG32_MC(RS480_MC_MISC_CNTL, tmp);  in rs400_gart_enable()
200 	uint32_t tmp;  in rs400_gart_disable()  local
202 	tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);  in rs400_gart_disable()
203 	tmp |= RS690_DIS_OUT_OF_PCI_GART_ACCESS;  in rs400_gart_disable()
204 	WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp);  in rs400_gart_disable()
244 	uint32_t tmp;  in rs400_mc_wait_for_idle()  local
248 		tmp = RREG32(RADEON_MC_STATUS);  in rs400_mc_wait_for_idle()
249 		if (tmp & RADEON_MC_IDLE) {  in rs400_mc_wait_for_idle()
326 	uint32_t tmp;  in rs400_debugfs_gart_info_show()  local
328 	tmp = RREG32(RADEON_HOST_PATH_CNTL);  in rs400_debugfs_gart_info_show()
329 	seq_printf(m, "HOST_PATH_CNTL 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
330 	tmp = RREG32(RADEON_BUS_CNTL);  in rs400_debugfs_gart_info_show()
331 	seq_printf(m, "BUS_CNTL 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
332 	tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);  in rs400_debugfs_gart_info_show()
333 	seq_printf(m, "AIC_CTRL_SCRATCH 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
335 		tmp = RREG32_MC(RS690_MCCFG_AGP_BASE);  in rs400_debugfs_gart_info_show()
336 		seq_printf(m, "MCCFG_AGP_BASE 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
337 		tmp = RREG32_MC(RS690_MCCFG_AGP_BASE_2);  in rs400_debugfs_gart_info_show()
338 		seq_printf(m, "MCCFG_AGP_BASE_2 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
339 		tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION);  in rs400_debugfs_gart_info_show()
340 		seq_printf(m, "MCCFG_AGP_LOCATION 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
341 		tmp = RREG32_MC(RS690_MCCFG_FB_LOCATION);  in rs400_debugfs_gart_info_show()
342 		seq_printf(m, "MCCFG_FB_LOCATION 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
343 		tmp = RREG32(RS690_HDP_FB_LOCATION);  in rs400_debugfs_gart_info_show()
344 		seq_printf(m, "HDP_FB_LOCATION 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
346 		tmp = RREG32(RADEON_AGP_BASE);  in rs400_debugfs_gart_info_show()
347 		seq_printf(m, "AGP_BASE 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
348 		tmp = RREG32(RS480_AGP_BASE_2);  in rs400_debugfs_gart_info_show()
349 		seq_printf(m, "AGP_BASE_2 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
350 		tmp = RREG32(RADEON_MC_AGP_LOCATION);  in rs400_debugfs_gart_info_show()
351 		seq_printf(m, "MC_AGP_LOCATION 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
353 	tmp = RREG32_MC(RS480_GART_BASE);  in rs400_debugfs_gart_info_show()
354 	seq_printf(m, "GART_BASE 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
355 	tmp = RREG32_MC(RS480_GART_FEATURE_ID);  in rs400_debugfs_gart_info_show()
356 	seq_printf(m, "GART_FEATURE_ID 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
357 	tmp = RREG32_MC(RS480_AGP_MODE_CNTL);  in rs400_debugfs_gart_info_show()
358 	seq_printf(m, "AGP_MODE_CONTROL 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
359 	tmp = RREG32_MC(RS480_MC_MISC_CNTL);  in rs400_debugfs_gart_info_show()
360 	seq_printf(m, "MC_MISC_CNTL 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
361 	tmp = RREG32_MC(0x5F);  in rs400_debugfs_gart_info_show()
362 	seq_printf(m, "MC_MISC_UMA_CNTL 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
363 	tmp = RREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE);  in rs400_debugfs_gart_info_show()
364 	seq_printf(m, "AGP_ADDRESS_SPACE_SIZE 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
365 	tmp = RREG32_MC(RS480_GART_CACHE_CNTRL);  in rs400_debugfs_gart_info_show()
366 	seq_printf(m, "GART_CACHE_CNTRL 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
367 	tmp = RREG32_MC(0x3B);  in rs400_debugfs_gart_info_show()
368 	seq_printf(m, "MC_GART_ERROR_ADDRESS 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
369 	tmp = RREG32_MC(0x3C);  in rs400_debugfs_gart_info_show()
370 	seq_printf(m, "MC_GART_ERROR_ADDRESS_HI 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
371 	tmp = RREG32_MC(0x30);  in rs400_debugfs_gart_info_show()
372 	seq_printf(m, "GART_ERROR_0 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
373 	tmp = RREG32_MC(0x31);  in rs400_debugfs_gart_info_show()
374 	seq_printf(m, "GART_ERROR_1 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
375 	tmp = RREG32_MC(0x32);  in rs400_debugfs_gart_info_show()
376 	seq_printf(m, "GART_ERROR_2 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
377 	tmp = RREG32_MC(0x33);  in rs400_debugfs_gart_info_show()
378 	seq_printf(m, "GART_ERROR_3 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
379 	tmp = RREG32_MC(0x34);  in rs400_debugfs_gart_info_show()
380 	seq_printf(m, "GART_ERROR_4 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
381 	tmp = RREG32_MC(0x35);  in rs400_debugfs_gart_info_show()
382 	seq_printf(m, "GART_ERROR_5 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
383 	tmp = RREG32_MC(0x36);  in rs400_debugfs_gart_info_show()
384 	seq_printf(m, "GART_ERROR_6 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()
385 	tmp = RREG32_MC(0x37);  in rs400_debugfs_gart_info_show()
386 	seq_printf(m, "GART_ERROR_7 0x%08x\n", tmp);  in rs400_debugfs_gart_info_show()