80 			rdev->pm.dpm.ac_power = true;  in radeon_pm_acpi_event_handler()
82 			rdev->pm.dpm.ac_power = false;  in radeon_pm_acpi_event_handler()
84 			if (rdev->asic->dpm.enable_bapm)  in radeon_pm_acpi_event_handler()
85 				radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power);  in radeon_pm_acpi_event_handler()
472 	enum radeon_pm_state_type pm = rdev->pm.dpm.user_state;  in radeon_get_dpm_state()
489 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY;  in radeon_set_dpm_state()
491 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;  in radeon_set_dpm_state()
493 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE;  in radeon_set_dpm_state()
516 	enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;  in radeon_get_dpm_forced_performance_level()
553 	if (rdev->asic->dpm.force_performance_level) {  in radeon_set_dpm_forced_performance_level()
554 		if (rdev->pm.dpm.thermal_active) {  in radeon_set_dpm_forced_performance_level()
575 	if (rdev->asic->dpm.fan_ctrl_get_mode)  in radeon_hwmon_get_pwm1_enable()
576 		pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev);  in radeon_hwmon_get_pwm1_enable()
591 	if (!rdev->asic->dpm.fan_ctrl_set_mode)  in radeon_hwmon_set_pwm1_enable()
600 		rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC);  in radeon_hwmon_set_pwm1_enable()
603 		rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0);  in radeon_hwmon_set_pwm1_enable()
638 	err = rdev->asic->dpm.set_fan_speed_percent(rdev, value);  in radeon_hwmon_set_pwm1()
653 	err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed);  in radeon_hwmon_get_pwm1()
699 		temp = rdev->pm.dpm.thermal.min_temp;  in radeon_hwmon_show_temp_thresh()
701 		temp = rdev->pm.dpm.thermal.max_temp;  in radeon_hwmon_show_temp_thresh()
726 	if (rdev->asic->dpm.get_current_sclk)  in radeon_hwmon_show_sclk()
751 	if (rdev->asic->dpm.get_current_vddc)  in radeon_hwmon_show_vddc()
752 		vddc = rdev->asic->dpm.get_current_vddc(rdev);  in radeon_hwmon_show_vddc()
794 		!rdev->asic->dpm.get_current_vddc)  in hwmon_attributes_visible()
806 	if ((!rdev->asic->dpm.get_fan_speed_percent &&  in hwmon_attributes_visible()
808 	    (!rdev->asic->dpm.fan_ctrl_get_mode &&  in hwmon_attributes_visible()
812 	if ((!rdev->asic->dpm.set_fan_speed_percent &&  in hwmon_attributes_visible()
814 	    (!rdev->asic->dpm.fan_ctrl_set_mode &&  in hwmon_attributes_visible()
819 	if ((!rdev->asic->dpm.set_fan_speed_percent &&  in hwmon_attributes_visible()
820 	     !rdev->asic->dpm.get_fan_speed_percent) &&  in hwmon_attributes_visible()
879 			     pm.dpm.thermal.work);  in radeon_dpm_thermal_work_handler()
889 		if (temp < rdev->pm.dpm.thermal.min_temp)  in radeon_dpm_thermal_work_handler()
891 			dpm_state = rdev->pm.dpm.user_state;  in radeon_dpm_thermal_work_handler()
893 		if (rdev->pm.dpm.thermal.high_to_low)  in radeon_dpm_thermal_work_handler()
895 			dpm_state = rdev->pm.dpm.user_state;  in radeon_dpm_thermal_work_handler()
899 		rdev->pm.dpm.thermal_active = true;  in radeon_dpm_thermal_work_handler()
901 		rdev->pm.dpm.thermal_active = false;  in radeon_dpm_thermal_work_handler()
902 	rdev->pm.dpm.state = dpm_state;  in radeon_dpm_thermal_work_handler()
910 	bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ?  in radeon_dpm_single_display()
914 	if (single_display && rdev->asic->dpm.vblank_too_short) {  in radeon_dpm_single_display()
947 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {  in radeon_dpm_pick_power_state()
948 		ps = &rdev->pm.dpm.ps[i];  in radeon_dpm_pick_power_state()
981 			if (rdev->pm.dpm.uvd_ps)  in radeon_dpm_pick_power_state()
982 				return rdev->pm.dpm.uvd_ps;  in radeon_dpm_pick_power_state()
1002 			return rdev->pm.dpm.boot_ps;  in radeon_dpm_pick_power_state()
1031 		if (rdev->pm.dpm.uvd_ps) {  in radeon_dpm_pick_power_state()
1032 			return rdev->pm.dpm.uvd_ps;  in radeon_dpm_pick_power_state()
1067 	if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) {  in radeon_dpm_change_power_state_locked()
1069 		if ((!rdev->pm.dpm.thermal_active) &&  in radeon_dpm_change_power_state_locked()
1070 		    (!rdev->pm.dpm.uvd_active))  in radeon_dpm_change_power_state_locked()
1071 			rdev->pm.dpm.state = rdev->pm.dpm.user_state;  in radeon_dpm_change_power_state_locked()
1073 	dpm_state = rdev->pm.dpm.state;  in radeon_dpm_change_power_state_locked()
1077 		rdev->pm.dpm.requested_ps = ps;  in radeon_dpm_change_power_state_locked()
1082 	if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) {  in radeon_dpm_change_power_state_locked()
1084 		if (ps->vce_active != rdev->pm.dpm.vce_active)  in radeon_dpm_change_power_state_locked()
1087 		if (rdev->pm.dpm.single_display != single_display)  in radeon_dpm_change_power_state_locked()
1093 			if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) {  in radeon_dpm_change_power_state_locked()
1098 				rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;  in radeon_dpm_change_power_state_locked()
1099 				rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;  in radeon_dpm_change_power_state_locked()
1107 			if (rdev->pm.dpm.new_active_crtcs ==  in radeon_dpm_change_power_state_locked()
1108 			    rdev->pm.dpm.current_active_crtcs) {  in radeon_dpm_change_power_state_locked()
1111 				if ((rdev->pm.dpm.current_active_crtc_count > 1) &&  in radeon_dpm_change_power_state_locked()
1112 				    (rdev->pm.dpm.new_active_crtc_count > 1)) {  in radeon_dpm_change_power_state_locked()
1117 					rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;  in radeon_dpm_change_power_state_locked()
1118 					rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;  in radeon_dpm_change_power_state_locked()
1128 		radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps);  in radeon_dpm_change_power_state_locked()
1130 		radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps);  in radeon_dpm_change_power_state_locked()
1137 	ps->vce_active = rdev->pm.dpm.vce_active;  in radeon_dpm_change_power_state_locked()
1159 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps;  in radeon_dpm_change_power_state_locked()
1163 	rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;  in radeon_dpm_change_power_state_locked()
1164 	rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;  in radeon_dpm_change_power_state_locked()
1165 	rdev->pm.dpm.single_display = single_display;  in radeon_dpm_change_power_state_locked()
1167 	if (rdev->asic->dpm.force_performance_level) {  in radeon_dpm_change_power_state_locked()
1168 		if (rdev->pm.dpm.thermal_active) {  in radeon_dpm_change_power_state_locked()
1169 			enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;  in radeon_dpm_change_power_state_locked()
1173 			rdev->pm.dpm.forced_level = level;  in radeon_dpm_change_power_state_locked()
1176 			radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level);  in radeon_dpm_change_power_state_locked()
1189 	if (rdev->asic->dpm.powergate_uvd) {  in radeon_dpm_enable_uvd()
1193 		enable |= rdev->pm.dpm.sd > 0;  in radeon_dpm_enable_uvd()
1194 		enable |= rdev->pm.dpm.hd > 0;  in radeon_dpm_enable_uvd()
1201 			rdev->pm.dpm.uvd_active = true;  in radeon_dpm_enable_uvd()
1204 			if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0))  in radeon_dpm_enable_uvd()
1206 			else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0))  in radeon_dpm_enable_uvd()
1208 			else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1))  in radeon_dpm_enable_uvd()
1210 			else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2))  in radeon_dpm_enable_uvd()
1215 			rdev->pm.dpm.state = dpm_state;  in radeon_dpm_enable_uvd()
1219 			rdev->pm.dpm.uvd_active = false;  in radeon_dpm_enable_uvd()
1231 		rdev->pm.dpm.vce_active = true;  in radeon_dpm_enable_vce()
1233 		rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL;  in radeon_dpm_enable_vce()
1237 		rdev->pm.dpm.vce_active = false;  in radeon_dpm_enable_vce()
1262 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;  in radeon_pm_suspend_dpm()
1318 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;  in radeon_pm_resume_dpm()
1411 	for (i = 0; i < rdev->pm.dpm.num_ps; i++) {  in radeon_dpm_print_power_states()
1413 		radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]);  in radeon_dpm_print_power_states()
1422 	rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED;  in radeon_pm_init_dpm()
1423 	rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;  in radeon_pm_init_dpm()
1424 	rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;  in radeon_pm_init_dpm()
1441 	INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler);  in radeon_pm_init_dpm()
1444 	rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;  in radeon_pm_init_dpm()
1779 	rdev->pm.dpm.new_active_crtcs = 0;  in radeon_pm_compute_clocks_dpm()
1780 	rdev->pm.dpm.new_active_crtc_count = 0;  in radeon_pm_compute_clocks_dpm()
1781 	rdev->pm.dpm.high_pixelclock_count = 0;  in radeon_pm_compute_clocks_dpm()
1787 				rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);  in radeon_pm_compute_clocks_dpm()
1788 				rdev->pm.dpm.new_active_crtc_count++;  in radeon_pm_compute_clocks_dpm()
1794 					rdev->pm.dpm.high_pixelclock_count++;  in radeon_pm_compute_clocks_dpm()
1801 		rdev->pm.dpm.ac_power = true;  in radeon_pm_compute_clocks_dpm()
1803 		rdev->pm.dpm.ac_power = false;  in radeon_pm_compute_clocks_dpm()
1928 		if (rdev->asic->dpm.debugfs_print_current_performance_level)  in radeon_debugfs_pm_info_show()