Lines Matching defs:robj

85 	struct radeon_bo *robj = gem_to_radeon_bo(gobj);
87 	if (robj) {
88 		radeon_mn_unregister(robj);
89 		ttm_bo_fini(&robj->tbo);
98 	struct radeon_bo *robj;
120 			     flags, NULL, NULL, &robj);
132 	*obj = &robj->tbo.base;
133 	robj->pid = task_pid_nr(current);
136 	list_add_tail(&robj->list, &rdev->gem.objects);
145 	struct radeon_bo *robj;
150 	robj = gem_to_radeon_bo(gobj);
163 		r = dma_resv_wait_timeout(robj->tbo.base.resv,
174 	if (domain == RADEON_GEM_DOMAIN_VRAM && robj->prime_shared_count) {
470 	struct radeon_bo *robj;
476 	robj = gem_to_radeon_bo(gobj);
477 	if (radeon_ttm_tt_has_userptr(robj->rdev, robj->tbo.ttm)) {
481 	*offset_p = radeon_bo_mmap_offset(robj);
499 	struct radeon_bo *robj;
507 	robj = gem_to_radeon_bo(gobj);
509 	r = dma_resv_test_signaled(robj->tbo.base.resv, DMA_RESV_USAGE_READ);
515 	cur_placement = READ_ONCE(robj->tbo.resource->mem_type);
527 	struct radeon_bo *robj;
536 	robj = gem_to_radeon_bo(gobj);
538 	ret = dma_resv_wait_timeout(robj->tbo.base.resv, DMA_RESV_USAGE_READ,
546 	cur_placement = READ_ONCE(robj->tbo.resource->mem_type);
549 		robj->rdev->asic->mmio_hdp_flush(rdev);
560 	struct radeon_bo *robj;
567 	robj = gem_to_radeon_bo(gobj);
568 	r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
623 			r = drm_exec_prepare_obj(&exec, &entry->robj->tbo.base,
637 		domain = radeon_mem_type_to_domain(entry->robj->tbo.resource->mem_type);
774 	struct radeon_bo *robj;
781 	robj = gem_to_radeon_bo(gobj);
784 	if (radeon_ttm_tt_has_userptr(robj->rdev, robj->tbo.ttm))
787 	r = radeon_bo_reserve(robj, false);
793 		args->value = robj->initial_domain;
796 		robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
804 	radeon_bo_unreserve(robj);