Lines Matching +full:2 +full:ppm
170 (radeon_crtc->v_border * 2)); in r600_dpm_get_vblank_time()
215 *u = (b_c + 1) / 2; in r600_calculate_u_and_p()
216 *p = i_c / (1 << (2 * (*u))); in r600_calculate_u_and_p()
447 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART2 + (index * 4 * 2), in r600_engine_clock_entry_enable()
450 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART2 + (index * 4 * 2), in r600_engine_clock_entry_enable()
458 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART2 + (index * 4 * 2), in r600_engine_clock_entry_enable_pulse_skipping()
461 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART2 + (index * 4 * 2), in r600_engine_clock_entry_enable_pulse_skipping()
469 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART2 + (index * 4 * 2), in r600_engine_clock_entry_enable_post_divider()
472 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART2 + (index * 4 * 2), in r600_engine_clock_entry_enable_post_divider()
479 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART1 + (index * 4 * 2), in r600_engine_clock_entry_set_post_divider()
486 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART1 + (index * 4 * 2), in r600_engine_clock_entry_set_reference_divider()
493 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART1 + (index * 4 * 2), in r600_engine_clock_entry_set_feedback_divider()
500 WREG32_P(SCLK_FREQ_SETTING_STEP_0_PART1 + (index * 4 * 2), in r600_engine_clock_entry_set_step_time()
900 if (fan_info->fan.ucFanTableFormat >= 2) in r600_parse_extended_power_table()
1197 ATOM_PPLIB_PPM_Table *ppm = (ATOM_PPLIB_PPM_Table *) in r600_parse_extended_power_table() local
1206 rdev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign; in r600_parse_extended_power_table()
1208 le16_to_cpu(ppm->usCpuCoreNumber); in r600_parse_extended_power_table()
1210 le32_to_cpu(ppm->ulPlatformTDP); in r600_parse_extended_power_table()
1212 le32_to_cpu(ppm->ulSmallACPlatformTDP); in r600_parse_extended_power_table()
1214 le32_to_cpu(ppm->ulPlatformTDC); in r600_parse_extended_power_table()
1216 le32_to_cpu(ppm->ulSmallACPlatformTDC); in r600_parse_extended_power_table()
1218 le32_to_cpu(ppm->ulApuTDP); in r600_parse_extended_power_table()
1220 le32_to_cpu(ppm->ulDGpuTDP); in r600_parse_extended_power_table()
1222 le32_to_cpu(ppm->ulDGpuUlvPower); in r600_parse_extended_power_table()
1224 le32_to_cpu(ppm->ulTjmax); in r600_parse_extended_power_table()
1347 case 2: in r600_get_pcie_lane_support()
1348 return 2; in r600_get_pcie_lane_support()
1363 0, 1, 2, 0, 3, 0, 0, 0, 4, 0, 0, 0, 5, 0, 0, 0, 6 in r600_encode_pci_lane_width()