Lines Matching refs:robj
1223 track->db_z_read_bo = reloc->robj; in evergreen_cs_handle_reg()
1235 track->db_z_write_bo = reloc->robj; in evergreen_cs_handle_reg()
1247 track->db_s_read_bo = reloc->robj; in evergreen_cs_handle_reg()
1259 track->db_s_write_bo = reloc->robj; in evergreen_cs_handle_reg()
1283 track->vgt_strmout_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1507 track->cb_color_fmask_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1524 track->cb_color_cmask_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1565 track->cb_color_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1581 track->cb_color_bo[tmp] = reloc->robj; in evergreen_cs_handle_reg()
1593 track->htile_bo = reloc->robj; in evergreen_cs_handle_reg()
2024 track->indirect_draw_buffer_size = radeon_bo_size(reloc->robj); in evergreen_packet3_check()
2161 if ((tmp + size) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2163 tmp + size, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2199 if ((tmp + size) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2201 tmp + size, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2378 texture = reloc->robj; in evergreen_packet3_check()
2399 mipmap = reloc->robj; in evergreen_packet3_check()
2419 if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2422 ib[idx+1+(i*8)+1] = radeon_bo_size(reloc->robj) - offset; in evergreen_packet3_check()
2501 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2503 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2520 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2522 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2549 if ((offset + 8) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2551 offset + 8, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2574 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2576 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2601 if ((offset + 4) > radeon_bo_size(reloc->robj)) { in evergreen_packet3_check()
2603 offset + 4, radeon_bo_size(reloc->robj)); in evergreen_packet3_check()
2849 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2851 dst_offset, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2874 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2876 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2879 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2881 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2914 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2916 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2919 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2921 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2933 if ((src_offset + count) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2935 src_offset + count, radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2938 if ((dst_offset + count) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2940 dst_offset + count, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2977 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2979 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2982 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
2984 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
2987 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
2989 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3017 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3019 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3022 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3024 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3027 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
3029 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3079 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3081 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3084 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3086 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3089 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
3091 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3125 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3127 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3130 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3132 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3166 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
3168 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
3171 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3173 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()
3176 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) { in evergreen_dma_cs_parse()
3178 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj)); in evergreen_dma_cs_parse()
3200 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in evergreen_dma_cs_parse()
3202 dst_offset, radeon_bo_size(dst_reloc->robj)); in evergreen_dma_cs_parse()