51 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_enable_bif_dynamic_pcie_gen2()  local
58 			if (!pi->boot_in_gen2) {  in cypress_enable_bif_dynamic_pcie_gen2()
75 		if (!pi->boot_in_gen2) {  in cypress_enable_bif_dynamic_pcie_gen2()
99 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);
101 	if (pi->gfx_clock_gating) {
173 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_mg_clock_gating_enable()  local
193 		if (pi->mgcgtssm)  in cypress_mg_clock_gating_enable()
214 		if (pi->mgcgtssm)  in cypress_mg_clock_gating_enable()
222 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_enable_spread_spectrum()  local
225 		if (pi->sclk_ss)  in cypress_enable_spread_spectrum()
228 		if (pi->mclk_ss)  in cypress_enable_spread_spectrum()
329 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_advertise_gen2_capability()  local
340 		pi->pcie_gen2 = true;  in cypress_advertise_gen2_capability()
342 		pi->pcie_gen2 = false;  in cypress_advertise_gen2_capability()
344 	if (!pi->pcie_gen2)  in cypress_advertise_gen2_capability()
424 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_get_strobe_mode_settings()  local
428 	if (pi->mem_gddr5) {  in cypress_get_strobe_mode_settings()
429 		if (mclk <= pi->mclk_strobe_mode_threshold)  in cypress_get_strobe_mode_settings()
477 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_mclk_value()  local
480 		pi->clk_regs.rv770.mpll_ad_func_cntl;  in cypress_populate_mclk_value()
482 		pi->clk_regs.rv770.mpll_ad_func_cntl_2;  in cypress_populate_mclk_value()
484 		pi->clk_regs.rv770.mpll_dq_func_cntl;  in cypress_populate_mclk_value()
486 		pi->clk_regs.rv770.mpll_dq_func_cntl_2;  in cypress_populate_mclk_value()
488 		pi->clk_regs.rv770.mclk_pwrmgt_cntl;  in cypress_populate_mclk_value()
490 		pi->clk_regs.rv770.dll_cntl;  in cypress_populate_mclk_value()
491 	u32 mpll_ss1 = pi->clk_regs.rv770.mpll_ss1;  in cypress_populate_mclk_value()
492 	u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2;  in cypress_populate_mclk_value()
529 	if (pi->mem_gddr5) {  in cypress_populate_mclk_value()
552 	if (pi->mclk_ss) {  in cypress_populate_mclk_value()
576 	dll_speed = rv740_get_dll_speed(pi->mem_gddr5,  in cypress_populate_mclk_value()
658 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_mvdd_value()  local
661 	if (!pi->mvdd_control) {  in cypress_populate_mvdd_value()
667 	if (mclk <= pi->mvdd_split_frequency) {  in cypress_populate_mvdd_value()
683 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_convert_power_level_to_smc()  local
688 	level->gen2PCIE = pi->pcie_gen2 ?  in cypress_convert_power_level_to_smc()
699 	if (pi->mclk_stutter_mode_threshold &&  in cypress_convert_power_level_to_smc()
700 	    (pl->mclk <= pi->mclk_stutter_mode_threshold) &&  in cypress_convert_power_level_to_smc()
709 	if (pi->mem_gddr5) {  in cypress_convert_power_level_to_smc()
710 		if (pl->mclk > pi->mclk_edc_enable_threshold)  in cypress_convert_power_level_to_smc()
872 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_upload_sw_state()  local
873 	u16 address = pi->state_table_start +  in cypress_upload_sw_state()
884 				    pi->sram_end);  in cypress_upload_sw_state()
890 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_upload_mc_reg_table()  local
903 				       pi->sram_end);  in cypress_upload_mc_reg_table()
909 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_calculate_burst_time()  local
910 	u32 multiplier = pi->mem_gddr5 ? 1 : 2;  in cypress_calculate_burst_time()
1075 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_initialize_mc_reg_table()  local
1081 					       pi->mem_gddr5,  in cypress_initialize_mc_reg_table()
1242 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_smc_initial_state()  local
1247 		cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl);  in cypress_populate_smc_initial_state()
1249 		cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2);  in cypress_populate_smc_initial_state()
1251 		cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl);  in cypress_populate_smc_initial_state()
1253 		cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2);  in cypress_populate_smc_initial_state()
1255 		cpu_to_be32(pi->clk_regs.rv770.mclk_pwrmgt_cntl);  in cypress_populate_smc_initial_state()
1257 		cpu_to_be32(pi->clk_regs.rv770.dll_cntl);  in cypress_populate_smc_initial_state()
1260 		cpu_to_be32(pi->clk_regs.rv770.mpll_ss1);  in cypress_populate_smc_initial_state()
1262 		cpu_to_be32(pi->clk_regs.rv770.mpll_ss2);  in cypress_populate_smc_initial_state()
1268 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl);  in cypress_populate_smc_initial_state()
1270 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_2);  in cypress_populate_smc_initial_state()
1272 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_func_cntl_3);  in cypress_populate_smc_initial_state()
1274 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum);  in cypress_populate_smc_initial_state()
1276 		cpu_to_be32(pi->clk_regs.rv770.cg_spll_spread_spectrum_2);  in cypress_populate_smc_initial_state()
1302 	table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);  in cypress_populate_smc_initial_state()
1305 	if (pi->boot_in_gen2)  in cypress_populate_smc_initial_state()
1314 	if (pi->mem_gddr5) {  in cypress_populate_smc_initial_state()
1319 		if (initial_state->low.mclk > pi->mclk_edc_enable_threshold)  in cypress_populate_smc_initial_state()
1336 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_smc_acpi_state()  local
1339 		pi->clk_regs.rv770.mpll_ad_func_cntl;  in cypress_populate_smc_acpi_state()
1341 		pi->clk_regs.rv770.mpll_ad_func_cntl_2;  in cypress_populate_smc_acpi_state()
1343 		pi->clk_regs.rv770.mpll_dq_func_cntl;  in cypress_populate_smc_acpi_state()
1345 		pi->clk_regs.rv770.mpll_dq_func_cntl_2;  in cypress_populate_smc_acpi_state()
1347 		pi->clk_regs.rv770.cg_spll_func_cntl;  in cypress_populate_smc_acpi_state()
1349 		pi->clk_regs.rv770.cg_spll_func_cntl_2;  in cypress_populate_smc_acpi_state()
1351 		pi->clk_regs.rv770.cg_spll_func_cntl_3;  in cypress_populate_smc_acpi_state()
1353 		pi->clk_regs.rv770.mclk_pwrmgt_cntl;  in cypress_populate_smc_acpi_state()
1355 		pi->clk_regs.rv770.dll_cntl;  in cypress_populate_smc_acpi_state()
1361 	if (pi->acpi_vddc) {  in cypress_populate_smc_acpi_state()
1364 					       pi->acpi_vddc,  in cypress_populate_smc_acpi_state()
1366 		if (pi->pcie_gen2) {  in cypress_populate_smc_acpi_state()
1367 			if (pi->acpi_pcie_gen2)  in cypress_populate_smc_acpi_state()
1373 		if (pi->acpi_pcie_gen2)  in cypress_populate_smc_acpi_state()
1380 					       pi->min_vddc_in_table,  in cypress_populate_smc_acpi_state()
1398 	if (pi->mem_gddr5)  in cypress_populate_smc_acpi_state()
1529 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_smc_voltage_tables()  local
1543 			if (pi->max_vddc_in_table <=  in cypress_populate_smc_voltage_tables()
1575 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_get_mvdd_configuration()  local
1584 		pi->mvdd_control = false;  in cypress_get_mvdd_configuration()
1599 		pi->mvdd_control = false;  in cypress_get_mvdd_configuration()
1603 	pi->mvdd_split_frequency =  in cypress_get_mvdd_configuration()
1606 	if (pi->mvdd_split_frequency == 0) {  in cypress_get_mvdd_configuration()
1607 		pi->mvdd_control = false;  in cypress_get_mvdd_configuration()
1617 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_init_smc_table()  local
1618 	RV770_SMC_STATETABLE *table = &pi->smc_statetable;  in cypress_init_smc_table()
1647 	if (pi->mem_gddr5)  in cypress_init_smc_table()
1661 				       pi->state_table_start,  in cypress_init_smc_table()
1663 				       pi->sram_end);  in cypress_init_smc_table()
1669 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_populate_mc_reg_table()  local
1691 				       pi->sram_end);  in cypress_populate_mc_reg_table()
1696 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_get_table_locations()  local
1704 					&tmp, pi->sram_end);  in cypress_get_table_locations()
1708 	pi->state_table_start = (u16)tmp;  in cypress_get_table_locations()
1713 					&tmp, pi->sram_end);  in cypress_get_table_locations()
1717 	pi->soft_regs_start = (u16)tmp;  in cypress_get_table_locations()
1722 					&tmp, pi->sram_end);  in cypress_get_table_locations()
1808 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_dpm_enable()  local
1813 	if (pi->gfx_clock_gating)  in cypress_dpm_enable()
1819 	if (pi->voltage_control) {  in cypress_dpm_enable()
1828 	if (pi->mvdd_control) {  in cypress_dpm_enable()
1848 	if (pi->dynamic_ss)  in cypress_dpm_enable()
1851 	if (pi->thermal_protection)  in cypress_dpm_enable()
1863 	if (pi->dynamic_pcie_gen2)  in cypress_dpm_enable()
1906 	if (pi->gfx_clock_gating)  in cypress_dpm_enable()
1909 	if (pi->mg_clock_gating)  in cypress_dpm_enable()
1919 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_dpm_disable()  local
1928 	if (pi->thermal_protection)  in cypress_dpm_disable()
1931 	if (pi->dynamic_pcie_gen2)  in cypress_dpm_disable()
1940 	if (pi->gfx_clock_gating)  in cypress_dpm_disable()
1943 	if (pi->mg_clock_gating)  in cypress_dpm_disable()
2026 	struct rv7xx_power_info *pi;  in cypress_dpm_init()  local
2035 	pi = &eg_pi->rv7xx;  in cypress_dpm_init()
2040 	pi->acpi_vddc = 0;  in cypress_dpm_init()
2042 	pi->min_vddc_in_table = 0;  in cypress_dpm_init()
2043 	pi->max_vddc_in_table = 0;  in cypress_dpm_init()
2061 		pi->ref_div = dividers.ref_div + 1;  in cypress_dpm_init()
2063 		pi->ref_div = R600_REFERENCEDIVIDER_DFLT;  in cypress_dpm_init()
2065 	pi->mclk_strobe_mode_threshold = 40000;  in cypress_dpm_init()
2066 	pi->mclk_edc_enable_threshold = 40000;  in cypress_dpm_init()
2069 	pi->rlp = RV770_RLP_DFLT;  in cypress_dpm_init()
2070 	pi->rmp = RV770_RMP_DFLT;  in cypress_dpm_init()
2071 	pi->lhp = RV770_LHP_DFLT;  in cypress_dpm_init()
2072 	pi->lmp = RV770_LMP_DFLT;  in cypress_dpm_init()
2074 	pi->voltage_control =  in cypress_dpm_init()
2077 	pi->mvdd_control =  in cypress_dpm_init()
2085 	pi->asi = RV770_ASI_DFLT;  in cypress_dpm_init()
2086 	pi->pasi = CYPRESS_HASI_DFLT;  in cypress_dpm_init()
2087 	pi->vrc = CYPRESS_VRC_DFLT;  in cypress_dpm_init()
2089 	pi->power_gating = false;  in cypress_dpm_init()
2093 		pi->gfx_clock_gating = false;  in cypress_dpm_init()
2095 		pi->gfx_clock_gating = true;  in cypress_dpm_init()
2097 	pi->mg_clock_gating = true;  in cypress_dpm_init()
2098 	pi->mgcgtssm = true;  in cypress_dpm_init()
2102 	pi->dynamic_pcie_gen2 = true;  in cypress_dpm_init()
2105 		pi->thermal_protection = true;  in cypress_dpm_init()
2107 		pi->thermal_protection = false;  in cypress_dpm_init()
2109 	pi->display_gap = true;  in cypress_dpm_init()
2112 		pi->dcodt = true;  in cypress_dpm_init()
2114 		pi->dcodt = false;  in cypress_dpm_init()
2116 	pi->ulps = true;  in cypress_dpm_init()
2138 	pi->mclk_stutter_mode_threshold = 0;  in cypress_dpm_init()
2140 	pi->sram_end = SMC_RAM_END;  in cypress_dpm_init()
2158 	struct rv7xx_power_info *pi = rv770_get_pi(rdev);  in cypress_dpm_vblank_too_short()  local
2161 	u32 switch_limit = pi->mem_gddr5 ? 450 : 0;  in cypress_dpm_vblank_too_short()