Lines Matching +full:3 +full:x
42 # define SamuBootLevel(x) ((x) << 0) argument
45 # define AcpBootLevel(x) ((x) << 8) argument
48 # define VceBootLevel(x) ((x) << 16) argument
51 # define UvdBootLevel(x) ((x) << 24) argument
59 # define Dpm0PgNbPsLo(x) ((x) << 0) argument
62 # define Dpm0PgNbPsHi(x) ((x) << 8) argument
65 # define DpmXNbPsLo(x) ((x) << 16) argument
68 # define DpmXNbPsHi(x) ((x) << 24) argument
93 # define THERMAL_PROTECTION_TYPE (1 << 3)
94 # define SW_SMIO_INDEX(x) ((x) << 6) argument
102 # define GNB_SLOW_MODE(x) ((x) << 0) argument
103 # define GNB_SLOW_MODE_MASK (3 << 0)
106 # define FORCE_NB_PS1 (1 << 3)
124 # define SST(x) ((x) << 0) argument
126 # define SSTU(x) ((x) << 16) argument
130 # define DISP_GAP(x) ((x) << 0) argument
131 # define DISP_GAP_MASK (3 << 0)
132 # define VBI_TIMER_COUNT(x) ((x) << 4) argument
134 # define VBI_TIMER_UNIT(x) ((x) << 20) argument
136 # define DISP_GAP_MCHG(x) ((x) << 24) argument
137 # define DISP_GAP_MCHG_MASK (3 << 24)
182 #define DPM_EVENT_SRC(x) ((x) << 0) argument
184 #define DIG_THERM_DPM(x) ((x) << 14) argument
188 #define FDO_PWM_DUTY(x) ((x) << 9) argument
192 #define CI_DIG_THERM_INTH(x) ((x) << 8) argument
195 #define CI_DIG_THERM_INTL(x) ((x) << 16) argument
201 #define TEMP_SEL(x) ((x) << 20) argument
205 #define ASIC_MAX_TEMP(x) ((x) << 0) argument
208 #define CTF_TEMP(x) ((x) << 9) argument
213 #define FDO_STATIC_DUTY(x) ((x) << 0) argument
217 #define FMAX_DUTY100(x) ((x) << 0) argument
221 #define TMIN(x) ((x) << 0) argument
224 #define FDO_PWM_MODE(x) ((x) << 11) argument
227 #define TACH_PWM_RESP_RATE(x) ((x) << 25) argument
231 # define EDGE_PER_REV(x) ((x) << 0) argument
234 # define TARGET_PERIOD(x) ((x) << 3) argument
236 # define TARGET_PERIOD_SHIFT 3
238 # define TACH_PERIOD(x) ((x) << 0) argument
251 #define SPLL_BYPASS_EN (1 << 3)
252 #define SPLL_REF_DIV(x) ((x) << 5) argument
254 #define SPLL_PDIV_A(x) ((x) << 20) argument
258 #define SCLK_MUX_SEL(x) ((x) << 0) argument
261 #define SPLL_FB_DIV(x) ((x) << 0) argument
269 #define CLK_S(x) ((x) << 4) argument
273 #define CLK_V(x) ((x) << 0) argument
278 # define MPLL_CLKOUT_SEL(x) ((x) << 8) argument
284 # define FORCE_BIF_REFCLK_EN (1 << 3)
287 # define CMON_CLK_SEL(x) ((x) << 0) argument
289 # define TMON_CLK_SEL(x) ((x) << 8) argument
292 # define DEEP_SLEEP_CLK_SEL(x) ((x) << 0) argument
294 # define ZCLK_SEL(x) ((x) << 8) argument
299 #define DIG_THERM_INTH(x) ((x) << 0) argument
302 #define DIG_THERM_INTL(x) ((x) << 8) argument
310 # define PLL_POWER_STATE_IN_TXS2_0(x) ((x) << 7) argument
313 # define PLL_POWER_STATE_IN_OFF_0(x) ((x) << 10) argument
316 # define PLL_RAMP_UP_TIME_0(x) ((x) << 24) argument
320 # define PLL_POWER_STATE_IN_TXS2_1(x) ((x) << 7) argument
323 # define PLL_POWER_STATE_IN_OFF_1(x) ((x) << 10) argument
326 # define PLL_RAMP_UP_TIME_1(x) ((x) << 24) argument
351 # define LC_L0S_INACTIVITY(x) ((x) << 8) argument
354 # define LC_L1_INACTIVITY(x) ((x) << 12) argument
366 # define LC_LINK_WIDTH_X4 3
378 # define LC_DYN_LANES_PWR_STATE(x) ((x) << 21) argument
382 # define LC_XMIT_N_FTS(x) ((x) << 0) argument
391 # define LC_TARGET_LINK_SPEED_OVERRIDE_MASK (0x3 << 3)
392 # define LC_TARGET_LINK_SPEED_OVERRIDE_SHIFT 3
400 # define LC_CURRENT_DATA_RATE_MASK (0x3 << 13) /* 0/1/2 = gen1/2/3 */
441 # define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) argument
445 #define PIPEID(x) ((x) << 0) argument
446 #define MEID(x) ((x) << 2) argument
447 #define VMID(x) ((x) << 4) argument
448 #define QUEUEID(x) ((x) << 8) argument
490 #define L2_CACHE_PTE_ENDIAN_SWAP_MODE(x) ((x) << 2) argument
491 #define L2_CACHE_PDE_ENDIAN_SWAP_MODE(x) ((x) << 4) argument
494 #define EFFECTIVE_L2_QUEUE_SIZE(x) (((x) & 7) << 15) argument
495 #define CONTEXT1_IDENTITY_ACCESS_MODE(x) (((x) & 3) << 19) argument
499 #define INVALIDATE_CACHE_MODE(x) ((x) << 26) argument
504 #define BANK_SELECT(x) ((x) << 0) argument
505 #define L2_CACHE_UPDATE_MODE(x) ((x) << 6) argument
506 #define L2_CACHE_BIGK_FRAGMENT_SIZE(x) ((x) << 15) argument
512 #define PAGE_TABLE_DEPTH(x) (((x) & 3) << 1) argument
513 #define RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT (1 << 3)
525 #define PAGE_TABLE_BLOCK_SIZE(x) (((x) & 0xF) << 24) argument
547 * bit 3: read
602 #define SYSTEM_ACCESS_MODE_PA_ONLY (0 << 3)
603 #define SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 3)
604 #define SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)
605 #define SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 3)
628 #define NOOFROWS_SHIFT 3
641 #define STATE0(x) ((x) << 0) argument
644 #define STATE1(x) ((x) << 5) argument
647 #define STATE2(x) ((x) << 10) argument
650 #define STATE3(x) ((x) << 15) argument
679 #define MC_SEQ_MISC0_VEN_ID_VALUE 3
722 # define DLL_SPEED(x) ((x) << 0) argument
736 #define BWCTRL(x) ((x) << 20) argument
739 #define VCO_MODE(x) ((x) << 0) argument
740 #define VCO_MODE_MASK (3 << 0)
741 #define CLKFRAC(x) ((x) << 4) argument
743 #define CLKF(x) ((x) << 16) argument
747 #define YCLK_POST_DIV(x) ((x) << 0) argument
750 #define YCLK_SEL(x) ((x) << 4) argument
754 #define CLKV(x) ((x) << 0) argument
757 #define CLKS(x) ((x) << 0) argument
803 # define IH_RB_SIZE(x) ((x) << 1) /* log2 */ argument
806 # define IH_WPTR_WRITEBACK_TIMER(x) ((x) << 9) /* log2 */ argument
818 # define IH_MC_SWAP(x) ((x) << 1) argument
822 # define IH_MC_SWAP_64BIT 3
824 # define MC_WRREQ_CREDIT(x) ((x) << 15) argument
825 # define MC_WR_CLEAN_CNT(x) ((x) << 20) argument
826 # define MC_VMID(x) ((x) << 25) argument
836 # define IH_REQ_NONSNOOP_EN (1 << 3)
853 #define CP3 (1 << 3)
865 #define LB_MEMORY_SIZE(x) ((x) << 0) argument
866 #define LB_MEMORY_CONFIG(x) ((x) << 20) argument
869 # define LATENCY_WATERMARK_MASK(x) ((x) << 8) argument
871 # define LATENCY_LOW_WATERMARK(x) ((x) << 0) argument
872 # define LATENCY_HIGH_WATERMARK(x) ((x) << 16) argument
897 # define LB_D1_VBLANK_INTERRUPT (1 << 3)
906 # define LB_D2_VBLANK_INTERRUPT (1 << 3)
912 # define LB_D3_VBLANK_INTERRUPT (1 << 3)
917 # define LB_D4_VBLANK_INTERRUPT (1 << 3)
922 # define LB_D5_VBLANK_INTERRUPT (1 << 3)
927 # define LB_D6_VBLANK_INTERRUPT (1 << 3)
972 # define DC_HPDx_CONNECTION_TIMER(x) ((x) << 0) argument
973 # define DC_HPDx_RX_INT_TIMER(x) ((x) << 16) argument
990 # define FMT_TRUNCATE_DEPTH(x) ((x) << 4) /* 0 - 18bpp, 1 - 24bpp, 2 - 30bpp */ argument
992 # define FMT_SPATIAL_DITHER_MODE(x) ((x) << 9) argument
993 # define FMT_SPATIAL_DITHER_DEPTH(x) ((x) << 11) /* 0 - 18bpp, 1 - 24bpp, 2 - 30bpp */ argument
998 # define FMT_TEMPORAL_DITHER_DEPTH(x) ((x) << 17) /* 0 - 18bpp, 1 - 24bpp, 2 - 30bpp */ argument
999 # define FMT_TEMPORAL_DITHER_OFFSET(x) ((x) << 21) argument
1002 # define FMT_25FRC_SEL(x) ((x) << 26) argument
1003 # define FMT_50FRC_SEL(x) ((x) << 28) argument
1004 # define FMT_75FRC_SEL(x) ((x) << 30) argument
1007 # define FMT_CLAMP_COLOR_FORMAT(x) ((x) << 16) argument
1013 #define GRBM_READ_TIMEOUT(x) ((x) << 0) argument
1116 #define IDLE_POLL_COUNT(x) ((x) << 16) argument
1120 #define MEQ1_START(x) ((x) << 0) argument
1121 #define MEQ2_START(x) ((x) << 8) argument
1126 #define CACHE_INVALIDATION(x) ((x) << 0) argument
1130 #define AUTO_INVLD_EN(x) ((x) << 6) argument
1134 #define ES_AND_GS_AUTO 3
1145 #define NUM_CLIP_SEQ(x) ((x) << 1) argument
1148 #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) argument
1149 #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) argument
1152 #define SC_FRONTEND_PRIM_FIFO_SIZE(x) ((x) << 0) argument
1153 #define SC_BACKEND_PRIM_FIFO_SIZE(x) ((x) << 6) argument
1154 #define SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 15) argument
1155 #define SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 23) argument
1165 #define PRIVATE_BASE(x) ((x) << 0) /* scratch */ argument
1166 #define SHARED_BASE(x) ((x) << 16) /* LDS */ argument
1173 #define ALIGNMENT_MODE(x) ((x) << 2) argument
1177 #define SH_MEM_ALIGNMENT_MODE_UNALIGNED 3
1178 #define DEFAULT_MTYPE(x) ((x) << 4) argument
1179 #define APE1_MTYPE(x) ((x) << 7) argument
1182 #define MTYPE_NONCACHED 3
1189 #define VTX_DONE_DELAY(x) ((x) << 0) argument
1199 #define BACKEND_DISABLE(x) ((x) << 16) argument
1201 #define NUM_PIPES(x) ((x) << 0) argument
1204 #define PIPE_INTERLEAVE_SIZE(x) ((x) << 4) argument
1207 #define NUM_SHADER_ENGINES(x) ((x) << 12) argument
1210 #define SHADER_ENGINE_TILE_SIZE(x) ((x) << 16) argument
1213 #define ROW_SIZE(x) ((x) << 28) argument
1218 # define ARRAY_MODE(x) ((x) << 2) argument
1225 # define PIPE_CONFIG(x) ((x) << 6) argument
1240 # define TILE_SPLIT(x) ((x) << 11) argument
1244 # define ADDR_SURF_TILE_SPLIT_512B 3
1248 # define MICRO_TILE_MODE_NEW(x) ((x) << 22) argument
1252 # define ADDR_SURF_ROTATED_MICRO_TILING 3
1253 # define SAMPLE_SPLIT(x) ((x) << 25) argument
1257 # define ADDR_SURF_SAMPLE_SPLIT_8 3
1260 # define BANK_WIDTH(x) ((x) << 0) argument
1264 # define ADDR_SURF_BANK_WIDTH_8 3
1265 # define BANK_HEIGHT(x) ((x) << 2) argument
1269 # define ADDR_SURF_BANK_HEIGHT_8 3
1270 # define MACRO_TILE_ASPECT(x) ((x) << 4) argument
1274 # define ADDR_SURF_MACRO_ASPECT_8 3
1275 # define NUM_BANKS(x) ((x) << 6) argument
1279 # define ADDR_SURF_16_BANK 3
1303 #define RB_BUFSZ(x) ((x) << 0) argument
1304 #define RB_BLKSZ(x) ((x) << 8) argument
1429 # define STATIC_PER_CU_PG_ENABLE (1 << 3)
1449 # define MAX_PU_CU(x) ((x) << 0) argument
1453 # define GRBM_REG_SGIT(x) ((x) << 3) argument
1454 # define GRBM_REG_SGIT_MASK (0xffff << 3)
1459 #define BPM_ADDR(x) ((x) << 0) argument
1478 #define MESSAGE(x) ((x) << 1) argument
1487 #define EOP_SIZE(x) ((x) << 0) argument
1502 #define QUANTUM_DURATION(x) ((x) << 8) argument
1512 #define DOORBELL_OFFSET(x) ((x) << 2) argument
1520 #define QUEUE_SIZE(x) ((x) << 0) argument
1522 #define RPTR_BLOCK_SIZE(x) ((x) << 8) argument
1536 #define DEFAULT_MIN_IB_AVAIL_SIZE (3U << 20)
1543 #define MQD_VMID(x) ((x) << 0) argument
1563 # define RASTER_CONFIG_RB_MAP_3 3
1564 #define PKR_MAP(x) ((x) << 8) argument
1569 # define SAMPLE_STREAMOUTSTATS3 (3 << 0)
1628 #define INSTANCE_INDEX(x) ((x) << 0) argument
1629 #define SH_INDEX(x) ((x) << 8) argument
1630 #define SE_INDEX(x) ((x) << 16) argument
1654 #define SM_MODE(x) ((x) << 17) argument
1660 #define ON_MONITOR_ADD(x) ((x) << 24) argument
1676 #define PACKET_TYPE3 3
1678 #define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
1697 /* Packet 3 types */
1700 #define PACKET3_BASE_INDEX(x) ((x) << 0) argument
1701 #define CE_PARTITION_BASE 3
1728 #define WRITE_DATA_DST_SEL(x) ((x) << 8) argument
1732 * 3 - gds
1738 #define WRITE_DATA_CACHE_POLICY(x) ((x) << 25) argument
1742 #define WRITE_DATA_ENGINE_SEL(x) ((x) << 30) argument
1751 # define PACKET3_SEM_CLIENT_CODE ((x) << 24) /* 0 = CP, 1 = CB, 2 = DB */
1756 #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) argument
1760 * 3 - ==
1765 #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) argument
1769 #define WAIT_REG_MEM_OPERATION(x) ((x) << 6) argument
1773 #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) argument
1780 #define INDIRECT_BUFFER_CACHE_POLICY(x) ((x) << 28) argument
1813 #define EVENT_TYPE(x) ((x) << 0) argument
1814 #define EVENT_INDEX(x) ((x) << 8) argument
1818 * 3 - SAMPLE_STREAMOUTSTAT*
1830 #define EOP_CACHE_POLICY(x) ((x) << 25) argument
1835 #define DATA_SEL(x) ((x) << 29) argument
1839 * 3 - send 64bit GPU counter value
1842 #define INT_SEL(x) ((x) << 24) argument
1847 #define DST_SEL(x) ((x) << 16) argument
1855 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28)
1859 * 3. SRC_ADDR_LO or DATA [31:0]
1866 # define PACKET3_DMA_DATA_ENGINE(x) ((x) << 0) argument
1870 # define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) ((x) << 13) argument
1876 # define PACKET3_DMA_DATA_DST_SEL(x) ((x) << 20) argument
1879 * 3 - DST_ADDR using L2
1881 # define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) ((x) << 25) argument
1887 # define PACKET3_DMA_DATA_SRC_SEL(x) ((x) << 29) argument
1891 * 3 - SRC_ADDR using L2
1896 # define PACKET3_DMA_DATA_CMD_SRC_SWAP(x) ((x) << 22) argument
1900 * 3 - 8 in 64
1902 # define PACKET3_DMA_DATA_CMD_DST_SWAP(x) ((x) << 24) argument
1906 * 3 - 8 in 64
1964 # define DATA_SWAP_ENABLE (1 << 3)
1982 # define SDMA_RB_SIZE(x) ((x) << 1) /* log2 */ argument
1986 # define SDMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */ argument
1998 # define SDMA_CMD_VMID(x) ((x) << 16) argument
2011 # define SDMA_COPY_SUB_OPCODE_SOA 3
2033 # define SDMA_POLL_REG_MEM_EXTRA_OP(x) ((x) << 10) argument
2037 # define SDMA_POLL_REG_MEM_EXTRA_FUNC(x) ((x) << 12) argument
2041 * 3 - ==
2052 # define SDMA_CONSTANT_FILL_EXTRA_SIZE(x) ((x) << 14) argument
2062 # define SDMA_SRBM_WRITE_EXTRA_BYTE_ENABLE(x) ((x) << 12) argument
2087 # define CG_DT(x) ((x) << 2) argument
2089 # define CLK_OD(x) ((x) << 6) argument
2121 # define CGC_CLK_GATE_DLY_TIMER(x) ((x) << 0) argument
2123 # define CGC_CLK_GATER_OFF_DLY_TIMER(x) ((x) << 4) argument
2129 # define CLOCK_ON_DELAY(x) ((x) << 0) argument
2131 # define CLOCK_OFF_DELAY(x) ((x) << 4) argument
2134 # define VCE_SYS_INT_TRAP_INTERRUPT_EN (1 << 3)