Lines Matching refs:ptdev

57 static char *get_gpu_model_name(struct panthor_device *ptdev)
59 	const u32 gpu_id = ptdev->gpu_info.gpu_id;
62 	const bool ray_intersection = !!(ptdev->gpu_info.gpu_features &
64 	const u8 shader_core_count = hweight64(ptdev->gpu_info.shader_present);
113 static int overload_shader_present(struct panthor_device *ptdev)
118 	ret = nvmem_cell_read_variable_le_u64(ptdev->base.dev, "shader-present",
121 		ptdev->gpu_info.shader_present = contents;
125 		return dev_err_probe(ptdev->base.dev, ret,
131 static int panthor_gpu_info_init(struct panthor_device *ptdev)
135 	ptdev->gpu_info.csf_id = gpu_read(ptdev, GPU_CSF_ID);
136 	ptdev->gpu_info.gpu_rev = gpu_read(ptdev, GPU_REVID);
137 	ptdev->gpu_info.core_features = gpu_read(ptdev, GPU_CORE_FEATURES);
138 	ptdev->gpu_info.l2_features = gpu_read(ptdev, GPU_L2_FEATURES);
139 	ptdev->gpu_info.tiler_features = gpu_read(ptdev, GPU_TILER_FEATURES);
140 	ptdev->gpu_info.mem_features = gpu_read(ptdev, GPU_MEM_FEATURES);
141 	ptdev->gpu_info.mmu_features = gpu_read(ptdev, GPU_MMU_FEATURES);
142 	ptdev->gpu_info.thread_features = gpu_read(ptdev, GPU_THREAD_FEATURES);
143 	ptdev->gpu_info.max_threads = gpu_read(ptdev, GPU_THREAD_MAX_THREADS);
144 	ptdev->gpu_info.thread_max_workgroup_size = gpu_read(ptdev, GPU_THREAD_MAX_WORKGROUP_SIZE);
145 	ptdev->gpu_info.thread_max_barrier_size = gpu_read(ptdev, GPU_THREAD_MAX_BARRIER_SIZE);
146 	ptdev->gpu_info.coherency_features = gpu_read(ptdev, GPU_COHERENCY_FEATURES);
148 		ptdev->gpu_info.texture_features[i] = gpu_read(ptdev, GPU_TEXTURE_FEATURES(i));
150 	ptdev->gpu_info.as_present = gpu_read(ptdev, GPU_AS_PRESENT);
153 	ptdev->gpu_info.gpu_features = gpu_read64(ptdev, GPU_FEATURES);
155 	if (panthor_hw_has_pwr_ctrl(ptdev)) {
157 		ptdev->gpu_info.l2_present = gpu_read64(ptdev, PWR_L2_PRESENT);
158 		ptdev->gpu_info.tiler_present = gpu_read64(ptdev, PWR_TILER_PRESENT);
159 		ptdev->gpu_info.shader_present = gpu_read64(ptdev, PWR_SHADER_PRESENT);
161 		ptdev->gpu_info.shader_present = gpu_read64(ptdev, GPU_SHADER_PRESENT);
162 		ptdev->gpu_info.tiler_present = gpu_read64(ptdev, GPU_TILER_PRESENT);
163 		ptdev->gpu_info.l2_present = gpu_read64(ptdev, GPU_L2_PRESENT);
166 	return overload_shader_present(ptdev);
169 static int panthor_hw_info_init(struct panthor_device *ptdev)
174 	ret = panthor_gpu_info_init(ptdev);
178 	major = GPU_VER_MAJOR(ptdev->gpu_info.gpu_id);
179 	minor = GPU_VER_MINOR(ptdev->gpu_info.gpu_id);
180 	status = GPU_VER_STATUS(ptdev->gpu_info.gpu_id);
182 	drm_info(&ptdev->base,
184 		 get_gpu_model_name(ptdev), ptdev->gpu_info.gpu_id >> 16,
187 	drm_info(&ptdev->base,
189 		 ptdev->gpu_info.l2_features,
190 		 ptdev->gpu_info.tiler_features,
191 		 ptdev->gpu_info.mem_features,
192 		 ptdev->gpu_info.mmu_features,
193 		 ptdev->gpu_info.as_present);
195 	drm_info(&ptdev->base,
197 		 ptdev->gpu_info.shader_present, ptdev->gpu_info.l2_present,
198 		 ptdev->gpu_info.tiler_present);
203 static int panthor_hw_bind_device(struct panthor_device *ptdev)
206 	const u32 arch_major = GPU_ARCH_MAJOR(ptdev->gpu_info.gpu_id);
221 	ptdev->hw = hdev;
226 static int panthor_hw_gpu_id_init(struct panthor_device *ptdev)
228 	ptdev->gpu_info.gpu_id = gpu_read(ptdev, GPU_ID);
229 	if (!ptdev->gpu_info.gpu_id)
235 int panthor_hw_init(struct panthor_device *ptdev)
239 	ret = panthor_hw_gpu_id_init(ptdev);
243 	ret = panthor_hw_bind_device(ptdev);
247 	return panthor_hw_info_init(ptdev);