41 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);  in novatek_nt37801_reset()
45 	gpiod_set_value_cansleep(ctx->reset_gpio, 0);  in novatek_nt37801_reset()
49 #define NT37801_DCS_SWITCH_PAGE			0xf0
53 				     0x55, 0xaa, 0x52, 0x08, (page))
62 	novatek_nt37801_switch_page(&dsi_ctx, 0x01);  in novatek_nt37801_on()
63 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01);  in novatek_nt37801_on()
64 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc5, 0x0b, 0x0b, 0x0b);  in novatek_nt37801_on()
65 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xaa, 0x55, 0xa5, 0x80);  in novatek_nt37801_on()
66 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02);  in novatek_nt37801_on()
67 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf5, 0x10);  in novatek_nt37801_on()
68 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x1b);  in novatek_nt37801_on()
69 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x55);  in novatek_nt37801_on()
70 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x18);  in novatek_nt37801_on()
71 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf8, 0x19);  in novatek_nt37801_on()
72 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x0f);  in novatek_nt37801_on()
73 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfc, 0x00);  in novatek_nt37801_on()
74 	mipi_dsi_dcs_set_column_address_multi(&dsi_ctx, 0x0000, 0x059f);  in novatek_nt37801_on()
75 	mipi_dsi_dcs_set_page_address_multi(&dsi_ctx, 0x0000, 0x0c7f);  in novatek_nt37801_on()
76 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x90, 0x03, 0x03);  in novatek_nt37801_on()
77 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x91,  in novatek_nt37801_on()
78 				     0x89, 0x28, 0x00, 0x28, 0xc2, 0x00, 0x02,  in novatek_nt37801_on()
79 				     0x68, 0x04, 0x6c, 0x00, 0x0a, 0x02, 0x77,  in novatek_nt37801_on()
80 				     0x01, 0xe9, 0x10, 0xf0);  in novatek_nt37801_on()
81 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xaa, 0x55, 0xa5, 0x81);  in novatek_nt37801_on()
82 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x23);  in novatek_nt37801_on()
83 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb,  in novatek_nt37801_on()
84 				     0x00, 0x01, 0x00, 0x11, 0x33, 0x33, 0x33,  in novatek_nt37801_on()
85 				     0x55, 0x57, 0xd0, 0x00, 0x00, 0x44, 0x56,  in novatek_nt37801_on()
86 				     0x77, 0x78, 0x9a, 0xbc, 0xdd, 0xf0);  in novatek_nt37801_on()
87 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x06);  in novatek_nt37801_on()
88 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0xdc);  in novatek_nt37801_on()
89 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x00);  in novatek_nt37801_on()
91 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x00, 0x18, 0x00, 0x10);  in novatek_nt37801_on()
93 				     0x20);  in novatek_nt37801_on()
94 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51,  in novatek_nt37801_on()
95 				     0x07, 0xff, 0x07, 0xff, 0x0f, 0xff);  in novatek_nt37801_on()
96 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x01);  in novatek_nt37801_on()
97 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00);  in novatek_nt37801_on()
98 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x9c, 0x01);  in novatek_nt37801_on()
100 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x00);  in novatek_nt37801_on()
102 	novatek_nt37801_switch_page(&dsi_ctx, 0x01);  in novatek_nt37801_on()
103 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x55, 0x01, 0xff, 0x03);  in novatek_nt37801_on()
137 	if (ret < 0)  in novatek_nt37801_prepare()
143 	if (ret < 0)  in novatek_nt37801_prepare()
149 	if (ret < 0) {  in novatek_nt37801_prepare()
155 	if (ret < 0) {  in novatek_nt37801_prepare()
162 	return 0;  in novatek_nt37801_prepare()
179 	if (ret < 0)  in novatek_nt37801_unprepare()
187 	return 0;  in novatek_nt37801_unprepare()
225 	if (ret < 0)  in novatek_nt37801_bl_update_status()
230 	return 0;  in novatek_nt37801_bl_update_status()
267 	if (ret < 0)  in novatek_nt37801_probe()
302 	if (ret < 0) {  in novatek_nt37801_probe()
307 	return 0;  in novatek_nt37801_probe()
316 	if (ret < 0)  in novatek_nt37801_remove()